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authorYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>2008-07-03 23:37:12 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-28 05:10:33 -0400
commit6bdfb22a8e1ffa37ae4ad35b87cb02958d1901e5 (patch)
treeafc8f27f1044be5787fb38d181292dd861f9a1c5 /arch/sh/kernel/cpu/sh4a/setup-sh7785.c
parentf12ae6bc4ad0054386b380dbf90e63617cd5ab92 (diff)
sh: add interrupt ack code to sh4a
This patch is based on interrupt acknowledge code for external interrupt sources on sh3 processors and adds on sh4a processors. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7785.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 621e7329ec6..30baa63b24c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -238,13 +238,18 @@ static struct intc_sense_reg sense_registers[] __initdata = {
238 IRQ4, IRQ5, IRQ6, IRQ7 } }, 238 IRQ4, IRQ5, IRQ6, IRQ7 } },
239}; 239};
240 240
241static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, 241static struct intc_mask_reg ack_registers[] __initdata = {
242 NULL, mask_registers, prio_registers, 242 { 0xffd00024, 0, 32, /* INTREQ */
243 sense_registers); 243 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
244};
245
246static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123",
247 vectors_irq0123, NULL, mask_registers,
248 prio_registers, sense_registers, ack_registers);
244 249
245static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, 250static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567",
246 NULL, mask_registers, prio_registers, 251 vectors_irq4567, NULL, mask_registers,
247 sense_registers); 252 prio_registers, sense_registers, ack_registers);
248 253
249/* External interrupt pins in IRL mode */ 254/* External interrupt pins in IRL mode */
250 255