diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-09 22:03:16 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-09 22:03:16 -0500 |
commit | 3a43aaa31790c36b69ebf8a6396f37fade86b531 (patch) | |
tree | 7c7f8da6219d546f2b44534cb7be1fb5591d6ac4 /arch/sh/include | |
parent | aed886ce777590eac87f7ce2897d9f8357754331 (diff) | |
parent | 6a5a0b9139b19dd1a107870269a35bc9cf18d2dc (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (137 commits)
sh: include empty zero page in romImage
sh: Make associative cache writes fatal on all SH-4A parts.
sh: Drop associative writes for SH-4 cache flushes.
sh: Partial revert of copy/clear_user_highpage() optimizations.
sh: Add default uImage rule for se7724, ap325rxa, and migor.
sh: allow runtime pm without suspend/resume callbacks
sh: mach-ecovec24: Remove un-defined settings for VPU
sh: mach-ecovec24: LCDC drive ability become high
sh: fix sh7724 VEU3F resource size
serial: sh-sci: Fix too early port disabling.
sh: pfc: pr_info() -> pr_debug() cleanups.
sh: pfc: Convert from ctrl_xxx() to __raw_xxx() I/O routines.
sh: Improve kfr2r09 serial port setup code
sh: Break out SuperH PFC code
sh: Move KEYSC header file
sh: convert /proc/cpu/aligmnent, /proc/cpu/kernel_alignment to seq_file
sh: Add CPG save/restore code for sh7724 R-standby
sh: Add SDHI power control support to Ecovec
mfd: Add power control platform data to SDHI driver
sh: mach-ecovec24: modify address map
...
Diffstat (limited to 'arch/sh/include')
34 files changed, 461 insertions, 587 deletions
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h index 80d40813e05..99d6b3ecbe2 100644 --- a/arch/sh/include/asm/addrspace.h +++ b/arch/sh/include/asm/addrspace.h | |||
@@ -28,9 +28,6 @@ | |||
28 | /* Returns the privileged segment base of a given address */ | 28 | /* Returns the privileged segment base of a given address */ |
29 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) | 29 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) |
30 | 30 | ||
31 | /* Returns the physical address of a PnSEG (n=1,2) address */ | ||
32 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | ||
33 | |||
34 | #if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) | 31 | #if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) |
35 | /* | 32 | /* |
36 | * Map an address to a certain privileged segment | 33 | * Map an address to a certain privileged segment |
@@ -60,5 +57,11 @@ | |||
60 | #define P3_ADDR_MAX P4SEG | 57 | #define P3_ADDR_MAX P4SEG |
61 | #endif | 58 | #endif |
62 | 59 | ||
60 | #ifndef __ASSEMBLY__ | ||
61 | #ifdef CONFIG_PMB | ||
62 | extern int __in_29bit_mode(void); | ||
63 | #endif /* CONFIG_PMB */ | ||
64 | #endif /* __ASSEMBLY__ */ | ||
65 | |||
63 | #endif /* __KERNEL__ */ | 66 | #endif /* __KERNEL__ */ |
64 | #endif /* __ASM_SH_ADDRSPACE_H */ | 67 | #endif /* __ASM_SH_ADDRSPACE_H */ |
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h index e8e78137c6f..b16388d7195 100644 --- a/arch/sh/include/asm/atomic.h +++ b/arch/sh/include/asm/atomic.h | |||
@@ -78,11 +78,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) | |||
78 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | 78 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) |
79 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | 79 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) |
80 | 80 | ||
81 | /* Atomic operations are already serializing on SH */ | 81 | #define smp_mb__before_atomic_dec() smp_mb() |
82 | #define smp_mb__before_atomic_dec() barrier() | 82 | #define smp_mb__after_atomic_dec() smp_mb() |
83 | #define smp_mb__after_atomic_dec() barrier() | 83 | #define smp_mb__before_atomic_inc() smp_mb() |
84 | #define smp_mb__before_atomic_inc() barrier() | 84 | #define smp_mb__after_atomic_inc() smp_mb() |
85 | #define smp_mb__after_atomic_inc() barrier() | ||
86 | 85 | ||
87 | #include <asm-generic/atomic-long.h> | 86 | #include <asm-generic/atomic-long.h> |
88 | #include <asm-generic/atomic64.h> | 87 | #include <asm-generic/atomic64.h> |
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index ebe595b7ab1..98511e4d28c 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h | |||
@@ -26,8 +26,8 @@ | |||
26 | /* | 26 | /* |
27 | * clear_bit() doesn't provide any barrier for the compiler. | 27 | * clear_bit() doesn't provide any barrier for the compiler. |
28 | */ | 28 | */ |
29 | #define smp_mb__before_clear_bit() barrier() | 29 | #define smp_mb__before_clear_bit() smp_mb() |
30 | #define smp_mb__after_clear_bit() barrier() | 30 | #define smp_mb__after_clear_bit() smp_mb() |
31 | 31 | ||
32 | #ifdef CONFIG_SUPERH32 | 32 | #ifdef CONFIG_SUPERH32 |
33 | static inline unsigned long ffz(unsigned long word) | 33 | static inline unsigned long ffz(unsigned long word) |
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h index 46260fcbdf4..02a19a1c033 100644 --- a/arch/sh/include/asm/bugs.h +++ b/arch/sh/include/asm/bugs.h | |||
@@ -14,11 +14,15 @@ | |||
14 | 14 | ||
15 | #include <asm/processor.h> | 15 | #include <asm/processor.h> |
16 | 16 | ||
17 | extern void select_idle_routine(void); | ||
18 | |||
17 | static void __init check_bugs(void) | 19 | static void __init check_bugs(void) |
18 | { | 20 | { |
19 | extern unsigned long loops_per_jiffy; | 21 | extern unsigned long loops_per_jiffy; |
20 | char *p = &init_utsname()->machine[2]; /* "sh" */ | 22 | char *p = &init_utsname()->machine[2]; /* "sh" */ |
21 | 23 | ||
24 | select_idle_routine(); | ||
25 | |||
22 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; | 26 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; |
23 | 27 | ||
24 | switch (current_cpu_data.family) { | 28 | switch (current_cpu_data.family) { |
diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h index 69d56dd4c96..87ced133a36 100644 --- a/arch/sh/include/asm/dma-mapping.h +++ b/arch/sh/include/asm/dma-mapping.h | |||
@@ -1,219 +1,108 @@ | |||
1 | #ifndef __ASM_SH_DMA_MAPPING_H | 1 | #ifndef __ASM_SH_DMA_MAPPING_H |
2 | #define __ASM_SH_DMA_MAPPING_H | 2 | #define __ASM_SH_DMA_MAPPING_H |
3 | 3 | ||
4 | #include <linux/mm.h> | 4 | extern struct dma_map_ops *dma_ops; |
5 | #include <linux/scatterlist.h> | 5 | extern void no_iommu_init(void); |
6 | #include <linux/dma-debug.h> | 6 | |
7 | #include <asm/cacheflush.h> | 7 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) |
8 | #include <asm/io.h> | 8 | { |
9 | return dma_ops; | ||
10 | } | ||
11 | |||
9 | #include <asm-generic/dma-coherent.h> | 12 | #include <asm-generic/dma-coherent.h> |
13 | #include <asm-generic/dma-mapping-common.h> | ||
14 | |||
15 | static inline int dma_supported(struct device *dev, u64 mask) | ||
16 | { | ||
17 | struct dma_map_ops *ops = get_dma_ops(dev); | ||
10 | 18 | ||
11 | extern struct bus_type pci_bus_type; | 19 | if (ops->dma_supported) |
20 | return ops->dma_supported(dev, mask); | ||
12 | 21 | ||
13 | #define dma_supported(dev, mask) (1) | 22 | return 1; |
23 | } | ||
14 | 24 | ||
15 | static inline int dma_set_mask(struct device *dev, u64 mask) | 25 | static inline int dma_set_mask(struct device *dev, u64 mask) |
16 | { | 26 | { |
27 | struct dma_map_ops *ops = get_dma_ops(dev); | ||
28 | |||
17 | if (!dev->dma_mask || !dma_supported(dev, mask)) | 29 | if (!dev->dma_mask || !dma_supported(dev, mask)) |
18 | return -EIO; | 30 | return -EIO; |
31 | if (ops->set_dma_mask) | ||
32 | return ops->set_dma_mask(dev, mask); | ||
19 | 33 | ||
20 | *dev->dma_mask = mask; | 34 | *dev->dma_mask = mask; |
21 | 35 | ||
22 | return 0; | 36 | return 0; |
23 | } | 37 | } |
24 | 38 | ||
25 | void *dma_alloc_coherent(struct device *dev, size_t size, | ||
26 | dma_addr_t *dma_handle, gfp_t flag); | ||
27 | |||
28 | void dma_free_coherent(struct device *dev, size_t size, | ||
29 | void *vaddr, dma_addr_t dma_handle); | ||
30 | |||
31 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | 39 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
32 | enum dma_data_direction dir); | 40 | enum dma_data_direction dir); |
33 | 41 | ||
34 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | 42 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
35 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | 43 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) |
36 | #define dma_is_consistent(d, h) (1) | ||
37 | |||
38 | static inline dma_addr_t dma_map_single(struct device *dev, | ||
39 | void *ptr, size_t size, | ||
40 | enum dma_data_direction dir) | ||
41 | { | ||
42 | dma_addr_t addr = virt_to_phys(ptr); | ||
43 | |||
44 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
45 | if (dev->bus == &pci_bus_type) | ||
46 | return addr; | ||
47 | #endif | ||
48 | dma_cache_sync(dev, ptr, size, dir); | ||
49 | |||
50 | debug_dma_map_page(dev, virt_to_page(ptr), | ||
51 | (unsigned long)ptr & ~PAGE_MASK, size, | ||
52 | dir, addr, true); | ||
53 | |||
54 | return addr; | ||
55 | } | ||
56 | |||
57 | static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, | ||
58 | size_t size, enum dma_data_direction dir) | ||
59 | { | ||
60 | debug_dma_unmap_page(dev, addr, size, dir, true); | ||
61 | } | ||
62 | 44 | ||
63 | static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, | 45 | #ifdef CONFIG_DMA_COHERENT |
64 | int nents, enum dma_data_direction dir) | 46 | #define dma_is_consistent(d, h) (1) |
65 | { | 47 | #else |
66 | int i; | 48 | #define dma_is_consistent(d, h) (0) |
67 | |||
68 | for (i = 0; i < nents; i++) { | ||
69 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
70 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
71 | #endif | 49 | #endif |
72 | sg[i].dma_address = sg_phys(&sg[i]); | ||
73 | sg[i].dma_length = sg[i].length; | ||
74 | } | ||
75 | 50 | ||
76 | debug_dma_map_sg(dev, sg, nents, i, dir); | 51 | static inline int dma_get_cache_alignment(void) |
77 | |||
78 | return nents; | ||
79 | } | ||
80 | |||
81 | static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
82 | int nents, enum dma_data_direction dir) | ||
83 | { | ||
84 | debug_dma_unmap_sg(dev, sg, nents, dir); | ||
85 | } | ||
86 | |||
87 | static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
88 | unsigned long offset, size_t size, | ||
89 | enum dma_data_direction dir) | ||
90 | { | ||
91 | return dma_map_single(dev, page_address(page) + offset, size, dir); | ||
92 | } | ||
93 | |||
94 | static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, | ||
95 | size_t size, enum dma_data_direction dir) | ||
96 | { | ||
97 | dma_unmap_single(dev, dma_address, size, dir); | ||
98 | } | ||
99 | |||
100 | static inline void __dma_sync_single(struct device *dev, dma_addr_t dma_handle, | ||
101 | size_t size, enum dma_data_direction dir) | ||
102 | { | 52 | { |
103 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | 53 | /* |
104 | if (dev->bus == &pci_bus_type) | 54 | * Each processor family will define its own L1_CACHE_SHIFT, |
105 | return; | 55 | * L1_CACHE_BYTES wraps to this, so this is always safe. |
106 | #endif | 56 | */ |
107 | dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir); | 57 | return L1_CACHE_BYTES; |
108 | } | 58 | } |
109 | 59 | ||
110 | static inline void dma_sync_single_range(struct device *dev, | 60 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
111 | dma_addr_t dma_handle, | ||
112 | unsigned long offset, size_t size, | ||
113 | enum dma_data_direction dir) | ||
114 | { | 61 | { |
115 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | 62 | struct dma_map_ops *ops = get_dma_ops(dev); |
116 | if (dev->bus == &pci_bus_type) | ||
117 | return; | ||
118 | #endif | ||
119 | dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir); | ||
120 | } | ||
121 | 63 | ||
122 | static inline void __dma_sync_sg(struct device *dev, struct scatterlist *sg, | 64 | if (ops->mapping_error) |
123 | int nelems, enum dma_data_direction dir) | 65 | return ops->mapping_error(dev, dma_addr); |
124 | { | ||
125 | int i; | ||
126 | 66 | ||
127 | for (i = 0; i < nelems; i++) { | 67 | return dma_addr == 0; |
128 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
129 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
130 | #endif | ||
131 | sg[i].dma_address = sg_phys(&sg[i]); | ||
132 | sg[i].dma_length = sg[i].length; | ||
133 | } | ||
134 | } | 68 | } |
135 | 69 | ||
136 | static inline void dma_sync_single_for_cpu(struct device *dev, | 70 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
137 | dma_addr_t dma_handle, size_t size, | 71 | dma_addr_t *dma_handle, gfp_t gfp) |
138 | enum dma_data_direction dir) | ||
139 | { | 72 | { |
140 | __dma_sync_single(dev, dma_handle, size, dir); | 73 | struct dma_map_ops *ops = get_dma_ops(dev); |
141 | debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir); | 74 | void *memory; |
142 | } | ||
143 | 75 | ||
144 | static inline void dma_sync_single_for_device(struct device *dev, | 76 | if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) |
145 | dma_addr_t dma_handle, | 77 | return memory; |
146 | size_t size, | 78 | if (!ops->alloc_coherent) |
147 | enum dma_data_direction dir) | 79 | return NULL; |
148 | { | ||
149 | __dma_sync_single(dev, dma_handle, size, dir); | ||
150 | debug_dma_sync_single_for_device(dev, dma_handle, size, dir); | ||
151 | } | ||
152 | 80 | ||
153 | static inline void dma_sync_single_range_for_cpu(struct device *dev, | 81 | memory = ops->alloc_coherent(dev, size, dma_handle, gfp); |
154 | dma_addr_t dma_handle, | 82 | debug_dma_alloc_coherent(dev, size, *dma_handle, memory); |
155 | unsigned long offset, | ||
156 | size_t size, | ||
157 | enum dma_data_direction direction) | ||
158 | { | ||
159 | dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); | ||
160 | debug_dma_sync_single_range_for_cpu(dev, dma_handle, | ||
161 | offset, size, direction); | ||
162 | } | ||
163 | 83 | ||
164 | static inline void dma_sync_single_range_for_device(struct device *dev, | 84 | return memory; |
165 | dma_addr_t dma_handle, | ||
166 | unsigned long offset, | ||
167 | size_t size, | ||
168 | enum dma_data_direction direction) | ||
169 | { | ||
170 | dma_sync_single_for_device(dev, dma_handle+offset, size, direction); | ||
171 | debug_dma_sync_single_range_for_device(dev, dma_handle, | ||
172 | offset, size, direction); | ||
173 | } | 85 | } |
174 | 86 | ||
175 | 87 | static inline void dma_free_coherent(struct device *dev, size_t size, | |
176 | static inline void dma_sync_sg_for_cpu(struct device *dev, | 88 | void *vaddr, dma_addr_t dma_handle) |
177 | struct scatterlist *sg, int nelems, | ||
178 | enum dma_data_direction dir) | ||
179 | { | 89 | { |
180 | __dma_sync_sg(dev, sg, nelems, dir); | 90 | struct dma_map_ops *ops = get_dma_ops(dev); |
181 | debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); | ||
182 | } | ||
183 | 91 | ||
184 | static inline void dma_sync_sg_for_device(struct device *dev, | 92 | WARN_ON(irqs_disabled()); /* for portability */ |
185 | struct scatterlist *sg, int nelems, | ||
186 | enum dma_data_direction dir) | ||
187 | { | ||
188 | __dma_sync_sg(dev, sg, nelems, dir); | ||
189 | debug_dma_sync_sg_for_device(dev, sg, nelems, dir); | ||
190 | } | ||
191 | 93 | ||
192 | static inline int dma_get_cache_alignment(void) | 94 | if (dma_release_from_coherent(dev, get_order(size), vaddr)) |
193 | { | 95 | return; |
194 | /* | ||
195 | * Each processor family will define its own L1_CACHE_SHIFT, | ||
196 | * L1_CACHE_BYTES wraps to this, so this is always safe. | ||
197 | */ | ||
198 | return L1_CACHE_BYTES; | ||
199 | } | ||
200 | 96 | ||
201 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | 97 | debug_dma_free_coherent(dev, size, vaddr, dma_handle); |
202 | { | 98 | if (ops->free_coherent) |
203 | return dma_addr == 0; | 99 | ops->free_coherent(dev, size, vaddr, dma_handle); |
204 | } | 100 | } |
205 | 101 | ||
206 | #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY | 102 | /* arch/sh/mm/consistent.c */ |
207 | 103 | extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, | |
208 | extern int | 104 | dma_addr_t *dma_addr, gfp_t flag); |
209 | dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | 105 | extern void dma_generic_free_coherent(struct device *dev, size_t size, |
210 | dma_addr_t device_addr, size_t size, int flags); | 106 | void *vaddr, dma_addr_t dma_handle); |
211 | |||
212 | extern void | ||
213 | dma_release_declared_memory(struct device *dev); | ||
214 | |||
215 | extern void * | ||
216 | dma_mark_declared_memory_occupied(struct device *dev, | ||
217 | dma_addr_t device_addr, size_t size); | ||
218 | 107 | ||
219 | #endif /* __ASM_SH_DMA_MAPPING_H */ | 108 | #endif /* __ASM_SH_DMA_MAPPING_H */ |
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h index ced6795891a..bdccbbfdc0b 100644 --- a/arch/sh/include/asm/dwarf.h +++ b/arch/sh/include/asm/dwarf.h | |||
@@ -194,6 +194,12 @@ | |||
194 | #define DWARF_ARCH_RA_REG 17 | 194 | #define DWARF_ARCH_RA_REG 17 |
195 | 195 | ||
196 | #ifndef __ASSEMBLY__ | 196 | #ifndef __ASSEMBLY__ |
197 | |||
198 | #include <linux/compiler.h> | ||
199 | #include <linux/bug.h> | ||
200 | #include <linux/list.h> | ||
201 | #include <linux/module.h> | ||
202 | |||
197 | /* | 203 | /* |
198 | * Read either the frame pointer (r14) or the stack pointer (r15). | 204 | * Read either the frame pointer (r14) or the stack pointer (r15). |
199 | * NOTE: this MUST be inlined. | 205 | * NOTE: this MUST be inlined. |
@@ -241,6 +247,12 @@ struct dwarf_cie { | |||
241 | 247 | ||
242 | unsigned long flags; | 248 | unsigned long flags; |
243 | #define DWARF_CIE_Z_AUGMENTATION (1 << 0) | 249 | #define DWARF_CIE_Z_AUGMENTATION (1 << 0) |
250 | |||
251 | /* | ||
252 | * 'mod' will be non-NULL if this CIE came from a module's | ||
253 | * .eh_frame section. | ||
254 | */ | ||
255 | struct module *mod; | ||
244 | }; | 256 | }; |
245 | 257 | ||
246 | /** | 258 | /** |
@@ -255,6 +267,12 @@ struct dwarf_fde { | |||
255 | unsigned char *instructions; | 267 | unsigned char *instructions; |
256 | unsigned char *end; | 268 | unsigned char *end; |
257 | struct list_head link; | 269 | struct list_head link; |
270 | |||
271 | /* | ||
272 | * 'mod' will be non-NULL if this FDE came from a module's | ||
273 | * .eh_frame section. | ||
274 | */ | ||
275 | struct module *mod; | ||
258 | }; | 276 | }; |
259 | 277 | ||
260 | /** | 278 | /** |
@@ -364,6 +382,12 @@ static inline unsigned int DW_CFA_operand(unsigned long insn) | |||
364 | 382 | ||
365 | extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, | 383 | extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, |
366 | struct dwarf_frame *); | 384 | struct dwarf_frame *); |
385 | extern void dwarf_free_frame(struct dwarf_frame *); | ||
386 | |||
387 | extern int module_dwarf_finalize(const Elf_Ehdr *, const Elf_Shdr *, | ||
388 | struct module *); | ||
389 | extern void module_dwarf_cleanup(struct module *); | ||
390 | |||
367 | #endif /* !__ASSEMBLY__ */ | 391 | #endif /* !__ASSEMBLY__ */ |
368 | 392 | ||
369 | #define CFI_STARTPROC .cfi_startproc | 393 | #define CFI_STARTPROC .cfi_startproc |
@@ -391,6 +415,10 @@ extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, | |||
391 | static inline void dwarf_unwinder_init(void) | 415 | static inline void dwarf_unwinder_init(void) |
392 | { | 416 | { |
393 | } | 417 | } |
418 | |||
419 | #define module_dwarf_finalize(hdr, sechdrs, me) (0) | ||
420 | #define module_dwarf_cleanup(mod) do { } while (0) | ||
421 | |||
394 | #endif | 422 | #endif |
395 | 423 | ||
396 | #endif /* CONFIG_DWARF_UNWINDER */ | 424 | #endif /* CONFIG_DWARF_UNWINDER */ |
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h index 721fcc4d5e9..5ac1e40a511 100644 --- a/arch/sh/include/asm/fixmap.h +++ b/arch/sh/include/asm/fixmap.h | |||
@@ -14,9 +14,9 @@ | |||
14 | #define _ASM_FIXMAP_H | 14 | #define _ASM_FIXMAP_H |
15 | 15 | ||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/threads.h> | ||
17 | #include <asm/page.h> | 18 | #include <asm/page.h> |
18 | #ifdef CONFIG_HIGHMEM | 19 | #ifdef CONFIG_HIGHMEM |
19 | #include <linux/threads.h> | ||
20 | #include <asm/kmap_types.h> | 20 | #include <asm/kmap_types.h> |
21 | #endif | 21 | #endif |
22 | 22 | ||
@@ -46,9 +46,15 @@ | |||
46 | * fix-mapped? | 46 | * fix-mapped? |
47 | */ | 47 | */ |
48 | enum fixed_addresses { | 48 | enum fixed_addresses { |
49 | #define FIX_N_COLOURS 16 | 49 | /* |
50 | * The FIX_CMAP entries are used by kmap_coherent() to get virtual | ||
51 | * addresses which are of a known color, and so their values are | ||
52 | * important. __fix_to_virt(FIX_CMAP_END - n) must give an address | ||
53 | * which is the same color as a page (n<<PAGE_SHIFT). | ||
54 | */ | ||
55 | #define FIX_N_COLOURS 8 | ||
50 | FIX_CMAP_BEGIN, | 56 | FIX_CMAP_BEGIN, |
51 | FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, | 57 | FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1, |
52 | FIX_UNCACHED, | 58 | FIX_UNCACHED, |
53 | #ifdef CONFIG_HIGHMEM | 59 | #ifdef CONFIG_HIGHMEM |
54 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | 60 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ |
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h index 1d3aee04b5c..fb6bbb9b1cc 100644 --- a/arch/sh/include/asm/fpu.h +++ b/arch/sh/include/asm/fpu.h | |||
@@ -18,16 +18,15 @@ static inline void grab_fpu(struct pt_regs *regs) | |||
18 | 18 | ||
19 | struct task_struct; | 19 | struct task_struct; |
20 | 20 | ||
21 | extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); | 21 | extern void save_fpu(struct task_struct *__tsk); |
22 | void fpu_state_restore(struct pt_regs *regs); | ||
22 | #else | 23 | #else |
23 | 24 | ||
25 | #define save_fpu(tsk) do { } while (0) | ||
24 | #define release_fpu(regs) do { } while (0) | 26 | #define release_fpu(regs) do { } while (0) |
25 | #define grab_fpu(regs) do { } while (0) | 27 | #define grab_fpu(regs) do { } while (0) |
28 | #define fpu_state_restore(regs) do { } while (0) | ||
26 | 29 | ||
27 | static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs) | ||
28 | { | ||
29 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); | ||
30 | } | ||
31 | #endif | 30 | #endif |
32 | 31 | ||
33 | struct user_regset; | 32 | struct user_regset; |
@@ -39,19 +38,28 @@ extern int fpregs_get(struct task_struct *target, | |||
39 | unsigned int pos, unsigned int count, | 38 | unsigned int pos, unsigned int count, |
40 | void *kbuf, void __user *ubuf); | 39 | void *kbuf, void __user *ubuf); |
41 | 40 | ||
41 | static inline void __unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) | ||
42 | { | ||
43 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | ||
44 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | ||
45 | save_fpu(tsk); | ||
46 | release_fpu(regs); | ||
47 | } else | ||
48 | tsk->fpu_counter = 0; | ||
49 | } | ||
50 | |||
42 | static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) | 51 | static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) |
43 | { | 52 | { |
44 | preempt_disable(); | 53 | preempt_disable(); |
45 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) | 54 | __unlazy_fpu(tsk, regs); |
46 | save_fpu(tsk, regs); | ||
47 | preempt_enable(); | 55 | preempt_enable(); |
48 | } | 56 | } |
49 | 57 | ||
50 | static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) | 58 | static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) |
51 | { | 59 | { |
52 | preempt_disable(); | 60 | preempt_disable(); |
53 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { | 61 | if (task_thread_info(tsk)->status & TS_USEDFPU) { |
54 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); | 62 | task_thread_info(tsk)->status &= ~TS_USEDFPU; |
55 | release_fpu(regs); | 63 | release_fpu(regs); |
56 | } | 64 | } |
57 | preempt_enable(); | 65 | preempt_enable(); |
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h index 12f3a31f20a..13e9966464c 100644 --- a/arch/sh/include/asm/ftrace.h +++ b/arch/sh/include/asm/ftrace.h | |||
@@ -35,4 +35,21 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) | |||
35 | #endif /* __ASSEMBLY__ */ | 35 | #endif /* __ASSEMBLY__ */ |
36 | #endif /* CONFIG_FUNCTION_TRACER */ | 36 | #endif /* CONFIG_FUNCTION_TRACER */ |
37 | 37 | ||
38 | #ifndef __ASSEMBLY__ | ||
39 | |||
40 | /* arch/sh/kernel/return_address.c */ | ||
41 | extern void *return_address(unsigned int); | ||
42 | |||
43 | #define HAVE_ARCH_CALLER_ADDR | ||
44 | |||
45 | #define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0)) | ||
46 | #define CALLER_ADDR1 ((unsigned long)return_address(1)) | ||
47 | #define CALLER_ADDR2 ((unsigned long)return_address(2)) | ||
48 | #define CALLER_ADDR3 ((unsigned long)return_address(3)) | ||
49 | #define CALLER_ADDR4 ((unsigned long)return_address(4)) | ||
50 | #define CALLER_ADDR5 ((unsigned long)return_address(5)) | ||
51 | #define CALLER_ADDR6 ((unsigned long)return_address(6)) | ||
52 | |||
53 | #endif /* __ASSEMBLY__ */ | ||
54 | |||
38 | #endif /* __ASM_SH_FTRACE_H */ | 55 | #endif /* __ASM_SH_FTRACE_H */ |
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h index 61f93da2c62..f8d9a731e90 100644 --- a/arch/sh/include/asm/gpio.h +++ b/arch/sh/include/asm/gpio.h | |||
@@ -20,7 +20,7 @@ | |||
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | #define ARCH_NR_GPIOS 512 | 22 | #define ARCH_NR_GPIOS 512 |
23 | #include <asm-generic/gpio.h> | 23 | #include <linux/sh_pfc.h> |
24 | 24 | ||
25 | #ifdef CONFIG_GPIOLIB | 25 | #ifdef CONFIG_GPIOLIB |
26 | 26 | ||
@@ -53,84 +53,4 @@ static inline int irq_to_gpio(unsigned int irq) | |||
53 | 53 | ||
54 | #endif /* CONFIG_GPIOLIB */ | 54 | #endif /* CONFIG_GPIOLIB */ |
55 | 55 | ||
56 | typedef unsigned short pinmux_enum_t; | ||
57 | typedef unsigned short pinmux_flag_t; | ||
58 | |||
59 | #define PINMUX_TYPE_NONE 0 | ||
60 | #define PINMUX_TYPE_FUNCTION 1 | ||
61 | #define PINMUX_TYPE_GPIO 2 | ||
62 | #define PINMUX_TYPE_OUTPUT 3 | ||
63 | #define PINMUX_TYPE_INPUT 4 | ||
64 | #define PINMUX_TYPE_INPUT_PULLUP 5 | ||
65 | #define PINMUX_TYPE_INPUT_PULLDOWN 6 | ||
66 | |||
67 | #define PINMUX_FLAG_TYPE (0x7) | ||
68 | #define PINMUX_FLAG_WANT_PULLUP (1 << 3) | ||
69 | #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4) | ||
70 | |||
71 | #define PINMUX_FLAG_DBIT_SHIFT 5 | ||
72 | #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT) | ||
73 | #define PINMUX_FLAG_DREG_SHIFT 10 | ||
74 | #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT) | ||
75 | |||
76 | struct pinmux_gpio { | ||
77 | pinmux_enum_t enum_id; | ||
78 | pinmux_flag_t flags; | ||
79 | }; | ||
80 | |||
81 | #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark } | ||
82 | #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 | ||
83 | |||
84 | struct pinmux_cfg_reg { | ||
85 | unsigned long reg, reg_width, field_width; | ||
86 | unsigned long *cnt; | ||
87 | pinmux_enum_t *enum_ids; | ||
88 | }; | ||
89 | |||
90 | #define PINMUX_CFG_REG(name, r, r_width, f_width) \ | ||
91 | .reg = r, .reg_width = r_width, .field_width = f_width, \ | ||
92 | .cnt = (unsigned long [r_width / f_width]) {}, \ | ||
93 | .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \ | ||
94 | |||
95 | struct pinmux_data_reg { | ||
96 | unsigned long reg, reg_width, reg_shadow; | ||
97 | pinmux_enum_t *enum_ids; | ||
98 | }; | ||
99 | |||
100 | #define PINMUX_DATA_REG(name, r, r_width) \ | ||
101 | .reg = r, .reg_width = r_width, \ | ||
102 | .enum_ids = (pinmux_enum_t [r_width]) \ | ||
103 | |||
104 | struct pinmux_range { | ||
105 | pinmux_enum_t begin; | ||
106 | pinmux_enum_t end; | ||
107 | pinmux_enum_t force; | ||
108 | }; | ||
109 | |||
110 | struct pinmux_info { | ||
111 | char *name; | ||
112 | pinmux_enum_t reserved_id; | ||
113 | struct pinmux_range data; | ||
114 | struct pinmux_range input; | ||
115 | struct pinmux_range input_pd; | ||
116 | struct pinmux_range input_pu; | ||
117 | struct pinmux_range output; | ||
118 | struct pinmux_range mark; | ||
119 | struct pinmux_range function; | ||
120 | |||
121 | unsigned first_gpio, last_gpio; | ||
122 | |||
123 | struct pinmux_gpio *gpios; | ||
124 | struct pinmux_cfg_reg *cfg_regs; | ||
125 | struct pinmux_data_reg *data_regs; | ||
126 | |||
127 | pinmux_enum_t *gpio_data; | ||
128 | unsigned int gpio_data_size; | ||
129 | |||
130 | unsigned long *gpio_in_use; | ||
131 | struct gpio_chip chip; | ||
132 | }; | ||
133 | |||
134 | int register_pinmux(struct pinmux_info *pip); | ||
135 | |||
136 | #endif /* __ASM_SH_GPIO_H */ | 56 | #endif /* __ASM_SH_GPIO_H */ |
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h index a5be4afa790..48b191313a9 100644 --- a/arch/sh/include/asm/hardirq.h +++ b/arch/sh/include/asm/hardirq.h | |||
@@ -1,9 +1,16 @@ | |||
1 | #ifndef __ASM_SH_HARDIRQ_H | 1 | #ifndef __ASM_SH_HARDIRQ_H |
2 | #define __ASM_SH_HARDIRQ_H | 2 | #define __ASM_SH_HARDIRQ_H |
3 | 3 | ||
4 | extern void ack_bad_irq(unsigned int irq); | 4 | #include <linux/threads.h> |
5 | #define ack_bad_irq ack_bad_irq | 5 | #include <linux/irq.h> |
6 | |||
7 | typedef struct { | ||
8 | unsigned int __softirq_pending; | ||
9 | unsigned int __nmi_count; /* arch dependent */ | ||
10 | } ____cacheline_aligned irq_cpustat_t; | ||
6 | 11 | ||
7 | #include <asm-generic/hardirq.h> | 12 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ |
13 | |||
14 | extern void ack_bad_irq(unsigned int irq); | ||
8 | 15 | ||
9 | #endif /* __ASM_SH_HARDIRQ_H */ | 16 | #endif /* __ASM_SH_HARDIRQ_H */ |
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 5be45ea4dfe..512cd3e9d0c 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
@@ -90,15 +90,11 @@ | |||
90 | #define ctrl_outl __raw_writel | 90 | #define ctrl_outl __raw_writel |
91 | #define ctrl_outq __raw_writeq | 91 | #define ctrl_outq __raw_writeq |
92 | 92 | ||
93 | extern unsigned long generic_io_base; | ||
94 | |||
93 | static inline void ctrl_delay(void) | 95 | static inline void ctrl_delay(void) |
94 | { | 96 | { |
95 | #ifdef CONFIG_CPU_SH4 | 97 | __raw_readw(generic_io_base); |
96 | __raw_readw(CCN_PVR); | ||
97 | #elif defined(P2SEG) | ||
98 | __raw_readw(P2SEG); | ||
99 | #else | ||
100 | #error "Need a dummy address for delay" | ||
101 | #endif | ||
102 | } | 98 | } |
103 | 99 | ||
104 | #define __BUILD_MEMORY_STRING(bwlq, type) \ | 100 | #define __BUILD_MEMORY_STRING(bwlq, type) \ |
@@ -186,8 +182,6 @@ __BUILD_MEMORY_STRING(q, u64) | |||
186 | 182 | ||
187 | #define IO_SPACE_LIMIT 0xffffffff | 183 | #define IO_SPACE_LIMIT 0xffffffff |
188 | 184 | ||
189 | extern unsigned long generic_io_base; | ||
190 | |||
191 | /* | 185 | /* |
192 | * This function provides a method for the generic case where a | 186 | * This function provides a method for the generic case where a |
193 | * board-specific ioport_map simply needs to return the port + some | 187 | * board-specific ioport_map simply needs to return the port + some |
@@ -246,7 +240,7 @@ void __iounmap(void __iomem *addr); | |||
246 | static inline void __iomem * | 240 | static inline void __iomem * |
247 | __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) | 241 | __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) |
248 | { | 242 | { |
249 | #if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) | 243 | #if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) |
250 | unsigned long last_addr = offset + size - 1; | 244 | unsigned long last_addr = offset + size - 1; |
251 | #endif | 245 | #endif |
252 | void __iomem *ret; | 246 | void __iomem *ret; |
@@ -255,7 +249,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) | |||
255 | if (ret) | 249 | if (ret) |
256 | return ret; | 250 | return ret; |
257 | 251 | ||
258 | #if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) | 252 | #if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) |
259 | /* | 253 | /* |
260 | * For P1 and P2 space this is trivial, as everything is already | 254 | * For P1 and P2 space this is trivial, as everything is already |
261 | * mapped. Uncached access for P1 addresses are done through P2. | 255 | * mapped. Uncached access for P1 addresses are done through P2. |
diff --git a/arch/sh/include/asm/irqflags.h b/arch/sh/include/asm/irqflags.h index 46e71da5be6..a741153b41c 100644 --- a/arch/sh/include/asm/irqflags.h +++ b/arch/sh/include/asm/irqflags.h | |||
@@ -1,34 +1,9 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_H | 1 | #ifndef __ASM_SH_IRQFLAGS_H |
2 | #define __ASM_SH_IRQFLAGS_H | 2 | #define __ASM_SH_IRQFLAGS_H |
3 | 3 | ||
4 | #ifdef CONFIG_SUPERH32 | 4 | #define RAW_IRQ_DISABLED 0xf0 |
5 | #include "irqflags_32.h" | 5 | #define RAW_IRQ_ENABLED 0x00 |
6 | #else | ||
7 | #include "irqflags_64.h" | ||
8 | #endif | ||
9 | 6 | ||
10 | #define raw_local_save_flags(flags) \ | 7 | #include <asm-generic/irqflags.h> |
11 | do { (flags) = __raw_local_save_flags(); } while (0) | ||
12 | |||
13 | static inline int raw_irqs_disabled_flags(unsigned long flags) | ||
14 | { | ||
15 | return (flags != 0); | ||
16 | } | ||
17 | |||
18 | static inline int raw_irqs_disabled(void) | ||
19 | { | ||
20 | unsigned long flags = __raw_local_save_flags(); | ||
21 | |||
22 | return raw_irqs_disabled_flags(flags); | ||
23 | } | ||
24 | |||
25 | #define raw_local_irq_save(flags) \ | ||
26 | do { (flags) = __raw_local_irq_save(); } while (0) | ||
27 | |||
28 | static inline void raw_local_irq_restore(unsigned long flags) | ||
29 | { | ||
30 | if ((flags & 0xf0) != 0xf0) | ||
31 | raw_local_irq_enable(); | ||
32 | } | ||
33 | 8 | ||
34 | #endif /* __ASM_SH_IRQFLAGS_H */ | 9 | #endif /* __ASM_SH_IRQFLAGS_H */ |
diff --git a/arch/sh/include/asm/irqflags_32.h b/arch/sh/include/asm/irqflags_32.h deleted file mode 100644 index 60218f54134..00000000000 --- a/arch/sh/include/asm/irqflags_32.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_32_H | ||
2 | #define __ASM_SH_IRQFLAGS_32_H | ||
3 | |||
4 | static inline void raw_local_irq_enable(void) | ||
5 | { | ||
6 | unsigned long __dummy0, __dummy1; | ||
7 | |||
8 | __asm__ __volatile__ ( | ||
9 | "stc sr, %0\n\t" | ||
10 | "and %1, %0\n\t" | ||
11 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
12 | "stc r6_bank, %1\n\t" | ||
13 | "or %1, %0\n\t" | ||
14 | #endif | ||
15 | "ldc %0, sr\n\t" | ||
16 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
17 | : "1" (~0x000000f0) | ||
18 | : "memory" | ||
19 | ); | ||
20 | } | ||
21 | |||
22 | static inline void raw_local_irq_disable(void) | ||
23 | { | ||
24 | unsigned long flags; | ||
25 | |||
26 | __asm__ __volatile__ ( | ||
27 | "stc sr, %0\n\t" | ||
28 | "or #0xf0, %0\n\t" | ||
29 | "ldc %0, sr\n\t" | ||
30 | : "=&z" (flags) | ||
31 | : /* no inputs */ | ||
32 | : "memory" | ||
33 | ); | ||
34 | } | ||
35 | |||
36 | static inline void set_bl_bit(void) | ||
37 | { | ||
38 | unsigned long __dummy0, __dummy1; | ||
39 | |||
40 | __asm__ __volatile__ ( | ||
41 | "stc sr, %0\n\t" | ||
42 | "or %2, %0\n\t" | ||
43 | "and %3, %0\n\t" | ||
44 | "ldc %0, sr\n\t" | ||
45 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
46 | : "r" (0x10000000), "r" (0xffffff0f) | ||
47 | : "memory" | ||
48 | ); | ||
49 | } | ||
50 | |||
51 | static inline void clear_bl_bit(void) | ||
52 | { | ||
53 | unsigned long __dummy0, __dummy1; | ||
54 | |||
55 | __asm__ __volatile__ ( | ||
56 | "stc sr, %0\n\t" | ||
57 | "and %2, %0\n\t" | ||
58 | "ldc %0, sr\n\t" | ||
59 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
60 | : "1" (~0x10000000) | ||
61 | : "memory" | ||
62 | ); | ||
63 | } | ||
64 | |||
65 | static inline unsigned long __raw_local_save_flags(void) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | __asm__ __volatile__ ( | ||
70 | "stc sr, %0\n\t" | ||
71 | "and #0xf0, %0\n\t" | ||
72 | : "=&z" (flags) | ||
73 | : /* no inputs */ | ||
74 | : "memory" | ||
75 | ); | ||
76 | |||
77 | return flags; | ||
78 | } | ||
79 | |||
80 | static inline unsigned long __raw_local_irq_save(void) | ||
81 | { | ||
82 | unsigned long flags, __dummy; | ||
83 | |||
84 | __asm__ __volatile__ ( | ||
85 | "stc sr, %1\n\t" | ||
86 | "mov %1, %0\n\t" | ||
87 | "or #0xf0, %0\n\t" | ||
88 | "ldc %0, sr\n\t" | ||
89 | "mov %1, %0\n\t" | ||
90 | "and #0xf0, %0\n\t" | ||
91 | : "=&z" (flags), "=&r" (__dummy) | ||
92 | : /* no inputs */ | ||
93 | : "memory" | ||
94 | ); | ||
95 | |||
96 | return flags; | ||
97 | } | ||
98 | |||
99 | #endif /* __ASM_SH_IRQFLAGS_32_H */ | ||
diff --git a/arch/sh/include/asm/irqflags_64.h b/arch/sh/include/asm/irqflags_64.h deleted file mode 100644 index 88f65222c1d..00000000000 --- a/arch/sh/include/asm/irqflags_64.h +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_64_H | ||
2 | #define __ASM_SH_IRQFLAGS_64_H | ||
3 | |||
4 | #include <cpu/registers.h> | ||
5 | |||
6 | #define SR_MASK_LL 0x00000000000000f0LL | ||
7 | #define SR_BL_LL 0x0000000010000000LL | ||
8 | |||
9 | static inline void raw_local_irq_enable(void) | ||
10 | { | ||
11 | unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL; | ||
12 | |||
13 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
14 | "and %0, %1, %0\n\t" | ||
15 | "putcon %0, " __SR "\n\t" | ||
16 | : "=&r" (__dummy0) | ||
17 | : "r" (__dummy1)); | ||
18 | } | ||
19 | |||
20 | static inline void raw_local_irq_disable(void) | ||
21 | { | ||
22 | unsigned long long __dummy0, __dummy1 = SR_MASK_LL; | ||
23 | |||
24 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
25 | "or %0, %1, %0\n\t" | ||
26 | "putcon %0, " __SR "\n\t" | ||
27 | : "=&r" (__dummy0) | ||
28 | : "r" (__dummy1)); | ||
29 | } | ||
30 | |||
31 | static inline void set_bl_bit(void) | ||
32 | { | ||
33 | unsigned long long __dummy0, __dummy1 = SR_BL_LL; | ||
34 | |||
35 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
36 | "or %0, %1, %0\n\t" | ||
37 | "putcon %0, " __SR "\n\t" | ||
38 | : "=&r" (__dummy0) | ||
39 | : "r" (__dummy1)); | ||
40 | |||
41 | } | ||
42 | |||
43 | static inline void clear_bl_bit(void) | ||
44 | { | ||
45 | unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; | ||
46 | |||
47 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
48 | "and %0, %1, %0\n\t" | ||
49 | "putcon %0, " __SR "\n\t" | ||
50 | : "=&r" (__dummy0) | ||
51 | : "r" (__dummy1)); | ||
52 | } | ||
53 | |||
54 | static inline unsigned long __raw_local_save_flags(void) | ||
55 | { | ||
56 | unsigned long long __dummy = SR_MASK_LL; | ||
57 | unsigned long flags; | ||
58 | |||
59 | __asm__ __volatile__ ( | ||
60 | "getcon " __SR ", %0\n\t" | ||
61 | "and %0, %1, %0" | ||
62 | : "=&r" (flags) | ||
63 | : "r" (__dummy)); | ||
64 | |||
65 | return flags; | ||
66 | } | ||
67 | |||
68 | static inline unsigned long __raw_local_irq_save(void) | ||
69 | { | ||
70 | unsigned long long __dummy0, __dummy1 = SR_MASK_LL; | ||
71 | unsigned long flags; | ||
72 | |||
73 | __asm__ __volatile__ ( | ||
74 | "getcon " __SR ", %1\n\t" | ||
75 | "or %1, r63, %0\n\t" | ||
76 | "or %1, %2, %1\n\t" | ||
77 | "putcon %1, " __SR "\n\t" | ||
78 | "and %0, %2, %0" | ||
79 | : "=&r" (flags), "=&r" (__dummy0) | ||
80 | : "r" (__dummy1)); | ||
81 | |||
82 | return flags; | ||
83 | } | ||
84 | |||
85 | #endif /* __ASM_SH_IRQFLAGS_64_H */ | ||
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h index f5963037c9d..c7426ad9926 100644 --- a/arch/sh/include/asm/mmu.h +++ b/arch/sh/include/asm/mmu.h | |||
@@ -7,12 +7,16 @@ | |||
7 | #define PMB_PASCR 0xff000070 | 7 | #define PMB_PASCR 0xff000070 |
8 | #define PMB_IRMCR 0xff000078 | 8 | #define PMB_IRMCR 0xff000078 |
9 | 9 | ||
10 | #define PASCR_SE 0x80000000 | ||
11 | |||
10 | #define PMB_ADDR 0xf6100000 | 12 | #define PMB_ADDR 0xf6100000 |
11 | #define PMB_DATA 0xf7100000 | 13 | #define PMB_DATA 0xf7100000 |
12 | #define PMB_ENTRY_MAX 16 | 14 | #define PMB_ENTRY_MAX 16 |
13 | #define PMB_E_MASK 0x0000000f | 15 | #define PMB_E_MASK 0x0000000f |
14 | #define PMB_E_SHIFT 8 | 16 | #define PMB_E_SHIFT 8 |
15 | 17 | ||
18 | #define PMB_PFN_MASK 0xff000000 | ||
19 | |||
16 | #define PMB_SZ_16M 0x00000000 | 20 | #define PMB_SZ_16M 0x00000000 |
17 | #define PMB_SZ_64M 0x00000010 | 21 | #define PMB_SZ_64M 0x00000010 |
18 | #define PMB_SZ_128M 0x00000080 | 22 | #define PMB_SZ_128M 0x00000080 |
@@ -62,17 +66,10 @@ struct pmb_entry { | |||
62 | }; | 66 | }; |
63 | 67 | ||
64 | /* arch/sh/mm/pmb.c */ | 68 | /* arch/sh/mm/pmb.c */ |
65 | int __set_pmb_entry(unsigned long vpn, unsigned long ppn, | ||
66 | unsigned long flags, int *entry); | ||
67 | int set_pmb_entry(struct pmb_entry *pmbe); | ||
68 | void clear_pmb_entry(struct pmb_entry *pmbe); | ||
69 | struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, | ||
70 | unsigned long flags); | ||
71 | void pmb_free(struct pmb_entry *pmbe); | ||
72 | long pmb_remap(unsigned long virt, unsigned long phys, | 69 | long pmb_remap(unsigned long virt, unsigned long phys, |
73 | unsigned long size, unsigned long flags); | 70 | unsigned long size, unsigned long flags); |
74 | void pmb_unmap(unsigned long addr); | 71 | void pmb_unmap(unsigned long addr); |
72 | int pmb_init(void); | ||
75 | #endif /* __ASSEMBLY__ */ | 73 | #endif /* __ASSEMBLY__ */ |
76 | 74 | ||
77 | #endif /* __MMU_H */ | 75 | #endif /* __MMU_H */ |
78 | |||
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index 4163950cd1c..67f3999b544 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h | |||
@@ -3,8 +3,6 @@ | |||
3 | 3 | ||
4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
5 | 5 | ||
6 | #include <linux/dma-mapping.h> | ||
7 | |||
8 | /* Can be used to override the logic in pci_scan_bus for skipping | 6 | /* Can be used to override the logic in pci_scan_bus for skipping |
9 | already-configured bus numbers - to be used for buggy BIOSes | 7 | already-configured bus numbers - to be used for buggy BIOSes |
10 | or architectures with incomplete PCI setup by the loader */ | 8 | or architectures with incomplete PCI setup by the loader */ |
@@ -54,30 +52,18 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) | |||
54 | * address space. The networking and block device layers use | 52 | * address space. The networking and block device layers use |
55 | * this boolean for bounce buffer decisions. | 53 | * this boolean for bounce buffer decisions. |
56 | */ | 54 | */ |
57 | #define PCI_DMA_BUS_IS_PHYS (1) | 55 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) |
58 | |||
59 | #include <linux/types.h> | ||
60 | #include <linux/slab.h> | ||
61 | #include <asm/scatterlist.h> | ||
62 | #include <linux/string.h> | ||
63 | #include <asm/io.h> | ||
64 | 56 | ||
65 | /* pci_unmap_{single,page} being a nop depends upon the | 57 | /* pci_unmap_{single,page} being a nop depends upon the |
66 | * configuration. | 58 | * configuration. |
67 | */ | 59 | */ |
68 | #ifdef CONFIG_SH_PCIDMA_NONCOHERENT | 60 | #ifdef CONFIG_DMA_NONCOHERENT |
69 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | 61 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; |
70 | dma_addr_t ADDR_NAME; | 62 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; |
71 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | 63 | #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
72 | __u32 LEN_NAME; | 64 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
73 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | 65 | #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
74 | ((PTR)->ADDR_NAME) | 66 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
75 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | ||
76 | (((PTR)->ADDR_NAME) = (VAL)) | ||
77 | #define pci_unmap_len(PTR, LEN_NAME) \ | ||
78 | ((PTR)->LEN_NAME) | ||
79 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
80 | (((PTR)->LEN_NAME) = (VAL)) | ||
81 | #else | 67 | #else |
82 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | 68 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) |
83 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | 69 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) |
diff --git a/arch/sh/include/asm/perf_event.h b/arch/sh/include/asm/perf_event.h index 11a302297ab..3d0c9f36d15 100644 --- a/arch/sh/include/asm/perf_event.h +++ b/arch/sh/include/asm/perf_event.h | |||
@@ -1,8 +1,35 @@ | |||
1 | #ifndef __ASM_SH_PERF_EVENT_H | 1 | #ifndef __ASM_SH_PERF_EVENT_H |
2 | #define __ASM_SH_PERF_EVENT_H | 2 | #define __ASM_SH_PERF_EVENT_H |
3 | 3 | ||
4 | /* SH only supports software events through this interface. */ | 4 | struct hw_perf_event; |
5 | static inline void set_perf_event_pending(void) {} | 5 | |
6 | #define MAX_HWEVENTS 2 | ||
7 | |||
8 | struct sh_pmu { | ||
9 | const char *name; | ||
10 | unsigned int num_events; | ||
11 | void (*disable_all)(void); | ||
12 | void (*enable_all)(void); | ||
13 | void (*enable)(struct hw_perf_event *, int); | ||
14 | void (*disable)(struct hw_perf_event *, int); | ||
15 | u64 (*read)(int); | ||
16 | int (*event_map)(int); | ||
17 | unsigned int max_events; | ||
18 | unsigned long raw_event_mask; | ||
19 | const int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] | ||
20 | [PERF_COUNT_HW_CACHE_OP_MAX] | ||
21 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; | ||
22 | }; | ||
23 | |||
24 | /* arch/sh/kernel/perf_event.c */ | ||
25 | extern int register_sh_pmu(struct sh_pmu *); | ||
26 | extern int reserve_pmc_hardware(void); | ||
27 | extern void release_pmc_hardware(void); | ||
28 | |||
29 | static inline void set_perf_event_pending(void) | ||
30 | { | ||
31 | /* Nothing to see here, move along. */ | ||
32 | } | ||
6 | 33 | ||
7 | #define PERF_EVENT_INDEX_OFFSET 0 | 34 | #define PERF_EVENT_INDEX_OFFSET 0 |
8 | 35 | ||
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index 4f3efa7d5a6..ba3046e4f06 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h | |||
@@ -75,13 +75,31 @@ static inline unsigned long long neff_sign_extend(unsigned long val) | |||
75 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) | 75 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) |
76 | #define FIRST_USER_ADDRESS 0 | 76 | #define FIRST_USER_ADDRESS 0 |
77 | 77 | ||
78 | #ifdef CONFIG_32BIT | 78 | #define PHYS_ADDR_MASK29 0x1fffffff |
79 | #define PHYS_ADDR_MASK 0xffffffff | 79 | #define PHYS_ADDR_MASK32 0xffffffff |
80 | |||
81 | #ifdef CONFIG_PMB | ||
82 | static inline unsigned long phys_addr_mask(void) | ||
83 | { | ||
84 | /* Is the MMU in 29bit mode? */ | ||
85 | if (__in_29bit_mode()) | ||
86 | return PHYS_ADDR_MASK29; | ||
87 | |||
88 | return PHYS_ADDR_MASK32; | ||
89 | } | ||
90 | #elif defined(CONFIG_32BIT) | ||
91 | static inline unsigned long phys_addr_mask(void) | ||
92 | { | ||
93 | return PHYS_ADDR_MASK32; | ||
94 | } | ||
80 | #else | 95 | #else |
81 | #define PHYS_ADDR_MASK 0x1fffffff | 96 | static inline unsigned long phys_addr_mask(void) |
97 | { | ||
98 | return PHYS_ADDR_MASK29; | ||
99 | } | ||
82 | #endif | 100 | #endif |
83 | 101 | ||
84 | #define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) | 102 | #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) |
85 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) | 103 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) |
86 | 104 | ||
87 | #ifdef CONFIG_SUPERH32 | 105 | #ifdef CONFIG_SUPERH32 |
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h index c0d359ce337..b3543551620 100644 --- a/arch/sh/include/asm/pgtable_32.h +++ b/arch/sh/include/asm/pgtable_32.h | |||
@@ -108,7 +108,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) | |||
108 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) | 108 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) |
109 | #endif | 109 | #endif |
110 | 110 | ||
111 | #define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) | 111 | #define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS)) |
112 | 112 | ||
113 | /* Hardware flags, page size encoding */ | 113 | /* Hardware flags, page size encoding */ |
114 | #if !defined(CONFIG_MMU) | 114 | #if !defined(CONFIG_MMU) |
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index 9a8714945dc..1f3d6fab660 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
@@ -56,6 +56,7 @@ asmlinkage void __init sh_cpu_init(void); | |||
56 | #define SR_DSP 0x00001000 | 56 | #define SR_DSP 0x00001000 |
57 | #define SR_IMASK 0x000000f0 | 57 | #define SR_IMASK 0x000000f0 |
58 | #define SR_FD 0x00008000 | 58 | #define SR_FD 0x00008000 |
59 | #define SR_MD 0x40000000 | ||
59 | 60 | ||
60 | /* | 61 | /* |
61 | * DSP structure and data | 62 | * DSP structure and data |
@@ -136,7 +137,7 @@ struct mm_struct; | |||
136 | extern void release_thread(struct task_struct *); | 137 | extern void release_thread(struct task_struct *); |
137 | 138 | ||
138 | /* Prepare to copy thread state - unlazy all lazy status */ | 139 | /* Prepare to copy thread state - unlazy all lazy status */ |
139 | #define prepare_to_copy(tsk) do { } while (0) | 140 | void prepare_to_copy(struct task_struct *tsk); |
140 | 141 | ||
141 | /* | 142 | /* |
142 | * create a kernel thread without removing it from tasklists | 143 | * create a kernel thread without removing it from tasklists |
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h index 327cc2e4c97..e38d1d4c7f6 100644 --- a/arch/sh/include/asm/scatterlist.h +++ b/arch/sh/include/asm/scatterlist.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __ASM_SH_SCATTERLIST_H | 1 | #ifndef __ASM_SH_SCATTERLIST_H |
2 | #define __ASM_SH_SCATTERLIST_H | 2 | #define __ASM_SH_SCATTERLIST_H |
3 | 3 | ||
4 | #define ISA_DMA_THRESHOLD PHYS_ADDR_MASK | 4 | #define ISA_DMA_THRESHOLD phys_addr_mask() |
5 | 5 | ||
6 | #include <asm-generic/scatterlist.h> | 6 | #include <asm-generic/scatterlist.h> |
7 | 7 | ||
diff --git a/arch/sh/include/asm/sh_keysc.h b/arch/sh/include/asm/sh_keysc.h deleted file mode 100644 index 4a65b1e40ea..00000000000 --- a/arch/sh/include/asm/sh_keysc.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __ASM_KEYSC_H__ | ||
2 | #define __ASM_KEYSC_H__ | ||
3 | |||
4 | #define SH_KEYSC_MAXKEYS 30 | ||
5 | |||
6 | struct sh_keysc_info { | ||
7 | enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode; | ||
8 | int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ | ||
9 | int delay; | ||
10 | int kycr2_delay; | ||
11 | int keycodes[SH_KEYSC_MAXKEYS]; | ||
12 | }; | ||
13 | |||
14 | #endif /* __ASM_KEYSC_H__ */ | ||
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h index 5c8ea28ff7a..fe9c2a1ad04 100644 --- a/arch/sh/include/asm/suspend.h +++ b/arch/sh/include/asm/suspend.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_SH_SUSPEND_H | 2 | #define _ASM_SH_SUSPEND_H |
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/notifier.h> | ||
5 | static inline int arch_prepare_suspend(void) { return 0; } | 6 | static inline int arch_prepare_suspend(void) { return 0; } |
6 | 7 | ||
7 | #include <asm/ptrace.h> | 8 | #include <asm/ptrace.h> |
@@ -19,6 +20,69 @@ void sh_mobile_setup_cpuidle(void); | |||
19 | static inline void sh_mobile_setup_cpuidle(void) {} | 20 | static inline void sh_mobile_setup_cpuidle(void) {} |
20 | #endif | 21 | #endif |
21 | 22 | ||
23 | /* notifier chains for pre/post sleep hooks */ | ||
24 | extern struct atomic_notifier_head sh_mobile_pre_sleep_notifier_list; | ||
25 | extern struct atomic_notifier_head sh_mobile_post_sleep_notifier_list; | ||
26 | |||
27 | /* priority levels for notifiers */ | ||
28 | #define SH_MOBILE_SLEEP_BOARD 0 | ||
29 | #define SH_MOBILE_SLEEP_CPU 1 | ||
30 | #define SH_MOBILE_PRE(x) (x) | ||
31 | #define SH_MOBILE_POST(x) (-(x)) | ||
32 | |||
33 | /* board code registration function for self-refresh assembly snippets */ | ||
34 | void sh_mobile_register_self_refresh(unsigned long flags, | ||
35 | void *pre_start, void *pre_end, | ||
36 | void *post_start, void *post_end); | ||
37 | |||
38 | /* register structure for address/data information */ | ||
39 | struct sh_sleep_regs { | ||
40 | unsigned long stbcr; | ||
41 | unsigned long bar; | ||
42 | |||
43 | /* MMU */ | ||
44 | unsigned long pteh; | ||
45 | unsigned long ptel; | ||
46 | unsigned long ttb; | ||
47 | unsigned long tea; | ||
48 | unsigned long mmucr; | ||
49 | unsigned long ptea; | ||
50 | unsigned long pascr; | ||
51 | unsigned long irmcr; | ||
52 | |||
53 | /* Cache */ | ||
54 | unsigned long ccr; | ||
55 | unsigned long ramcr; | ||
56 | }; | ||
57 | |||
58 | /* data area for low-level sleep code */ | ||
59 | struct sh_sleep_data { | ||
60 | /* current sleep mode (SUSP_SH_...) */ | ||
61 | unsigned long mode; | ||
62 | |||
63 | /* addresses of board specific self-refresh snippets */ | ||
64 | unsigned long sf_pre; | ||
65 | unsigned long sf_post; | ||
66 | |||
67 | /* address of resume code */ | ||
68 | unsigned long resume; | ||
69 | |||
70 | /* register state saved and restored by the assembly code */ | ||
71 | unsigned long vbr; | ||
72 | unsigned long spc; | ||
73 | unsigned long sr; | ||
74 | unsigned long sp; | ||
75 | |||
76 | /* structure for keeping register addresses */ | ||
77 | struct sh_sleep_regs addr; | ||
78 | |||
79 | /* structure for saving/restoring register state */ | ||
80 | struct sh_sleep_regs data; | ||
81 | }; | ||
82 | |||
83 | /* a bitmap of supported sleep modes (SUSP_SH..) */ | ||
84 | extern unsigned long sh_mobile_sleep_supported; | ||
85 | |||
22 | #endif | 86 | #endif |
23 | 87 | ||
24 | /* flags passed to assembly suspend code */ | 88 | /* flags passed to assembly suspend code */ |
@@ -27,5 +91,6 @@ static inline void sh_mobile_setup_cpuidle(void) {} | |||
27 | #define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */ | 91 | #define SUSP_SH_RSTANDBY (1 << 2) /* SH-Mobile R-standby mode */ |
28 | #define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ | 92 | #define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ |
29 | #define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ | 93 | #define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ |
94 | #define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */ | ||
30 | 95 | ||
31 | #endif /* _ASM_SH_SUSPEND_H */ | 96 | #endif /* _ASM_SH_SUSPEND_H */ |
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index b5c5acdc8c0..c15415b4b16 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h | |||
@@ -171,10 +171,6 @@ BUILD_TRAP_HANDLER(fpu_error); | |||
171 | BUILD_TRAP_HANDLER(fpu_state_restore); | 171 | BUILD_TRAP_HANDLER(fpu_state_restore); |
172 | BUILD_TRAP_HANDLER(nmi); | 172 | BUILD_TRAP_HANDLER(nmi); |
173 | 173 | ||
174 | #ifdef CONFIG_BUG | ||
175 | extern void handle_BUG(struct pt_regs *); | ||
176 | #endif | ||
177 | |||
178 | #define arch_align_stack(x) (x) | 174 | #define arch_align_stack(x) (x) |
179 | 175 | ||
180 | struct mem_access { | 176 | struct mem_access { |
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index 607d413f616..06814f5b59c 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h | |||
@@ -232,4 +232,33 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, | |||
232 | unsigned long r6, unsigned long r7, | 232 | unsigned long r6, unsigned long r7, |
233 | struct pt_regs __regs); | 233 | struct pt_regs __regs); |
234 | 234 | ||
235 | static inline void set_bl_bit(void) | ||
236 | { | ||
237 | unsigned long __dummy0, __dummy1; | ||
238 | |||
239 | __asm__ __volatile__ ( | ||
240 | "stc sr, %0\n\t" | ||
241 | "or %2, %0\n\t" | ||
242 | "and %3, %0\n\t" | ||
243 | "ldc %0, sr\n\t" | ||
244 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
245 | : "r" (0x10000000), "r" (0xffffff0f) | ||
246 | : "memory" | ||
247 | ); | ||
248 | } | ||
249 | |||
250 | static inline void clear_bl_bit(void) | ||
251 | { | ||
252 | unsigned long __dummy0, __dummy1; | ||
253 | |||
254 | __asm__ __volatile__ ( | ||
255 | "stc sr, %0\n\t" | ||
256 | "and %2, %0\n\t" | ||
257 | "ldc %0, sr\n\t" | ||
258 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
259 | : "1" (~0x10000000) | ||
260 | : "memory" | ||
261 | ); | ||
262 | } | ||
263 | |||
235 | #endif /* __ASM_SH_SYSTEM_32_H */ | 264 | #endif /* __ASM_SH_SYSTEM_32_H */ |
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h index 8e4a03e7966..ab1dd917ea8 100644 --- a/arch/sh/include/asm/system_64.h +++ b/arch/sh/include/asm/system_64.h | |||
@@ -12,6 +12,7 @@ | |||
12 | * License. See the file "COPYING" in the main directory of this archive | 12 | * License. See the file "COPYING" in the main directory of this archive |
13 | * for more details. | 13 | * for more details. |
14 | */ | 14 | */ |
15 | #include <cpu/registers.h> | ||
15 | #include <asm/processor.h> | 16 | #include <asm/processor.h> |
16 | 17 | ||
17 | /* | 18 | /* |
@@ -47,4 +48,29 @@ static inline reg_size_t register_align(void *val) | |||
47 | return (unsigned long long)(signed long long)(signed long)val; | 48 | return (unsigned long long)(signed long long)(signed long)val; |
48 | } | 49 | } |
49 | 50 | ||
51 | #define SR_BL_LL 0x0000000010000000LL | ||
52 | |||
53 | static inline void set_bl_bit(void) | ||
54 | { | ||
55 | unsigned long long __dummy0, __dummy1 = SR_BL_LL; | ||
56 | |||
57 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
58 | "or %0, %1, %0\n\t" | ||
59 | "putcon %0, " __SR "\n\t" | ||
60 | : "=&r" (__dummy0) | ||
61 | : "r" (__dummy1)); | ||
62 | |||
63 | } | ||
64 | |||
65 | static inline void clear_bl_bit(void) | ||
66 | { | ||
67 | unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; | ||
68 | |||
69 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
70 | "and %0, %1, %0\n\t" | ||
71 | "putcon %0, " __SR "\n\t" | ||
72 | : "=&r" (__dummy0) | ||
73 | : "r" (__dummy1)); | ||
74 | } | ||
75 | |||
50 | #endif /* __ASM_SH_SYSTEM_64_H */ | 76 | #endif /* __ASM_SH_SYSTEM_64_H */ |
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index bdeb9d46d17..1f3d927e226 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h | |||
@@ -19,6 +19,7 @@ struct thread_info { | |||
19 | struct task_struct *task; /* main task structure */ | 19 | struct task_struct *task; /* main task structure */ |
20 | struct exec_domain *exec_domain; /* execution domain */ | 20 | struct exec_domain *exec_domain; /* execution domain */ |
21 | unsigned long flags; /* low level flags */ | 21 | unsigned long flags; /* low level flags */ |
22 | __u32 status; /* thread synchronous flags */ | ||
22 | __u32 cpu; | 23 | __u32 cpu; |
23 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | 24 | int preempt_count; /* 0 => preemptable, <0 => BUG */ |
24 | mm_segment_t addr_limit; /* thread address space */ | 25 | mm_segment_t addr_limit; /* thread address space */ |
@@ -50,6 +51,7 @@ struct thread_info { | |||
50 | .task = &tsk, \ | 51 | .task = &tsk, \ |
51 | .exec_domain = &default_exec_domain, \ | 52 | .exec_domain = &default_exec_domain, \ |
52 | .flags = 0, \ | 53 | .flags = 0, \ |
54 | .status = 0, \ | ||
53 | .cpu = 0, \ | 55 | .cpu = 0, \ |
54 | .preempt_count = INIT_PREEMPT_COUNT, \ | 56 | .preempt_count = INIT_PREEMPT_COUNT, \ |
55 | .addr_limit = KERNEL_DS, \ | 57 | .addr_limit = KERNEL_DS, \ |
@@ -111,13 +113,11 @@ extern void free_thread_info(struct thread_info *ti); | |||
111 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | 113 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ |
112 | #define TIF_SIGPENDING 1 /* signal pending */ | 114 | #define TIF_SIGPENDING 1 /* signal pending */ |
113 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | 115 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ |
114 | #define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */ | ||
115 | #define TIF_SINGLESTEP 4 /* singlestepping active */ | 116 | #define TIF_SINGLESTEP 4 /* singlestepping active */ |
116 | #define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ | 117 | #define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ |
117 | #define TIF_SECCOMP 6 /* secure computing */ | 118 | #define TIF_SECCOMP 6 /* secure computing */ |
118 | #define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ | 119 | #define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ |
119 | #define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ | 120 | #define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ |
120 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ | ||
121 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ | 121 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ |
122 | #define TIF_MEMDIE 18 | 122 | #define TIF_MEMDIE 18 |
123 | #define TIF_FREEZE 19 /* Freezing for suspend */ | 123 | #define TIF_FREEZE 19 /* Freezing for suspend */ |
@@ -125,13 +125,11 @@ extern void free_thread_info(struct thread_info *ti); | |||
125 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | 125 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) |
126 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | 126 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) |
127 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | 127 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) |
128 | #define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) | ||
129 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | 128 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) |
130 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | 129 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) |
131 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | 130 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) |
132 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) | 131 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) |
133 | #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) | 132 | #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) |
134 | #define _TIF_USEDFPU (1 << TIF_USEDFPU) | ||
135 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) | 133 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) |
136 | #define _TIF_FREEZE (1 << TIF_FREEZE) | 134 | #define _TIF_FREEZE (1 << TIF_FREEZE) |
137 | 135 | ||
@@ -149,13 +147,33 @@ extern void free_thread_info(struct thread_info *ti); | |||
149 | /* work to do on any return to u-space */ | 147 | /* work to do on any return to u-space */ |
150 | #define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ | 148 | #define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ |
151 | _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ | 149 | _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ |
152 | _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ | 150 | _TIF_SINGLESTEP | _TIF_NOTIFY_RESUME | \ |
153 | _TIF_NOTIFY_RESUME | _TIF_SYSCALL_TRACEPOINT) | 151 | _TIF_SYSCALL_TRACEPOINT) |
154 | 152 | ||
155 | /* work to do on interrupt/exception return */ | 153 | /* work to do on interrupt/exception return */ |
156 | #define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ | 154 | #define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ |
157 | _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)) | 155 | _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP)) |
158 | 156 | ||
157 | /* | ||
158 | * Thread-synchronous status. | ||
159 | * | ||
160 | * This is different from the flags in that nobody else | ||
161 | * ever touches our thread-synchronous status, so we don't | ||
162 | * have to worry about atomic accesses. | ||
163 | */ | ||
164 | #define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */ | ||
165 | #define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */ | ||
166 | |||
167 | #ifndef __ASSEMBLY__ | ||
168 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
169 | static inline void set_restore_sigmask(void) | ||
170 | { | ||
171 | struct thread_info *ti = current_thread_info(); | ||
172 | ti->status |= TS_RESTORE_SIGMASK; | ||
173 | set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags); | ||
174 | } | ||
175 | #endif /* !__ASSEMBLY__ */ | ||
176 | |||
159 | #endif /* __KERNEL__ */ | 177 | #endif /* __KERNEL__ */ |
160 | 178 | ||
161 | #endif /* __ASM_SH_THREAD_INFO_H */ | 179 | #endif /* __ASM_SH_THREAD_INFO_H */ |
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h index 65e7bd2f224..37cdadd975a 100644 --- a/arch/sh/include/asm/topology.h +++ b/arch/sh/include/asm/topology.h | |||
@@ -40,6 +40,14 @@ | |||
40 | 40 | ||
41 | #endif | 41 | #endif |
42 | 42 | ||
43 | #define mc_capable() (1) | ||
44 | |||
45 | const struct cpumask *cpu_coregroup_mask(unsigned int cpu); | ||
46 | |||
47 | extern cpumask_t cpu_core_map[NR_CPUS]; | ||
48 | |||
49 | #define topology_core_cpumask(cpu) (&cpu_core_map[cpu]) | ||
50 | |||
43 | #include <asm-generic/topology.h> | 51 | #include <asm-generic/topology.h> |
44 | 52 | ||
45 | #endif /* _ASM_SH_TOPOLOGY_H */ | 53 | #endif /* _ASM_SH_TOPOLOGY_H */ |
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h index 4ca4b771737..9bf96168443 100644 --- a/arch/sh/include/asm/ubc.h +++ b/arch/sh/include/asm/ubc.h | |||
@@ -60,16 +60,5 @@ | |||
60 | #define BRCR_UBDE (1 << 0) | 60 | #define BRCR_UBDE (1 << 0) |
61 | #endif | 61 | #endif |
62 | 62 | ||
63 | #ifndef __ASSEMBLY__ | ||
64 | /* arch/sh/kernel/cpu/ubc.S */ | ||
65 | extern void ubc_sleep(void); | ||
66 | |||
67 | #ifdef CONFIG_UBC_WAKEUP | ||
68 | extern void ubc_wakeup(void); | ||
69 | #else | ||
70 | #define ubc_wakeup() do { } while (0) | ||
71 | #endif | ||
72 | #endif | ||
73 | |||
74 | #endif /* __KERNEL__ */ | 63 | #endif /* __KERNEL__ */ |
75 | #endif /* __ASM_SH_UBC_H */ | 64 | #endif /* __ASM_SH_UBC_H */ |
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h index 2fe7cee9e43..19dfff5c851 100644 --- a/arch/sh/include/asm/watchdog.h +++ b/arch/sh/include/asm/watchdog.h | |||
@@ -2,6 +2,8 @@ | |||
2 | * include/asm-sh/watchdog.h | 2 | * include/asm-sh/watchdog.h |
3 | * | 3 | * |
4 | * Copyright (C) 2002, 2003 Paul Mundt | 4 | * Copyright (C) 2002, 2003 Paul Mundt |
5 | * Copyright (C) 2009 Siemens AG | ||
6 | * Copyright (C) 2009 Valentin Sitdikov | ||
5 | * | 7 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 9 | * under the terms of the GNU General Public License as published by the |
@@ -61,6 +63,61 @@ | |||
61 | #define WTCSR_CKS_2048 0x06 | 63 | #define WTCSR_CKS_2048 0x06 |
62 | #define WTCSR_CKS_4096 0x07 | 64 | #define WTCSR_CKS_4096 0x07 |
63 | 65 | ||
66 | #if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
67 | /** | ||
68 | * sh_wdt_read_cnt - Read from Counter | ||
69 | * Reads back the WTCNT value. | ||
70 | */ | ||
71 | static inline __u32 sh_wdt_read_cnt(void) | ||
72 | { | ||
73 | return ctrl_inl(WTCNT_R); | ||
74 | } | ||
75 | |||
76 | /** | ||
77 | * sh_wdt_write_cnt - Write to Counter | ||
78 | * @val: Value to write | ||
79 | * | ||
80 | * Writes the given value @val to the lower byte of the timer counter. | ||
81 | * The upper byte is set manually on each write. | ||
82 | */ | ||
83 | static inline void sh_wdt_write_cnt(__u32 val) | ||
84 | { | ||
85 | ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT); | ||
86 | } | ||
87 | |||
88 | /** | ||
89 | * sh_wdt_write_bst - Write to Counter | ||
90 | * @val: Value to write | ||
91 | * | ||
92 | * Writes the given value @val to the lower byte of the timer counter. | ||
93 | * The upper byte is set manually on each write. | ||
94 | */ | ||
95 | static inline void sh_wdt_write_bst(__u32 val) | ||
96 | { | ||
97 | ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST); | ||
98 | } | ||
99 | /** | ||
100 | * sh_wdt_read_csr - Read from Control/Status Register | ||
101 | * | ||
102 | * Reads back the WTCSR value. | ||
103 | */ | ||
104 | static inline __u32 sh_wdt_read_csr(void) | ||
105 | { | ||
106 | return ctrl_inl(WTCSR_R); | ||
107 | } | ||
108 | |||
109 | /** | ||
110 | * sh_wdt_write_csr - Write to Control/Status Register | ||
111 | * @val: Value to write | ||
112 | * | ||
113 | * Writes the given value @val to the lower byte of the control/status | ||
114 | * register. The upper byte is set manually on each write. | ||
115 | */ | ||
116 | static inline void sh_wdt_write_csr(__u32 val) | ||
117 | { | ||
118 | ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR); | ||
119 | } | ||
120 | #else | ||
64 | /** | 121 | /** |
65 | * sh_wdt_read_cnt - Read from Counter | 122 | * sh_wdt_read_cnt - Read from Counter |
66 | * Reads back the WTCNT value. | 123 | * Reads back the WTCNT value. |
@@ -103,6 +160,6 @@ static inline void sh_wdt_write_csr(__u8 val) | |||
103 | { | 160 | { |
104 | ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); | 161 | ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); |
105 | } | 162 | } |
106 | 163 | #endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */ | |
107 | #endif /* __KERNEL__ */ | 164 | #endif /* __KERNEL__ */ |
108 | #endif /* __ASM_SH_WATCHDOG_H */ | 165 | #endif /* __ASM_SH_WATCHDOG_H */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h index 259f6a0ce23..7672301d0c7 100644 --- a/arch/sh/include/cpu-sh4/cpu/watchdog.h +++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h | |||
@@ -2,6 +2,8 @@ | |||
2 | * include/asm-sh/cpu-sh4/watchdog.h | 2 | * include/asm-sh/cpu-sh4/watchdog.h |
3 | * | 3 | * |
4 | * Copyright (C) 2002, 2003 Paul Mundt | 4 | * Copyright (C) 2002, 2003 Paul Mundt |
5 | * Copyright (C) 2009 Siemens AG | ||
6 | * Copyright (C) 2009 Sitdikov Valentin | ||
5 | * | 7 | * |
6 | * This file is subject to the terms and conditions of the GNU General Public | 8 | * This file is subject to the terms and conditions of the GNU General Public |
7 | * License. See the file "COPYING" in the main directory of this archive | 9 | * License. See the file "COPYING" in the main directory of this archive |
@@ -10,9 +12,20 @@ | |||
10 | #ifndef __ASM_CPU_SH4_WATCHDOG_H | 12 | #ifndef __ASM_CPU_SH4_WATCHDOG_H |
11 | #define __ASM_CPU_SH4_WATCHDOG_H | 13 | #define __ASM_CPU_SH4_WATCHDOG_H |
12 | 14 | ||
15 | #if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
16 | /* Prefix definition */ | ||
17 | #define WTBST_HIGH 0x55 | ||
18 | /* Register definitions */ | ||
19 | #define WTCNT_R 0xffcc0010 /*WDTCNT*/ | ||
20 | #define WTCSR 0xffcc0004 /*WDTCSR*/ | ||
21 | #define WTCNT 0xffcc0000 /*WDTST*/ | ||
22 | #define WTST WTCNT | ||
23 | #define WTBST 0xffcc0008 /*WDTBST*/ | ||
24 | #else | ||
13 | /* Register definitions */ | 25 | /* Register definitions */ |
14 | #define WTCNT 0xffc00008 | 26 | #define WTCNT 0xffc00008 |
15 | #define WTCSR 0xffc0000c | 27 | #define WTCSR 0xffc0000c |
28 | #endif | ||
16 | 29 | ||
17 | /* Bit definitions */ | 30 | /* Bit definitions */ |
18 | #define WTCSR_TME 0x80 | 31 | #define WTCSR_TME 0x80 |
diff --git a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt index 8b8e4fa1fee..cc737b80733 100644 --- a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt +++ b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt | |||
@@ -22,13 +22,12 @@ ED 0xff000010, 0x00000004 | |||
22 | LIST "setup clocks" | 22 | LIST "setup clocks" |
23 | ED 0xa4150024, 0x00004000 | 23 | ED 0xa4150024, 0x00004000 |
24 | ED 0xa4150000, 0x8E003508 | 24 | ED 0xa4150000, 0x8E003508 |
25 | ED 0xa4150004, 0x00000000 | ||
26 | 25 | ||
27 | WAIT 1 | 26 | WAIT 1 |
28 | 27 | ||
29 | LIST "BSC" | 28 | LIST "BSC" |
30 | ED 0xff800020, 0xa5a50000 | 29 | ED 0xff800020, 0xa5a50000 |
31 | ED 0xfec10000, 0x00000013 | 30 | ED 0xfec10000, 0x00001013 |
32 | ED 0xfec10004, 0x11110400 | 31 | ED 0xfec10004, 0x11110400 |
33 | ED 0xfec10024, 0x00000440 | 32 | ED 0xfec10024, 0x00000440 |
34 | 33 | ||
diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h index e971d9a82f4..16505bfb8a9 100644 --- a/arch/sh/include/mach-se/mach/se7722.h +++ b/arch/sh/include/mach-se/mach/se7722.h | |||
@@ -92,18 +92,11 @@ | |||
92 | #define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ | 92 | #define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ |
93 | #define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ | 93 | #define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ |
94 | #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ | 94 | #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ |
95 | |||
96 | #define SE7722_FPGA_IRQ_NR 6 | 95 | #define SE7722_FPGA_IRQ_NR 6 |
97 | #define SE7722_FPGA_IRQ_BASE 110 | ||
98 | |||
99 | #define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3) | ||
100 | #define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2) | ||
101 | #define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1) | ||
102 | #define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0) | ||
103 | #define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC) | ||
104 | #define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB) | ||
105 | 96 | ||
106 | /* arch/sh/boards/se/7722/irq.c */ | 97 | /* arch/sh/boards/se/7722/irq.c */ |
98 | extern unsigned int se7722_fpga_irq[]; | ||
99 | |||
107 | void init_se7722_IRQ(void); | 100 | void init_se7722_IRQ(void); |
108 | 101 | ||
109 | #define __IO_PREFIX se7722 | 102 | #define __IO_PREFIX se7722 |