diff options
| author | Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | 2009-03-10 04:26:49 -0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-03-10 04:26:49 -0400 |
| commit | 71b973a42c5456824c8712e00659d9616d395919 (patch) | |
| tree | 1367c85de45159c66752a93fc062a6f67f616607 /arch/sh/include/cpu-sh3 | |
| parent | ae68df5635a191c7edb75f5c1c1406353cb24a9f (diff) | |
sh: dma-sh updates for multi IRQ and new SH-4A CPUs.
This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85.
This also enables multi IRQ support for platforms that have multiple
vectors bound to the same IRQ source.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh3')
| -rw-r--r-- | arch/sh/include/cpu-sh3/cpu/dma.h | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h index 6813c3220a1..0ea15f3f236 100644 --- a/arch/sh/include/cpu-sh3/cpu/dma.h +++ b/arch/sh/include/cpu-sh3/cpu/dma.h | |||
| @@ -1,22 +1,17 @@ | |||
| 1 | #ifndef __ASM_CPU_SH3_DMA_H | 1 | #ifndef __ASM_CPU_SH3_DMA_H |
| 2 | #define __ASM_CPU_SH3_DMA_H | 2 | #define __ASM_CPU_SH3_DMA_H |
| 3 | 3 | ||
| 4 | |||
| 5 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 4 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
| 6 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 5 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
| 7 | #define SH_DMAC_BASE 0xa4010020 | 6 | defined(CONFIG_CPU_SUBTYPE_SH7710) || \ |
| 8 | #else | 7 | defined(CONFIG_CPU_SUBTYPE_SH7712) |
| 9 | #define SH_DMAC_BASE 0xa4000020 | 8 | #define SH_DMAC_BASE0 0xa4010020 |
| 9 | #else /* SH7705/06/07/09 */ | ||
| 10 | #define SH_DMAC_BASE0 0xa4000020 | ||
| 10 | #endif | 11 | #endif |
| 11 | 12 | ||
| 12 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
| 13 | #define DMTE0_IRQ 48 | 13 | #define DMTE0_IRQ 48 |
| 14 | #define DMTE1_IRQ 49 | ||
| 15 | #define DMTE2_IRQ 50 | ||
| 16 | #define DMTE3_IRQ 51 | ||
| 17 | #define DMTE4_IRQ 76 | 14 | #define DMTE4_IRQ 76 |
| 18 | #define DMTE5_IRQ 77 | ||
| 19 | #endif | ||
| 20 | 15 | ||
| 21 | /* Definitions for the SuperH DMAC */ | 16 | /* Definitions for the SuperH DMAC */ |
| 22 | #define TM_BURST 0x00000020 | 17 | #define TM_BURST 0x00000020 |
