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authorMatt Fleming <matt@console-pimps.org>2009-01-20 16:14:37 -0500
committerPaul Mundt <lethal@linux-sh.org>2009-01-28 21:57:09 -0500
commit42990701f938b9318e46102d9919ceb28e5b0e6d (patch)
tree495a86cf7d4528dbef351074f0b7c2ff21b61681 /arch/sh/include/asm/bitops-llsc.h
parente4e3c3f17fdb78282e3d9b4af7ec90d6e65798eb (diff)
sh: Relax inline assembly constraints
When dereferencing the memory address contained in a register and modifying the value at that memory address, the register should not be listed in the inline asm outputs. The value at the memory address is an output (which is taken care of with the "memory" clobber), not the register. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/bitops-llsc.h')
-rw-r--r--arch/sh/include/asm/bitops-llsc.h72
1 files changed, 36 insertions, 36 deletions
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
index 1d2fc0b010a..d8328be0619 100644
--- a/arch/sh/include/asm/bitops-llsc.h
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_SH_BITOPS_LLSC_H 1#ifndef __ASM_SH_BITOPS_LLSC_H
2#define __ASM_SH_BITOPS_LLSC_H 2#define __ASM_SH_BITOPS_LLSC_H
3 3
4static inline void set_bit(int nr, volatile void * addr) 4static inline void set_bit(int nr, volatile void *addr)
5{ 5{
6 int mask; 6 int mask;
7 volatile unsigned int *a = addr; 7 volatile unsigned int *a = addr;
@@ -13,16 +13,16 @@ static inline void set_bit(int nr, volatile void * addr)
13 __asm__ __volatile__ ( 13 __asm__ __volatile__ (
14 "1: \n\t" 14 "1: \n\t"
15 "movli.l @%1, %0 ! set_bit \n\t" 15 "movli.l @%1, %0 ! set_bit \n\t"
16 "or %3, %0 \n\t" 16 "or %2, %0 \n\t"
17 "movco.l %0, @%1 \n\t" 17 "movco.l %0, @%1 \n\t"
18 "bf 1b \n\t" 18 "bf 1b \n\t"
19 : "=&z" (tmp), "=r" (a) 19 : "=&z" (tmp)
20 : "1" (a), "r" (mask) 20 : "r" (a), "r" (mask)
21 : "t", "memory" 21 : "t", "memory"
22 ); 22 );
23} 23}
24 24
25static inline void clear_bit(int nr, volatile void * addr) 25static inline void clear_bit(int nr, volatile void *addr)
26{ 26{
27 int mask; 27 int mask;
28 volatile unsigned int *a = addr; 28 volatile unsigned int *a = addr;
@@ -34,16 +34,16 @@ static inline void clear_bit(int nr, volatile void * addr)
34 __asm__ __volatile__ ( 34 __asm__ __volatile__ (
35 "1: \n\t" 35 "1: \n\t"
36 "movli.l @%1, %0 ! clear_bit \n\t" 36 "movli.l @%1, %0 ! clear_bit \n\t"
37 "and %3, %0 \n\t" 37 "and %2, %0 \n\t"
38 "movco.l %0, @%1 \n\t" 38 "movco.l %0, @%1 \n\t"
39 "bf 1b \n\t" 39 "bf 1b \n\t"
40 : "=&z" (tmp), "=r" (a) 40 : "=&z" (tmp)
41 : "1" (a), "r" (~mask) 41 : "r" (a), "r" (~mask)
42 : "t", "memory" 42 : "t", "memory"
43 ); 43 );
44} 44}
45 45
46static inline void change_bit(int nr, volatile void * addr) 46static inline void change_bit(int nr, volatile void *addr)
47{ 47{
48 int mask; 48 int mask;
49 volatile unsigned int *a = addr; 49 volatile unsigned int *a = addr;
@@ -55,16 +55,16 @@ static inline void change_bit(int nr, volatile void * addr)
55 __asm__ __volatile__ ( 55 __asm__ __volatile__ (
56 "1: \n\t" 56 "1: \n\t"
57 "movli.l @%1, %0 ! change_bit \n\t" 57 "movli.l @%1, %0 ! change_bit \n\t"
58 "xor %3, %0 \n\t" 58 "xor %2, %0 \n\t"
59 "movco.l %0, @%1 \n\t" 59 "movco.l %0, @%1 \n\t"
60 "bf 1b \n\t" 60 "bf 1b \n\t"
61 : "=&z" (tmp), "=r" (a) 61 : "=&z" (tmp)
62 : "1" (a), "r" (mask) 62 : "r" (a), "r" (mask)
63 : "t", "memory" 63 : "t", "memory"
64 ); 64 );
65} 65}
66 66
67static inline int test_and_set_bit(int nr, volatile void * addr) 67static inline int test_and_set_bit(int nr, volatile void *addr)
68{ 68{
69 int mask, retval; 69 int mask, retval;
70 volatile unsigned int *a = addr; 70 volatile unsigned int *a = addr;
@@ -75,21 +75,21 @@ static inline int test_and_set_bit(int nr, volatile void * addr)
75 75
76 __asm__ __volatile__ ( 76 __asm__ __volatile__ (
77 "1: \n\t" 77 "1: \n\t"
78 "movli.l @%1, %0 ! test_and_set_bit \n\t" 78 "movli.l @%2, %0 ! test_and_set_bit \n\t"
79 "mov %0, %2 \n\t" 79 "mov %0, %1 \n\t"
80 "or %4, %0 \n\t" 80 "or %3, %0 \n\t"
81 "movco.l %0, @%1 \n\t" 81 "movco.l %0, @%2 \n\t"
82 "bf 1b \n\t" 82 "bf 1b \n\t"
83 "and %4, %2 \n\t" 83 "and %3, %1 \n\t"
84 : "=&z" (tmp), "=r" (a), "=&r" (retval) 84 : "=&z" (tmp), "=&r" (retval)
85 : "1" (a), "r" (mask) 85 : "r" (a), "r" (mask)
86 : "t", "memory" 86 : "t", "memory"
87 ); 87 );
88 88
89 return retval != 0; 89 return retval != 0;
90} 90}
91 91
92static inline int test_and_clear_bit(int nr, volatile void * addr) 92static inline int test_and_clear_bit(int nr, volatile void *addr)
93{ 93{
94 int mask, retval; 94 int mask, retval;
95 volatile unsigned int *a = addr; 95 volatile unsigned int *a = addr;
@@ -100,22 +100,22 @@ static inline int test_and_clear_bit(int nr, volatile void * addr)
100 100
101 __asm__ __volatile__ ( 101 __asm__ __volatile__ (
102 "1: \n\t" 102 "1: \n\t"
103 "movli.l @%1, %0 ! test_and_clear_bit \n\t" 103 "movli.l @%2, %0 ! test_and_clear_bit \n\t"
104 "mov %0, %2 \n\t" 104 "mov %0, %1 \n\t"
105 "and %5, %0 \n\t" 105 "and %4, %0 \n\t"
106 "movco.l %0, @%1 \n\t" 106 "movco.l %0, @%2 \n\t"
107 "bf 1b \n\t" 107 "bf 1b \n\t"
108 "and %4, %2 \n\t" 108 "and %3, %1 \n\t"
109 "synco \n\t" 109 "synco \n\t"
110 : "=&z" (tmp), "=r" (a), "=&r" (retval) 110 : "=&z" (tmp), "=&r" (retval)
111 : "1" (a), "r" (mask), "r" (~mask) 111 : "r" (a), "r" (mask), "r" (~mask)
112 : "t", "memory" 112 : "t", "memory"
113 ); 113 );
114 114
115 return retval != 0; 115 return retval != 0;
116} 116}
117 117
118static inline int test_and_change_bit(int nr, volatile void * addr) 118static inline int test_and_change_bit(int nr, volatile void *addr)
119{ 119{
120 int mask, retval; 120 int mask, retval;
121 volatile unsigned int *a = addr; 121 volatile unsigned int *a = addr;
@@ -126,15 +126,15 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
126 126
127 __asm__ __volatile__ ( 127 __asm__ __volatile__ (
128 "1: \n\t" 128 "1: \n\t"
129 "movli.l @%1, %0 ! test_and_change_bit \n\t" 129 "movli.l @%2, %0 ! test_and_change_bit \n\t"
130 "mov %0, %2 \n\t" 130 "mov %0, %1 \n\t"
131 "xor %4, %0 \n\t" 131 "xor %3, %0 \n\t"
132 "movco.l %0, @%1 \n\t" 132 "movco.l %0, @%2 \n\t"
133 "bf 1b \n\t" 133 "bf 1b \n\t"
134 "and %4, %2 \n\t" 134 "and %3, %1 \n\t"
135 "synco \n\t" 135 "synco \n\t"
136 : "=&z" (tmp), "=r" (a), "=&r" (retval) 136 : "=&z" (tmp), "=&r" (retval)
137 : "1" (a), "r" (mask) 137 : "r" (a), "r" (mask)
138 : "t", "memory" 138 : "t", "memory"
139 ); 139 );
140 140
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