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authorPaul Mundt <lethal@linux-sh.org>2007-11-22 02:29:10 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:55 -0500
commitb6d7b666097e79a8908e3c43fd55fd291a95e133 (patch)
tree61ab633feecd144d129fc3b220ecb9376c7949bd /arch/sh/drivers/pci/pci-sh5.h
parentd5f68c6dbda8e63df258a0c639f03d7565cf1d50 (diff)
sh: Get the SH-5 PCI support building.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh5.h')
-rw-r--r--arch/sh/drivers/pci/pci-sh5.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index c71159dd04b..7cff3fc04d3 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -6,6 +6,8 @@
6 * 6 *
7 * Definitions for the SH5 PCI hardware. 7 * Definitions for the SH5 PCI hardware.
8 */ 8 */
9#ifndef __PCI_SH5_H
10#define __PCI_SH5_H
9 11
10/* Product ID */ 12/* Product ID */
11#define PCISH5_PID 0x350d 13#define PCISH5_PID 0x350d
@@ -73,13 +75,12 @@
73#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */ 75#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */
74#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */ 76#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */
75 77
76
77
78/* Base address of registers */ 78/* Base address of registers */
79#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000) 79#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000)
80#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000) 80#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000)
81/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */ 81/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */
82 82
83extern unsigned long pcicr_virt;
83/* Register selection macro */ 84/* Register selection macro */
84#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x)) 85#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x))
85/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ 86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
@@ -104,4 +105,9 @@
104#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18) 105#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18)
105#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18) 106#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18)
106 107
108extern struct pci_ops sh5_pci_ops;
109
110/* arch/sh/drivers/pci/pci-sh5.c */
111int sh5pci_init(unsigned long memStart, unsigned long memSize);
107 112
113#endif /* __PCI_SH5_H */