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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-03-19 01:23:55 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-03-19 01:23:55 -0400
commitd6a8536a93a3d14b6e5e3e3a59b9fb2bca6e8df2 (patch)
tree14de9959c93e56a8d165670faaa7ea3699da7f8e /arch/powerpc
parentbca14dd14f3b0c5e3e2d1d314679f85b67871365 (diff)
parent9d296cfa69b3d4abc9d556986d544f0727988eed (diff)
Merge commit 'kumar/merge' into merge
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h6
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S3
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index aea71479759..d553bbeb726 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -25,7 +25,7 @@
25#define PPC_INST_LDARX 0x7c0000a8 25#define PPC_INST_LDARX 0x7c0000a8
26#define PPC_INST_LSWI 0x7c0004aa 26#define PPC_INST_LSWI 0x7c0004aa
27#define PPC_INST_LSWX 0x7c00042a 27#define PPC_INST_LSWX 0x7c00042a
28#define PPC_INST_LWARX 0x7c000029 28#define PPC_INST_LWARX 0x7c000028
29#define PPC_INST_LWSYNC 0x7c2004ac 29#define PPC_INST_LWSYNC 0x7c2004ac
30#define PPC_INST_LXVD2X 0x7c000698 30#define PPC_INST_LXVD2X 0x7c000698
31#define PPC_INST_MCRXR 0x7c000400 31#define PPC_INST_MCRXR 0x7c000400
@@ -62,8 +62,8 @@
62#define __PPC_T_TLB(t) (((t) & 0x3) << 21) 62#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
63#define __PPC_WC(w) (((w) & 0x3) << 21) 63#define __PPC_WC(w) (((w) & 0x3) << 21)
64/* 64/*
65 * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have 65 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
66 * any side effects on all 32bit processors, we can do this all the time. 66 * larx with EH set as an illegal instruction.
67 */ 67 */
68#ifdef CONFIG_PPC64 68#ifdef CONFIG_PPC64
69#define __PPC_EH(eh) (((eh) & 0x1) << 0) 69#define __PPC_EH(eh) (((eh) & 0x1) << 0)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 25793bb0e78..a7cf4934342 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -747,9 +747,6 @@ finish_tlb_load:
747#else 747#else
748 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */ 748 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
749#endif 749#endif
750#ifdef CONFIG_SMP
751 ori r12, r12, MAS2_M
752#endif
753 mtspr SPRN_MAS2, r12 750 mtspr SPRN_MAS2, r12
754 751
755#ifdef CONFIG_PTE_64BIT 752#ifdef CONFIG_PTE_64BIT