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authorDavid Gibson <david@gibson.dropbear.id.au>2005-11-09 20:56:55 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-09 21:10:38 -0500
commit3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739 (patch)
treeca77158ab291453ed39e87f2d81beef9e8d1a560 /arch/powerpc
parentf6d3577da14e877b79517c883d1139ee6ad7da45 (diff)
[PATCH] powerpc: Consolidate asm compatibility macros
This patch consolidates macros used to generate assembly for compatibility across different CPUs or configs. A new header, asm-powerpc/asm-compat.h contains the main compatibility macros. It uses some preprocessor magic to make the macros suitable both for use in .S files, and in inline asm in .c files. Headers (bitops.h, uaccess.h, atomic.h, bug.h) which had their own such compatibility macros are changed to use asm-compat.h. ppc_asm.h is now for use in .S files *only*, and a #error enforces that. As such, we're a lot more careless about namespace pollution here than in asm-compat.h. While we're at it, this patch adds a call to the PPC405_ERR77 macro in futex.h which should have had it already, but didn't. Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc). Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/fpu.S24
-rw-r--r--arch/powerpc/platforms/iseries/misc.S1
-rw-r--r--arch/powerpc/xmon/setjmp.S176
3 files changed, 101 insertions, 100 deletions
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 4d6001fa1cf..b780b42c95f 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -41,20 +41,20 @@ _GLOBAL(load_up_fpu)
41#ifndef CONFIG_SMP 41#ifndef CONFIG_SMP
42 LOADBASE(r3, last_task_used_math) 42 LOADBASE(r3, last_task_used_math)
43 toreal(r3) 43 toreal(r3)
44 LDL r4,OFF(last_task_used_math)(r3) 44 PPC_LL r4,OFF(last_task_used_math)(r3)
45 CMPI 0,r4,0 45 PPC_LCMPI 0,r4,0
46 beq 1f 46 beq 1f
47 toreal(r4) 47 toreal(r4)
48 addi r4,r4,THREAD /* want last_task_used_math->thread */ 48 addi r4,r4,THREAD /* want last_task_used_math->thread */
49 SAVE_32FPRS(0, r4) 49 SAVE_32FPRS(0, r4)
50 mffs fr0 50 mffs fr0
51 stfd fr0,THREAD_FPSCR(r4) 51 stfd fr0,THREAD_FPSCR(r4)
52 LDL r5,PT_REGS(r4) 52 PPC_LL r5,PT_REGS(r4)
53 toreal(r5) 53 toreal(r5)
54 LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 54 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
55 li r10,MSR_FP|MSR_FE0|MSR_FE1 55 li r10,MSR_FP|MSR_FE0|MSR_FE1
56 andc r4,r4,r10 /* disable FP for previous task */ 56 andc r4,r4,r10 /* disable FP for previous task */
57 STL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 57 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
581: 581:
59#endif /* CONFIG_SMP */ 59#endif /* CONFIG_SMP */
60 /* enable use of FP after return */ 60 /* enable use of FP after return */
@@ -77,7 +77,7 @@ _GLOBAL(load_up_fpu)
77#ifndef CONFIG_SMP 77#ifndef CONFIG_SMP
78 subi r4,r5,THREAD 78 subi r4,r5,THREAD
79 fromreal(r4) 79 fromreal(r4)
80 STL r4,OFF(last_task_used_math)(r3) 80 PPC_STL r4,OFF(last_task_used_math)(r3)
81#endif /* CONFIG_SMP */ 81#endif /* CONFIG_SMP */
82 /* restore registers and return */ 82 /* restore registers and return */
83 /* we haven't used ctr or xer or lr */ 83 /* we haven't used ctr or xer or lr */
@@ -97,24 +97,24 @@ _GLOBAL(giveup_fpu)
97 MTMSRD(r5) /* enable use of fpu now */ 97 MTMSRD(r5) /* enable use of fpu now */
98 SYNC_601 98 SYNC_601
99 isync 99 isync
100 CMPI 0,r3,0 100 PPC_LCMPI 0,r3,0
101 beqlr- /* if no previous owner, done */ 101 beqlr- /* if no previous owner, done */
102 addi r3,r3,THREAD /* want THREAD of task */ 102 addi r3,r3,THREAD /* want THREAD of task */
103 LDL r5,PT_REGS(r3) 103 PPC_LL r5,PT_REGS(r3)
104 CMPI 0,r5,0 104 PPC_LCMPI 0,r5,0
105 SAVE_32FPRS(0, r3) 105 SAVE_32FPRS(0, r3)
106 mffs fr0 106 mffs fr0
107 stfd fr0,THREAD_FPSCR(r3) 107 stfd fr0,THREAD_FPSCR(r3)
108 beq 1f 108 beq 1f
109 LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 109 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
110 li r3,MSR_FP|MSR_FE0|MSR_FE1 110 li r3,MSR_FP|MSR_FE0|MSR_FE1
111 andc r4,r4,r3 /* disable FP for previous task */ 111 andc r4,r4,r3 /* disable FP for previous task */
112 STL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 112 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1131: 1131:
114#ifndef CONFIG_SMP 114#ifndef CONFIG_SMP
115 li r5,0 115 li r5,0
116 LOADBASE(r4,last_task_used_math) 116 LOADBASE(r4,last_task_used_math)
117 STL r5,OFF(last_task_used_math)(r4) 117 PPC_STL r5,OFF(last_task_used_math)(r4)
118#endif /* CONFIG_SMP */ 118#endif /* CONFIG_SMP */
119 blr 119 blr
120 120
diff --git a/arch/powerpc/platforms/iseries/misc.S b/arch/powerpc/platforms/iseries/misc.S
index 09f14522e17..dfe7aa1ba09 100644
--- a/arch/powerpc/platforms/iseries/misc.S
+++ b/arch/powerpc/platforms/iseries/misc.S
@@ -15,6 +15,7 @@
15 15
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/ppc_asm.h>
18 19
19 .text 20 .text
20 21
diff --git a/arch/powerpc/xmon/setjmp.S b/arch/powerpc/xmon/setjmp.S
index f8e40dfd2bf..96a91f10e2e 100644
--- a/arch/powerpc/xmon/setjmp.S
+++ b/arch/powerpc/xmon/setjmp.S
@@ -14,61 +14,61 @@
14 14
15_GLOBAL(xmon_setjmp) 15_GLOBAL(xmon_setjmp)
16 mflr r0 16 mflr r0
17 STL r0,0(r3) 17 PPC_STL r0,0(r3)
18 STL r1,SZL(r3) 18 PPC_STL r1,SZL(r3)
19 STL r2,2*SZL(r3) 19 PPC_STL r2,2*SZL(r3)
20 mfcr r0 20 mfcr r0
21 STL r0,3*SZL(r3) 21 PPC_STL r0,3*SZL(r3)
22 STL r13,4*SZL(r3) 22 PPC_STL r13,4*SZL(r3)
23 STL r14,5*SZL(r3) 23 PPC_STL r14,5*SZL(r3)
24 STL r15,6*SZL(r3) 24 PPC_STL r15,6*SZL(r3)
25 STL r16,7*SZL(r3) 25 PPC_STL r16,7*SZL(r3)
26 STL r17,8*SZL(r3) 26 PPC_STL r17,8*SZL(r3)
27 STL r18,9*SZL(r3) 27 PPC_STL r18,9*SZL(r3)
28 STL r19,10*SZL(r3) 28 PPC_STL r19,10*SZL(r3)
29 STL r20,11*SZL(r3) 29 PPC_STL r20,11*SZL(r3)
30 STL r21,12*SZL(r3) 30 PPC_STL r21,12*SZL(r3)
31 STL r22,13*SZL(r3) 31 PPC_STL r22,13*SZL(r3)
32 STL r23,14*SZL(r3) 32 PPC_STL r23,14*SZL(r3)
33 STL r24,15*SZL(r3) 33 PPC_STL r24,15*SZL(r3)
34 STL r25,16*SZL(r3) 34 PPC_STL r25,16*SZL(r3)
35 STL r26,17*SZL(r3) 35 PPC_STL r26,17*SZL(r3)
36 STL r27,18*SZL(r3) 36 PPC_STL r27,18*SZL(r3)
37 STL r28,19*SZL(r3) 37 PPC_STL r28,19*SZL(r3)
38 STL r29,20*SZL(r3) 38 PPC_STL r29,20*SZL(r3)
39 STL r30,21*SZL(r3) 39 PPC_STL r30,21*SZL(r3)
40 STL r31,22*SZL(r3) 40 PPC_STL r31,22*SZL(r3)
41 li r3,0 41 li r3,0
42 blr 42 blr
43 43
44_GLOBAL(xmon_longjmp) 44_GLOBAL(xmon_longjmp)
45 CMPI r4,0 45 PPC_LCMPI r4,0
46 bne 1f 46 bne 1f
47 li r4,1 47 li r4,1
481: LDL r13,4*SZL(r3) 481: PPC_LL r13,4*SZL(r3)
49 LDL r14,5*SZL(r3) 49 PPC_LL r14,5*SZL(r3)
50 LDL r15,6*SZL(r3) 50 PPC_LL r15,6*SZL(r3)
51 LDL r16,7*SZL(r3) 51 PPC_LL r16,7*SZL(r3)
52 LDL r17,8*SZL(r3) 52 PPC_LL r17,8*SZL(r3)
53 LDL r18,9*SZL(r3) 53 PPC_LL r18,9*SZL(r3)
54 LDL r19,10*SZL(r3) 54 PPC_LL r19,10*SZL(r3)
55 LDL r20,11*SZL(r3) 55 PPC_LL r20,11*SZL(r3)
56 LDL r21,12*SZL(r3) 56 PPC_LL r21,12*SZL(r3)
57 LDL r22,13*SZL(r3) 57 PPC_LL r22,13*SZL(r3)
58 LDL r23,14*SZL(r3) 58 PPC_LL r23,14*SZL(r3)
59 LDL r24,15*SZL(r3) 59 PPC_LL r24,15*SZL(r3)
60 LDL r25,16*SZL(r3) 60 PPC_LL r25,16*SZL(r3)
61 LDL r26,17*SZL(r3) 61 PPC_LL r26,17*SZL(r3)
62 LDL r27,18*SZL(r3) 62 PPC_LL r27,18*SZL(r3)
63 LDL r28,19*SZL(r3) 63 PPC_LL r28,19*SZL(r3)
64 LDL r29,20*SZL(r3) 64 PPC_LL r29,20*SZL(r3)
65 LDL r30,21*SZL(r3) 65 PPC_LL r30,21*SZL(r3)
66 LDL r31,22*SZL(r3) 66 PPC_LL r31,22*SZL(r3)
67 LDL r0,3*SZL(r3) 67 PPC_LL r0,3*SZL(r3)
68 mtcrf 0x38,r0 68 mtcrf 0x38,r0
69 LDL r0,0(r3) 69 PPC_LL r0,0(r3)
70 LDL r1,SZL(r3) 70 PPC_LL r1,SZL(r3)
71 LDL r2,2*SZL(r3) 71 PPC_LL r2,2*SZL(r3)
72 mtlr r0 72 mtlr r0
73 mr r3,r4 73 mr r3,r4
74 blr 74 blr
@@ -84,52 +84,52 @@ _GLOBAL(xmon_longjmp)
84 * different ABIs, though). 84 * different ABIs, though).
85 */ 85 */
86_GLOBAL(xmon_save_regs) 86_GLOBAL(xmon_save_regs)
87 STL r0,0*SZL(r3) 87 PPC_STL r0,0*SZL(r3)
88 STL r2,2*SZL(r3) 88 PPC_STL r2,2*SZL(r3)
89 STL r3,3*SZL(r3) 89 PPC_STL r3,3*SZL(r3)
90 STL r4,4*SZL(r3) 90 PPC_STL r4,4*SZL(r3)
91 STL r5,5*SZL(r3) 91 PPC_STL r5,5*SZL(r3)
92 STL r6,6*SZL(r3) 92 PPC_STL r6,6*SZL(r3)
93 STL r7,7*SZL(r3) 93 PPC_STL r7,7*SZL(r3)
94 STL r8,8*SZL(r3) 94 PPC_STL r8,8*SZL(r3)
95 STL r9,9*SZL(r3) 95 PPC_STL r9,9*SZL(r3)
96 STL r10,10*SZL(r3) 96 PPC_STL r10,10*SZL(r3)
97 STL r11,11*SZL(r3) 97 PPC_STL r11,11*SZL(r3)
98 STL r12,12*SZL(r3) 98 PPC_STL r12,12*SZL(r3)
99 STL r13,13*SZL(r3) 99 PPC_STL r13,13*SZL(r3)
100 STL r14,14*SZL(r3) 100 PPC_STL r14,14*SZL(r3)
101 STL r15,15*SZL(r3) 101 PPC_STL r15,15*SZL(r3)
102 STL r16,16*SZL(r3) 102 PPC_STL r16,16*SZL(r3)
103 STL r17,17*SZL(r3) 103 PPC_STL r17,17*SZL(r3)
104 STL r18,18*SZL(r3) 104 PPC_STL r18,18*SZL(r3)
105 STL r19,19*SZL(r3) 105 PPC_STL r19,19*SZL(r3)
106 STL r20,20*SZL(r3) 106 PPC_STL r20,20*SZL(r3)
107 STL r21,21*SZL(r3) 107 PPC_STL r21,21*SZL(r3)
108 STL r22,22*SZL(r3) 108 PPC_STL r22,22*SZL(r3)
109 STL r23,23*SZL(r3) 109 PPC_STL r23,23*SZL(r3)
110 STL r24,24*SZL(r3) 110 PPC_STL r24,24*SZL(r3)
111 STL r25,25*SZL(r3) 111 PPC_STL r25,25*SZL(r3)
112 STL r26,26*SZL(r3) 112 PPC_STL r26,26*SZL(r3)
113 STL r27,27*SZL(r3) 113 PPC_STL r27,27*SZL(r3)
114 STL r28,28*SZL(r3) 114 PPC_STL r28,28*SZL(r3)
115 STL r29,29*SZL(r3) 115 PPC_STL r29,29*SZL(r3)
116 STL r30,30*SZL(r3) 116 PPC_STL r30,30*SZL(r3)
117 STL r31,31*SZL(r3) 117 PPC_STL r31,31*SZL(r3)
118 /* go up one stack frame for SP */ 118 /* go up one stack frame for SP */
119 LDL r4,0(r1) 119 PPC_LL r4,0(r1)
120 STL r4,1*SZL(r3) 120 PPC_STL r4,1*SZL(r3)
121 /* get caller's LR */ 121 /* get caller's LR */
122 LDL r0,LRSAVE(r4) 122 PPC_LL r0,LRSAVE(r4)
123 STL r0,_NIP-STACK_FRAME_OVERHEAD(r3) 123 PPC_STL r0,_NIP-STACK_FRAME_OVERHEAD(r3)
124 STL r0,_LINK-STACK_FRAME_OVERHEAD(r3) 124 PPC_STL r0,_LINK-STACK_FRAME_OVERHEAD(r3)
125 mfmsr r0 125 mfmsr r0
126 STL r0,_MSR-STACK_FRAME_OVERHEAD(r3) 126 PPC_STL r0,_MSR-STACK_FRAME_OVERHEAD(r3)
127 mfctr r0 127 mfctr r0
128 STL r0,_CTR-STACK_FRAME_OVERHEAD(r3) 128 PPC_STL r0,_CTR-STACK_FRAME_OVERHEAD(r3)
129 mfxer r0 129 mfxer r0
130 STL r0,_XER-STACK_FRAME_OVERHEAD(r3) 130 PPC_STL r0,_XER-STACK_FRAME_OVERHEAD(r3)
131 mfcr r0 131 mfcr r0
132 STL r0,_CCR-STACK_FRAME_OVERHEAD(r3) 132 PPC_STL r0,_CCR-STACK_FRAME_OVERHEAD(r3)
133 li r0,0 133 li r0,0
134 STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3) 134 PPC_STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
135 blr 135 blr