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authorMasato Noguchi <Masato.Noguchi@jp.sony.com>2007-12-04 21:49:31 -0500
committerPaul Mackerras <paulus@samba.org>2007-12-21 03:45:05 -0500
commitc25620d7663fef41c373d42c4923c1d6b9847684 (patch)
tree4b734431a2f79ba9cdf033e9f2028f5fb5010af6 /arch/powerpc/platforms/ps3/spu.c
parenteda09fbdcd8c5afaa81c2f1d28e8b9725bad4d5a (diff)
[POWERPC] cell: wrap master run control bit
Add platform specific SPU run control routines to the spufs. The current spufs implementation uses the SPU master run control bit (MFC_SR1[S]) to control SPE execution, but the PS3 hypervisor does not support the use of this feature. This change adds the run control wrapper routies spu_enable_spu() and spu_disable_spu(). The bare metal routines use the master run control bit, and the PS3 specific routines use the priv2 run control register. An outstanding enhancement for the PS3 would be to add a guard to check for incorrect access to the spu problem state when the spu context is disabled. This check could be implemented with a flag added to the spu context that would inhibit mapping problem state pages, and a routine to unmap spu problem state pages. When the spu is enabled with ps3_enable_spu() the flag would be set allowing pages to be mapped, and when the spu is disabled with ps3_disable_spu() the flag would be cleared and mapped problem state pages would be unmapped. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/ps3/spu.c')
-rw-r--r--arch/powerpc/platforms/ps3/spu.c27
1 files changed, 25 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index d1630a074ac..5ad41189b49 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -28,6 +28,7 @@
28#include <asm/spu_priv1.h> 28#include <asm/spu_priv1.h>
29#include <asm/lv1call.h> 29#include <asm/lv1call.h>
30 30
31#include "../cell/spufs/spufs.h"
31#include "platform.h" 32#include "platform.h"
32 33
33/* spu_management_ops */ 34/* spu_management_ops */
@@ -419,10 +420,34 @@ static int ps3_init_affinity(void)
419 return 0; 420 return 0;
420} 421}
421 422
423/**
424 * ps3_enable_spu - Enable SPU run control.
425 *
426 * An outstanding enhancement for the PS3 would be to add a guard to check
427 * for incorrect access to the spu problem state when the spu context is
428 * disabled. This check could be implemented with a flag added to the spu
429 * context that would inhibit mapping problem state pages, and a routine
430 * to unmap spu problem state pages. When the spu is enabled with
431 * ps3_enable_spu() the flag would be set allowing pages to be mapped,
432 * and when the spu is disabled with ps3_disable_spu() the flag would be
433 * cleared and the mapped problem state pages would be unmapped.
434 */
435
436static void ps3_enable_spu(struct spu_context *ctx)
437{
438}
439
440static void ps3_disable_spu(struct spu_context *ctx)
441{
442 ctx->ops->runcntl_stop(ctx);
443}
444
422const struct spu_management_ops spu_management_ps3_ops = { 445const struct spu_management_ops spu_management_ps3_ops = {
423 .enumerate_spus = ps3_enumerate_spus, 446 .enumerate_spus = ps3_enumerate_spus,
424 .create_spu = ps3_create_spu, 447 .create_spu = ps3_create_spu,
425 .destroy_spu = ps3_destroy_spu, 448 .destroy_spu = ps3_destroy_spu,
449 .enable_spu = ps3_enable_spu,
450 .disable_spu = ps3_disable_spu,
426 .init_affinity = ps3_init_affinity, 451 .init_affinity = ps3_init_affinity,
427}; 452};
428 453
@@ -505,8 +530,6 @@ static void mfc_sr1_set(struct spu *spu, u64 sr1)
505 static const u64 allowed = ~(MFC_STATE1_LOCAL_STORAGE_DECODE_MASK 530 static const u64 allowed = ~(MFC_STATE1_LOCAL_STORAGE_DECODE_MASK
506 | MFC_STATE1_PROBLEM_STATE_MASK); 531 | MFC_STATE1_PROBLEM_STATE_MASK);
507 532
508 sr1 |= MFC_STATE1_MASTER_RUN_CONTROL_MASK;
509
510 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed)); 533 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed));
511 534
512 spu_pdata(spu)->cache.sr1 = sr1; 535 spu_pdata(spu)->cache.sr1 = sr1;