powerpc/pmac/smp: Properly NAP offlined CPU on G5

The current code soft-disables, and then goes to NAP mode which
turns interrupts on. That means that if an interrupt occurs, we
will hit the masked interrupt code path which isn't what we want,
as it will return with EE off, which will either get us out of
NAP mode, or fail to enter it (according to spec).

Instead, let's just rely on the fact that it is safe to take
decrementer interrupts on an offline CPU and leave interrupts
enabled. We can also get rid of the special case in asm for
power4_cpu_offline_powersave() and just use power4_idle().

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 8 insertions, 6 deletions

diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 53bee660ff3..837989e72ca 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -916,18 +916,20 @@ static void pmac_cpu_die(void)
         preempt_enable();
 
         /*
-         * hard-disable interrupts for the non-NAP case, the NAP code
-         * needs to re-enable interrupts (but soft-disables them)
+         * Re-enable interrupts. The NAP code needs to enable them
+         * anyways, do it now so we deal with the case where one already
+         * happened while soft-disabled.
+         * We shouldn't get any external interrupts, only decrementer, and the
+         * decrementer handler is safe for use on offline CPUs
          */
-        hard_irq_disable();
+        local_irq_enable();
 
         while (1) {
                 /* let's not take timer interrupts too often ... */
                 set_dec(0x7fffffff);
 
-                /* should always be true at this point */
-                if (cpu_has_feature(CPU_FTR_CAN_NAP))
-                        power4_cpu_offline_powersave();
+                /* Enter NAP mode */
+                power4_idle();
         }
 }