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authorThomas Gleixner <tglx@linutronix.de>2011-03-25 11:45:20 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:48:12 -0400
commitec775d0e70eb6b7116406b3441cb8501c2849dd2 (patch)
tree3c9f5bfb1f5a4cde6754517dccaacd9e91a05cf4 /arch/powerpc/platforms/cell
parent7bfbc1f28311d680e45d7122ecd48dec57703750 (diff)
powerpc: Convert to new irq_* function names
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/powerpc/platforms/cell')
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c14
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c2
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c14
-rw-r--r--arch/powerpc/platforms/cell/setup.c8
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c12
5 files changed, 25 insertions, 25 deletions
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index c48b66a67e4..bb5ebf8fa80 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -93,8 +93,8 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
93 93
94static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) 94static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
95{ 95{
96 struct irq_chip *chip = get_irq_desc_chip(desc); 96 struct irq_chip *chip = irq_desc_get_chip(desc);
97 struct axon_msic *msic = get_irq_data(irq); 97 struct axon_msic *msic = irq_get_handler_data(irq);
98 u32 write_offset, msi; 98 u32 write_offset, msi;
99 int idx; 99 int idx;
100 int retry = 0; 100 int retry = 0;
@@ -287,7 +287,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
287 } 287 }
288 dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq); 288 dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq);
289 289
290 set_irq_msi(virq, entry); 290 irq_set_msi_desc(virq, entry);
291 msg.data = virq; 291 msg.data = virq;
292 write_msi_msg(virq, &msg); 292 write_msi_msg(virq, &msg);
293 } 293 }
@@ -305,7 +305,7 @@ static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)
305 if (entry->irq == NO_IRQ) 305 if (entry->irq == NO_IRQ)
306 continue; 306 continue;
307 307
308 set_irq_msi(entry->irq, NULL); 308 irq_set_msi_desc(entry->irq, NULL);
309 irq_dispose_mapping(entry->irq); 309 irq_dispose_mapping(entry->irq);
310 } 310 }
311} 311}
@@ -320,7 +320,7 @@ static struct irq_chip msic_irq_chip = {
320static int msic_host_map(struct irq_host *h, unsigned int virq, 320static int msic_host_map(struct irq_host *h, unsigned int virq,
321 irq_hw_number_t hw) 321 irq_hw_number_t hw)
322{ 322{
323 set_irq_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq); 323 irq_set_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq);
324 324
325 return 0; 325 return 0;
326} 326}
@@ -400,8 +400,8 @@ static int axon_msi_probe(struct platform_device *device)
400 400
401 msic->irq_host->host_data = msic; 401 msic->irq_host->host_data = msic;
402 402
403 set_irq_data(virq, msic); 403 irq_set_handler_data(virq, msic);
404 set_irq_chained_handler(virq, axon_msi_cascade); 404 irq_set_chained_handler(virq, axon_msi_cascade);
405 pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq); 405 pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq);
406 406
407 /* Enable the MSIC hardware */ 407 /* Enable the MSIC hardware */
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 0280042b3e8..4cb9e147c30 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -143,7 +143,7 @@ static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
143 return -EIO; 143 return -EIO;
144 144
145 irq_set_status_flags(virq, IRQ_LEVEL); 145 irq_set_status_flags(virq, IRQ_LEVEL);
146 set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); 146 irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
147 return 0; 147 return 0;
148} 148}
149 149
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index ec9fc7d8206..a19bec07870 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -101,9 +101,9 @@ static void iic_ioexc_eoi(struct irq_data *d)
101 101
102static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc) 102static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
103{ 103{
104 struct irq_chip *chip = get_irq_desc_chip(desc); 104 struct irq_chip *chip = irq_desc_get_chip(desc);
105 struct cbe_iic_regs __iomem *node_iic = 105 struct cbe_iic_regs __iomem *node_iic =
106 (void __iomem *)get_irq_desc_data(desc); 106 (void __iomem *)irq_desc_get_handler_data(desc);
107 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC; 107 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
108 unsigned long bits, ack; 108 unsigned long bits, ack;
109 int cascade; 109 int cascade;
@@ -240,14 +240,14 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
240{ 240{
241 switch (hw & IIC_IRQ_TYPE_MASK) { 241 switch (hw & IIC_IRQ_TYPE_MASK) {
242 case IIC_IRQ_TYPE_IPI: 242 case IIC_IRQ_TYPE_IPI:
243 set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq); 243 irq_set_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
244 break; 244 break;
245 case IIC_IRQ_TYPE_IOEXC: 245 case IIC_IRQ_TYPE_IOEXC:
246 set_irq_chip_and_handler(virq, &iic_ioexc_chip, 246 irq_set_chip_and_handler(virq, &iic_ioexc_chip,
247 handle_iic_irq); 247 handle_iic_irq);
248 break; 248 break;
249 default: 249 default:
250 set_irq_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq); 250 irq_set_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq);
251 } 251 }
252 return 0; 252 return 0;
253} 253}
@@ -364,8 +364,8 @@ static int __init setup_iic(void)
364 * irq_data is a generic pointer that gets passed back 364 * irq_data is a generic pointer that gets passed back
365 * to us later, so the forced cast is fine. 365 * to us later, so the forced cast is fine.
366 */ 366 */
367 set_irq_data(cascade, (void __force *)node_iic); 367 irq_set_handler_data(cascade, (void __force *)node_iic);
368 set_irq_chained_handler(cascade , iic_ioexc_cascade); 368 irq_set_chained_handler(cascade, iic_ioexc_cascade);
369 out_be64(&node_iic->iic_ir, 369 out_be64(&node_iic->iic_ir,
370 (1 << 12) /* priority */ | 370 (1 << 12) /* priority */ |
371 (node << 4) /* dest node */ | 371 (node << 4) /* dest node */ |
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 6a28d027d95..fd57bfe00ed 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -187,8 +187,8 @@ machine_subsys_initcall(cell, cell_publish_devices);
187 187
188static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc) 188static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
189{ 189{
190 struct irq_chip *chip = get_irq_desc_chip(desc); 190 struct irq_chip *chip = irq_desc_get_chip(desc);
191 struct mpic *mpic = get_irq_desc_data(desc); 191 struct mpic *mpic = irq_desc_get_handler_data(desc);
192 unsigned int virq; 192 unsigned int virq;
193 193
194 virq = mpic_get_one_irq(mpic); 194 virq = mpic_get_one_irq(mpic);
@@ -223,8 +223,8 @@ static void __init mpic_init_IRQ(void)
223 223
224 printk(KERN_INFO "%s : hooking up to IRQ %d\n", 224 printk(KERN_INFO "%s : hooking up to IRQ %d\n",
225 dn->full_name, virq); 225 dn->full_name, virq);
226 set_irq_data(virq, mpic); 226 irq_set_handler_data(virq, mpic);
227 set_irq_chained_handler(virq, cell_mpic_cascade); 227 irq_set_chained_handler(virq, cell_mpic_cascade);
228 } 228 }
229} 229}
230 230
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index bc27de4cf84..c5cf50e6b45 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -171,10 +171,10 @@ static struct irq_chip spider_pic = {
171static int spider_host_map(struct irq_host *h, unsigned int virq, 171static int spider_host_map(struct irq_host *h, unsigned int virq,
172 irq_hw_number_t hw) 172 irq_hw_number_t hw)
173{ 173{
174 set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); 174 irq_set_chip_and_handler(virq, &spider_pic, handle_level_irq);
175 175
176 /* Set default irq type */ 176 /* Set default irq type */
177 set_irq_type(virq, IRQ_TYPE_NONE); 177 irq_set_irq_type(virq, IRQ_TYPE_NONE);
178 178
179 return 0; 179 return 0;
180} 180}
@@ -200,8 +200,8 @@ static struct irq_host_ops spider_host_ops = {
200 200
201static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc) 201static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
202{ 202{
203 struct irq_chip *chip = get_irq_desc_chip(desc); 203 struct irq_chip *chip = irq_desc_get_chip(desc);
204 struct spider_pic *pic = get_irq_desc_data(desc); 204 struct spider_pic *pic = irq_desc_get_handler_data(desc);
205 unsigned int cs, virq; 205 unsigned int cs, virq;
206 206
207 cs = in_be32(pic->regs + TIR_CS) >> 24; 207 cs = in_be32(pic->regs + TIR_CS) >> 24;
@@ -321,8 +321,8 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
321 virq = spider_find_cascade_and_node(pic); 321 virq = spider_find_cascade_and_node(pic);
322 if (virq == NO_IRQ) 322 if (virq == NO_IRQ)
323 return; 323 return;
324 set_irq_data(virq, pic); 324 irq_set_handler_data(virq, pic);
325 set_irq_chained_handler(virq, spider_irq_cascade); 325 irq_set_chained_handler(virq, spider_irq_cascade);
326 326
327 printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n", 327 printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n",
328 pic->node_id, addr, of_node->full_name); 328 pic->node_id, addr, of_node->full_name);