diff options
author | Martyn Welch <martyn.welch@gefanuc.com> | 2008-10-01 04:32:39 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-10-13 12:09:57 -0400 |
commit | 3a470247913e6537c453937720b61f4ecc3e39db (patch) | |
tree | 284e09ffda9f3513677464abd05020fb01f51196 /arch/powerpc/platforms/86xx/gef_sbc610.c | |
parent | 92ae954046b1434c8c11468893ed27c7c06f2c21 (diff) |
powerpc: GE Fanuc's FPGA based PIC controller on the SBC610
Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D).
A number of MPC8641D based route interrupts for on-board interrupts through
a FPGA based interrupt controller, which is chained with the
MPC8641D's mpic. This patch provides a basic driver to allow basic routing
of interrupts to the mpic.
Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/86xx/gef_sbc610.c')
-rw-r--r-- | arch/powerpc/platforms/86xx/gef_sbc610.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index ee215002b1c..3873c2018cc 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <sysdev/fsl_soc.h> | 39 | #include <sysdev/fsl_soc.h> |
40 | 40 | ||
41 | #include "mpc86xx.h" | 41 | #include "mpc86xx.h" |
42 | #include "gef_pic.h" | ||
42 | 43 | ||
43 | #undef DEBUG | 44 | #undef DEBUG |
44 | 45 | ||
@@ -48,6 +49,28 @@ | |||
48 | #define DBG (fmt...) do { } while (0) | 49 | #define DBG (fmt...) do { } while (0) |
49 | #endif | 50 | #endif |
50 | 51 | ||
52 | void __iomem *sbc610_regs; | ||
53 | |||
54 | static void __init gef_sbc610_init_irq(void) | ||
55 | { | ||
56 | struct device_node *cascade_node = NULL; | ||
57 | |||
58 | mpc86xx_init_irq(); | ||
59 | |||
60 | /* | ||
61 | * There is a simple interrupt handler in the main FPGA, this needs | ||
62 | * to be cascaded into the MPIC | ||
63 | */ | ||
64 | cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic"); | ||
65 | if (!cascade_node) { | ||
66 | printk(KERN_WARNING "SBC610: No FPGA PIC\n"); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | gef_pic_init(cascade_node); | ||
71 | of_node_put(cascade_node); | ||
72 | } | ||
73 | |||
51 | static void __init gef_sbc610_setup_arch(void) | 74 | static void __init gef_sbc610_setup_arch(void) |
52 | { | 75 | { |
53 | #ifdef CONFIG_PCI | 76 | #ifdef CONFIG_PCI |
@@ -145,7 +168,7 @@ define_machine(gef_sbc610) { | |||
145 | .name = "GE Fanuc SBC610", | 168 | .name = "GE Fanuc SBC610", |
146 | .probe = gef_sbc610_probe, | 169 | .probe = gef_sbc610_probe, |
147 | .setup_arch = gef_sbc610_setup_arch, | 170 | .setup_arch = gef_sbc610_setup_arch, |
148 | .init_IRQ = mpc86xx_init_irq, | 171 | .init_IRQ = gef_sbc610_init_irq, |
149 | .show_cpuinfo = gef_sbc610_show_cpuinfo, | 172 | .show_cpuinfo = gef_sbc610_show_cpuinfo, |
150 | .get_irq = mpic_get_irq, | 173 | .get_irq = mpic_get_irq, |
151 | .restart = fsl_rstcr_restart, | 174 | .restart = fsl_rstcr_restart, |