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authorPaul Mackerras <paulus@samba.org>2005-11-09 21:37:51 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-09 21:37:51 -0500
commit799d6046d3fb557006e6d7c9767fdb96479b0e0a (patch)
treefff321e3c0c0e6d1192f453aab23ad204f350851 /arch/powerpc/mm
parent3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739 (diff)
[PATCH] powerpc: merge code values for identifying platforms
This patch merges platform codes. systemcfg->platform is no longer used, systemcfg use in general is deprecated as much as possible (and renamed _systemcfg before it gets completely moved elsewhere in a future patch), _machine is now used on ppc64 along as ppc32. Platform codes aren't gone yet but we are getting a step closer. A bunch of asm code in head[_64].S is also turned into C code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/hash_utils_64.c29
-rw-r--r--arch/powerpc/mm/stab.c21
2 files changed, 40 insertions, 10 deletions
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index c8c9c2df97e..706e8a63ced 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -84,10 +84,11 @@
84extern unsigned long dart_tablebase; 84extern unsigned long dart_tablebase;
85#endif /* CONFIG_U3_DART */ 85#endif /* CONFIG_U3_DART */
86 86
87static unsigned long _SDR1;
88struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
89
87hpte_t *htab_address; 90hpte_t *htab_address;
88unsigned long htab_hash_mask; 91unsigned long htab_hash_mask;
89unsigned long _SDR1;
90struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
91int mmu_linear_psize = MMU_PAGE_4K; 92int mmu_linear_psize = MMU_PAGE_4K;
92int mmu_virtual_psize = MMU_PAGE_4K; 93int mmu_virtual_psize = MMU_PAGE_4K;
93#ifdef CONFIG_HUGETLB_PAGE 94#ifdef CONFIG_HUGETLB_PAGE
@@ -165,7 +166,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
165 * normal insert callback here. 166 * normal insert callback here.
166 */ 167 */
167#ifdef CONFIG_PPC_ISERIES 168#ifdef CONFIG_PPC_ISERIES
168 if (systemcfg->platform == PLATFORM_ISERIES_LPAR) 169 if (_machine == PLATFORM_ISERIES_LPAR)
169 ret = iSeries_hpte_insert(hpteg, va, 170 ret = iSeries_hpte_insert(hpteg, va,
170 virt_to_abs(paddr), 171 virt_to_abs(paddr),
171 tmp_mode, 172 tmp_mode,
@@ -174,7 +175,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
174 else 175 else
175#endif 176#endif
176#ifdef CONFIG_PPC_PSERIES 177#ifdef CONFIG_PPC_PSERIES
177 if (systemcfg->platform & PLATFORM_LPAR) 178 if (_machine & PLATFORM_LPAR)
178 ret = pSeries_lpar_hpte_insert(hpteg, va, 179 ret = pSeries_lpar_hpte_insert(hpteg, va,
179 virt_to_abs(paddr), 180 virt_to_abs(paddr),
180 tmp_mode, 181 tmp_mode,
@@ -293,7 +294,7 @@ static void __init htab_init_page_sizes(void)
293 * Not in the device-tree, let's fallback on known size 294 * Not in the device-tree, let's fallback on known size
294 * list for 16M capable GP & GR 295 * list for 16M capable GP & GR
295 */ 296 */
296 if ((systemcfg->platform != PLATFORM_ISERIES_LPAR) && 297 if ((_machine != PLATFORM_ISERIES_LPAR) &&
297 cpu_has_feature(CPU_FTR_16M_PAGE)) 298 cpu_has_feature(CPU_FTR_16M_PAGE))
298 memcpy(mmu_psize_defs, mmu_psize_defaults_gp, 299 memcpy(mmu_psize_defs, mmu_psize_defaults_gp,
299 sizeof(mmu_psize_defaults_gp)); 300 sizeof(mmu_psize_defaults_gp));
@@ -364,7 +365,7 @@ static int __init htab_dt_scan_pftsize(unsigned long node,
364 365
365static unsigned long __init htab_get_table_size(void) 366static unsigned long __init htab_get_table_size(void)
366{ 367{
367 unsigned long rnd_mem_size, pteg_count; 368 unsigned long mem_size, rnd_mem_size, pteg_count;
368 369
369 /* If hash size isn't already provided by the platform, we try to 370 /* If hash size isn't already provided by the platform, we try to
370 * retreive it from the device-tree. If it's not there neither, we 371 * retreive it from the device-tree. If it's not there neither, we
@@ -376,8 +377,9 @@ static unsigned long __init htab_get_table_size(void)
376 return 1UL << ppc64_pft_size; 377 return 1UL << ppc64_pft_size;
377 378
378 /* round mem_size up to next power of 2 */ 379 /* round mem_size up to next power of 2 */
379 rnd_mem_size = 1UL << __ilog2(systemcfg->physicalMemorySize); 380 mem_size = lmb_phys_mem_size();
380 if (rnd_mem_size < systemcfg->physicalMemorySize) 381 rnd_mem_size = 1UL << __ilog2(mem_size);
382 if (rnd_mem_size < mem_size)
381 rnd_mem_size <<= 1; 383 rnd_mem_size <<= 1;
382 384
383 /* # pages / 2 */ 385 /* # pages / 2 */
@@ -419,7 +421,7 @@ void __init htab_initialize(void)
419 421
420 htab_hash_mask = pteg_count - 1; 422 htab_hash_mask = pteg_count - 1;
421 423
422 if (systemcfg->platform & PLATFORM_LPAR) { 424 if (platform_is_lpar()) {
423 /* Using a hypervisor which owns the htab */ 425 /* Using a hypervisor which owns the htab */
424 htab_address = NULL; 426 htab_address = NULL;
425 _SDR1 = 0; 427 _SDR1 = 0;
@@ -440,6 +442,9 @@ void __init htab_initialize(void)
440 442
441 /* Initialize the HPT with no entries */ 443 /* Initialize the HPT with no entries */
442 memset((void *)table, 0, htab_size_bytes); 444 memset((void *)table, 0, htab_size_bytes);
445
446 /* Set SDR1 */
447 mtspr(SPRN_SDR1, _SDR1);
443 } 448 }
444 449
445 mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX; 450 mode_rw = _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX;
@@ -509,6 +514,12 @@ void __init htab_initialize(void)
509#undef KB 514#undef KB
510#undef MB 515#undef MB
511 516
517void __init htab_initialize_secondary(void)
518{
519 if (!platform_is_lpar())
520 mtspr(SPRN_SDR1, _SDR1);
521}
522
512/* 523/*
513 * Called by asm hashtable.S for doing lazy icache flush 524 * Called by asm hashtable.S for doing lazy icache flush
514 */ 525 */
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index fa325dbf98f..cfbb4e1f966 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -20,6 +20,7 @@
20#include <asm/cputable.h> 20#include <asm/cputable.h>
21#include <asm/lmb.h> 21#include <asm/lmb.h>
22#include <asm/abs_addr.h> 22#include <asm/abs_addr.h>
23#include <asm/firmware.h>
23 24
24struct stab_entry { 25struct stab_entry {
25 unsigned long esid_data; 26 unsigned long esid_data;
@@ -256,7 +257,7 @@ void stabs_alloc(void)
256 257
257 paca[cpu].stab_addr = newstab; 258 paca[cpu].stab_addr = newstab;
258 paca[cpu].stab_real = virt_to_abs(newstab); 259 paca[cpu].stab_real = virt_to_abs(newstab);
259 printk(KERN_DEBUG "Segment table for CPU %d at 0x%lx " 260 printk(KERN_INFO "Segment table for CPU %d at 0x%lx "
260 "virtual, 0x%lx absolute\n", 261 "virtual, 0x%lx absolute\n",
261 cpu, paca[cpu].stab_addr, paca[cpu].stab_real); 262 cpu, paca[cpu].stab_addr, paca[cpu].stab_real);
262 } 263 }
@@ -270,10 +271,28 @@ void stabs_alloc(void)
270void stab_initialize(unsigned long stab) 271void stab_initialize(unsigned long stab)
271{ 272{
272 unsigned long vsid = get_kernel_vsid(KERNELBASE); 273 unsigned long vsid = get_kernel_vsid(KERNELBASE);
274 unsigned long stabreal;
273 275
274 asm volatile("isync; slbia; isync":::"memory"); 276 asm volatile("isync; slbia; isync":::"memory");
275 make_ste(stab, GET_ESID(KERNELBASE), vsid); 277 make_ste(stab, GET_ESID(KERNELBASE), vsid);
276 278
277 /* Order update */ 279 /* Order update */
278 asm volatile("sync":::"memory"); 280 asm volatile("sync":::"memory");
281
282 /* Set ASR */
283 stabreal = get_paca()->stab_real | 0x1ul;
284
285#ifdef CONFIG_PPC_ISERIES
286 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
287 HvCall1(HvCallBaseSetASR, stabreal);
288 return;
289 }
290#endif /* CONFIG_PPC_ISERIES */
291#ifdef CONFIG_PPC_PSERIES
292 if (platform_is_lpar()) {
293 plpar_hcall_norets(H_SET_ASR, stabreal);
294 return;
295 }
296#endif
297 mtspr(SPRN_ASR, stabreal);
279} 298}