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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-23 12:02:42 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-23 12:02:42 -0400
commit6f73b3629f774c6cba589b15fd095112b25ca923 (patch)
tree50a60feae71cb5f40078f552b9b08468bc7b29c9 /arch/powerpc/include
parent3a8580f82024e30b31c662aa49346adf7a3bcdb5 (diff)
parent2074b1d9d53ae696dd3f49482bad43254f40f01d (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Benjamin Herrenschmidt: "Here are the powerpc goodies for 3.5. Main highlights are: - Support for the NX crypto engine in Power7+ - A bunch of Anton goodness, including some micro optimization of our syscall entry on Power7 - I converted a pile of our thermal control drivers to the new i2c APIs (essentially turning the old therm_pm72 into a proper set of windfarm drivers). That's one more step toward removing the deprecated i2c APIs, there's still a few drivers to fix, but we are getting close - kexec/kdump support for 47x embedded cores The big missing thing here is no updates from Freescale. Not sure what's up here, but with Kumar not working for them anymore things are a bit in a state of flux in that area." * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (71 commits) powerpc: Fix irq distribution Revert "powerpc/hw-breakpoint: Use generic hw-breakpoint interfaces for new PPC ptrace flags" powerpc: Fixing a cputhread code documentation powerpc/crypto: Enable the PFO-based encryption device powerpc/crypto: Build files for the nx device driver powerpc/crypto: debugfs routines and docs for the nx device driver powerpc/crypto: SHA512 hash routines for nx encryption powerpc/crypto: SHA256 hash routines for nx encryption powerpc/crypto: AES-XCBC mode routines for nx encryption powerpc/crypto: AES-GCM mode routines for nx encryption powerpc/crypto: AES-ECB mode routines for nx encryption powerpc/crypto: AES-CTR mode routines for nx encryption powerpc/crypto: AES-CCM mode routines for nx encryption powerpc/crypto: AES-CBC mode routines for nx encryption powerpc/crypto: nx driver code supporting nx encryption powerpc/pseries: Enable the PFO-based RNG accelerator powerpc/pseries/hwrng: PFO-based hwrng driver powerpc/pseries: Add PFO support to the VIO bus powerpc/pseries: Add pseries update notifier for OFDT prop changes powerpc/pseries: Add new hvcall constants to support PFO ...
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/asm-compat.h11
-rw-r--r--arch/powerpc/include/asm/cputhreads.h2
-rw-r--r--arch/powerpc/include/asm/hvcall.h25
-rw-r--r--arch/powerpc/include/asm/lppaca.h196
-rw-r--r--arch/powerpc/include/asm/lv1call.h4
-rw-r--r--arch/powerpc/include/asm/pSeries_reconfig.h12
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h10
-rw-r--r--arch/powerpc/include/asm/ptrace.h6
-rw-r--r--arch/powerpc/include/asm/switch_to.h6
-rw-r--r--arch/powerpc/include/asm/thread_info.h1
-rw-r--r--arch/powerpc/include/asm/vio.h46
11 files changed, 167 insertions, 152 deletions
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index decad950f11..5d7fbe1950f 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -29,18 +29,9 @@
29#define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh) 29#define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh)
30#define PPC_STLCX stringify_in_c(stdcx.) 30#define PPC_STLCX stringify_in_c(stdcx.)
31#define PPC_CNTLZL stringify_in_c(cntlzd) 31#define PPC_CNTLZL stringify_in_c(cntlzd)
32#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), (RS))
32#define PPC_LR_STKOFF 16 33#define PPC_LR_STKOFF 16
33#define PPC_MIN_STKFRM 112 34#define PPC_MIN_STKFRM 112
34
35/* Move to CR, single-entry optimized version. Only available
36 * on POWER4 and later.
37 */
38#ifdef CONFIG_POWER4_ONLY
39#define PPC_MTOCRF stringify_in_c(mtocrf)
40#else
41#define PPC_MTOCRF stringify_in_c(mtcrf)
42#endif
43
44#else /* 32-bit */ 35#else /* 32-bit */
45 36
46/* operations for longs and pointers */ 37/* operations for longs and pointers */
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index ce516e5eb0d..ac3eedb9b74 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -9,7 +9,7 @@
9 * Note: This implementation is limited to a power of 2 number of 9 * Note: This implementation is limited to a power of 2 number of
10 * threads per core and the same number for each core in the system 10 * threads per core and the same number for each core in the system
11 * (though it would work if some processors had less threads as long 11 * (though it would work if some processors had less threads as long
12 * as the CPU numbers are still allocated, just not brought offline). 12 * as the CPU numbers are still allocated, just not brought online).
13 * 13 *
14 * However, the API allows for a different implementation in the future 14 * However, the API allows for a different implementation in the future
15 * if needed, as long as you only use the functions and not the variables 15 * if needed, as long as you only use the functions and not the variables
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index 1c324ff55ea..61225238819 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -77,8 +77,27 @@
77#define H_MR_CONDITION -43 77#define H_MR_CONDITION -43
78#define H_NOT_ENOUGH_RESOURCES -44 78#define H_NOT_ENOUGH_RESOURCES -44
79#define H_R_STATE -45 79#define H_R_STATE -45
80#define H_RESCINDEND -46 80#define H_RESCINDED -46
81#define H_MULTI_THREADS_ACTIVE -9005 81#define H_P2 -55
82#define H_P3 -56
83#define H_P4 -57
84#define H_P5 -58
85#define H_P6 -59
86#define H_P7 -60
87#define H_P8 -61
88#define H_P9 -62
89#define H_TOO_BIG -64
90#define H_OVERLAP -68
91#define H_INTERRUPT -69
92#define H_BAD_DATA -70
93#define H_NOT_ACTIVE -71
94#define H_SG_LIST -72
95#define H_OP_MODE -73
96#define H_COP_HW -74
97#define H_UNSUPPORTED_FLAG_START -256
98#define H_UNSUPPORTED_FLAG_END -511
99#define H_MULTI_THREADS_ACTIVE -9005
100#define H_OUTSTANDING_COP_OPS -9006
82 101
83 102
84/* Long Busy is a condition that can be returned by the firmware 103/* Long Busy is a condition that can be returned by the firmware
@@ -240,6 +259,8 @@
240#define H_GET_MPP 0x2D4 259#define H_GET_MPP 0x2D4
241#define H_HOME_NODE_ASSOCIATIVITY 0x2EC 260#define H_HOME_NODE_ASSOCIATIVITY 0x2EC
242#define H_BEST_ENERGY 0x2F4 261#define H_BEST_ENERGY 0x2F4
262#define H_RANDOM 0x300
263#define H_COP 0x304
243#define H_GET_MPP_X 0x314 264#define H_GET_MPP_X 0x314
244#define MAX_HCALL_OPCODE H_GET_MPP_X 265#define MAX_HCALL_OPCODE H_GET_MPP_X
245 266
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index a76254af0aa..531fe0c3108 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -20,18 +20,16 @@
20#define _ASM_POWERPC_LPPACA_H 20#define _ASM_POWERPC_LPPACA_H
21#ifdef __KERNEL__ 21#ifdef __KERNEL__
22 22
23/* These definitions relate to hypervisors that only exist when using 23/*
24 * These definitions relate to hypervisors that only exist when using
24 * a server type processor 25 * a server type processor
25 */ 26 */
26#ifdef CONFIG_PPC_BOOK3S 27#ifdef CONFIG_PPC_BOOK3S
27 28
28//============================================================================= 29/*
29// 30 * This control block contains the data that is shared between the
30// This control block contains the data that is shared between the 31 * hypervisor and the OS.
31// hypervisor (PLIC) and the OS. 32 */
32//
33//
34//----------------------------------------------------------------------------
35#include <linux/cache.h> 33#include <linux/cache.h>
36#include <linux/threads.h> 34#include <linux/threads.h>
37#include <asm/types.h> 35#include <asm/types.h>
@@ -43,123 +41,65 @@
43 */ 41 */
44#define NR_LPPACAS 1 42#define NR_LPPACAS 1
45 43
46 44/*
47/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k 45 * The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
48 * alignment is sufficient to prevent this */ 46 * alignment is sufficient to prevent this
47 */
49struct lppaca { 48struct lppaca {
50//============================================================================= 49 /* cacheline 1 contains read-only data */
51// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 50
52// NOTE: The xDynXyz fields are fields that will be dynamically changed by 51 u32 desc; /* Eye catcher 0xD397D781 */
53// PLIC when preparing to bring a processor online or when dispatching a 52 u16 size; /* Size of this struct */
54// virtual processor! 53 u16 reserved1;
55//============================================================================= 54 u16 reserved2:14;
56 u32 desc; // Eye catcher 0xD397D781 x00-x03 55 u8 shared_proc:1; /* Shared processor indicator */
57 u16 size; // Size of this struct x04-x05 56 u8 secondary_thread:1; /* Secondary thread indicator */
58 u16 reserved1; // Reserved x06-x07 57 u8 reserved3[14];
59 u16 reserved2:14; // Reserved x08-x09 58 volatile u32 dyn_hw_node_id; /* Dynamic hardware node id */
60 u8 shared_proc:1; // Shared processor indicator ... 59 volatile u32 dyn_hw_proc_id; /* Dynamic hardware proc id */
61 u8 secondary_thread:1; // Secondary thread indicator ... 60 u8 reserved4[56];
62 volatile u8 dyn_proc_status:8; // Dynamic Status of this proc x0A-x0A 61 volatile u8 vphn_assoc_counts[8]; /* Virtual processor home node */
63 u8 secondary_thread_count; // Secondary thread count x0B-x0B 62 /* associativity change counters */
64 volatile u16 dyn_hv_phys_proc_index;// Dynamic HV Physical Proc Index0C-x0D 63 u8 reserved5[32];
65 volatile u16 dyn_hv_log_proc_index;// Dynamic HV Logical Proc Indexx0E-x0F 64
66 u32 decr_val; // Value for Decr programming x10-x13 65 /* cacheline 2 contains local read-write data */
67 u32 pmc_val; // Value for PMC regs x14-x17 66
68 volatile u32 dyn_hw_node_id; // Dynamic Hardware Node id x18-x1B 67 u8 reserved6[48];
69 volatile u32 dyn_hw_proc_id; // Dynamic Hardware Proc Id x1C-x1F 68 u8 cede_latency_hint;
70 volatile u32 dyn_pir; // Dynamic ProcIdReg value x20-x23 69 u8 reserved7[7];
71 u32 dsei_data; // DSEI data x24-x27 70 u8 dtl_enable_mask; /* Dispatch Trace Log mask */
72 u64 sprg3; // SPRG3 value x28-x2F 71 u8 donate_dedicated_cpu; /* Donate dedicated CPU cycles */
73 u8 reserved3[40]; // Reserved x30-x57 72 u8 fpregs_in_use;
74 volatile u8 vphn_assoc_counts[8]; // Virtual processor home node 73 u8 pmcregs_in_use;
75 // associativity change counters x58-x5F 74 u8 reserved8[28];
76 u8 reserved4[32]; // Reserved x60-x7F 75 u64 wait_state_cycles; /* Wait cycles for this proc */
77 76 u8 reserved9[28];
78//============================================================================= 77 u16 slb_count; /* # of SLBs to maintain */
79// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data 78 u8 idle; /* Indicate OS is idle */
80//============================================================================= 79 u8 vmxregs_in_use;
81 // This Dword contains a byte for each type of interrupt that can occur. 80
82 // The IPI is a count while the others are just a binary 1 or 0. 81 /* cacheline 3 is shared with other processors */
83 union { 82
84 u64 any_int; 83 /*
85 struct { 84 * This is the yield_count. An "odd" value (low bit on) means that
86 u16 reserved; // Reserved - cleared by #mpasmbl 85 * the processor is yielded (either because of an OS yield or a
87 u8 xirr_int; // Indicates xXirrValue is valid or Immed IO 86 * hypervisor preempt). An even value implies that the processor is
88 u8 ipi_cnt; // IPI Count 87 * currently executing.
89 u8 decr_int; // DECR interrupt occurred 88 * NOTE: This value will ALWAYS be zero for dedicated processors and
90 u8 pdc_int; // PDC interrupt occurred 89 * will NEVER be zero for shared processors (ie, initialized to a 1).
91 u8 quantum_int; // Interrupt quantum reached 90 */
92 u8 old_plic_deferred_ext_int; // Old PLIC has a deferred XIRR pending 91 volatile u32 yield_count;
93 } fields; 92 volatile u32 dispersion_count; /* dispatch changed physical cpu */
94 } int_dword; 93 volatile u64 cmo_faults; /* CMO page fault count */
95 94 volatile u64 cmo_fault_time; /* CMO page fault time */
96 // Whenever any fields in this Dword are set then PLIC will defer the 95 u8 reserved10[104];
97 // processing of external interrupts. Note that PLIC will store the 96
98 // XIRR directly into the xXirrValue field so that another XIRR will 97 /* cacheline 4-5 */
99 // not be presented until this one clears. The layout of the low 98
100 // 4-bytes of this Dword is up to SLIC - PLIC just checks whether the 99 u32 page_ins; /* CMO Hint - # page ins by OS */
101 // entire Dword is zero or not. A non-zero value in the low order 100 u8 reserved11[148];
102 // 2-bytes will result in SLIC being granted the highest thread 101 volatile u64 dtl_idx; /* Dispatch Trace Log head index */
103 // priority upon return. A 0 will return to SLIC as medium priority. 102 u8 reserved12[96];
104 u64 plic_defer_ints_area; // Entire Dword
105
106 // Used to pass the real SRR0/1 from PLIC to SLIC as well as to
107 // pass the target SRR0/1 from SLIC to PLIC on a SetAsrAndRfid.
108 u64 saved_srr0; // Saved SRR0 x10-x17
109 u64 saved_srr1; // Saved SRR1 x18-x1F
110
111 // Used to pass parms from the OS to PLIC for SetAsrAndRfid
112 u64 saved_gpr3; // Saved GPR3 x20-x27
113 u64 saved_gpr4; // Saved GPR4 x28-x2F
114 union {
115 u64 saved_gpr5; /* Saved GPR5 x30-x37 */
116 struct {
117 u8 cede_latency_hint; /* x30 */
118 u8 reserved[7]; /* x31-x36 */
119 } fields;
120 } gpr5_dword;
121
122
123 u8 dtl_enable_mask; // Dispatch Trace Log mask x38-x38
124 u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39
125 u8 fpregs_in_use; // FP regs in use x3A-x3A
126 u8 pmcregs_in_use; // PMC regs in use x3B-x3B
127 volatile u32 saved_decr; // Saved Decr Value x3C-x3F
128 volatile u64 emulated_time_base;// Emulated TB for this thread x40-x47
129 volatile u64 cur_plic_latency; // Unaccounted PLIC latency x48-x4F
130 u64 tot_plic_latency; // Accumulated PLIC latency x50-x57
131 u64 wait_state_cycles; // Wait cycles for this proc x58-x5F
132 u64 end_of_quantum; // TB at end of quantum x60-x67
133 u64 pdc_saved_sprg1; // Saved SPRG1 for PMC int x68-x6F
134 u64 pdc_saved_srr0; // Saved SRR0 for PMC int x70-x77
135 volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B
136 u16 slb_count; // # of SLBs to maintain x7C-x7D
137 u8 idle; // Indicate OS is idle x7E
138 u8 vmxregs_in_use; // VMX registers in use x7F
139
140
141//=============================================================================
142// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors
143//=============================================================================
144 // This is the yield_count. An "odd" value (low bit on) means that
145 // the processor is yielded (either because of an OS yield or a PLIC
146 // preempt). An even value implies that the processor is currently
147 // executing.
148 // NOTE: This value will ALWAYS be zero for dedicated processors and
149 // will NEVER be zero for shared processors (ie, initialized to a 1).
150 volatile u32 yield_count; // PLIC increments each dispatchx00-x03
151 volatile u32 dispersion_count; // dispatch changed phys cpu x04-x07
152 volatile u64 cmo_faults; // CMO page fault count x08-x0F
153 volatile u64 cmo_fault_time; // CMO page fault time x10-x17
154 u8 reserved7[104]; // Reserved x18-x7F
155
156//=============================================================================
157// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
158//=============================================================================
159 u32 page_ins; // CMO Hint - # page ins by OS x00-x03
160 u8 reserved8[148]; // Reserved x04-x97
161 volatile u64 dtl_idx; // Dispatch Trace Log head idx x98-x9F
162 u8 reserved9[96]; // Reserved xA0-xFF
163} __attribute__((__aligned__(0x400))); 103} __attribute__((__aligned__(0x400)));
164 104
165extern struct lppaca lppaca[]; 105extern struct lppaca lppaca[];
@@ -172,13 +112,13 @@ extern struct lppaca lppaca[];
172 * ESID is stored in the lower 64bits, then the VSID. 112 * ESID is stored in the lower 64bits, then the VSID.
173 */ 113 */
174struct slb_shadow { 114struct slb_shadow {
175 u32 persistent; // Number of persistent SLBs x00-x03 115 u32 persistent; /* Number of persistent SLBs */
176 u32 buffer_length; // Total shadow buffer length x04-x07 116 u32 buffer_length; /* Total shadow buffer length */
177 u64 reserved; // Alignment x08-x0f 117 u64 reserved;
178 struct { 118 struct {
179 u64 esid; 119 u64 esid;
180 u64 vsid; 120 u64 vsid;
181 } save_area[SLB_NUM_BOLTED]; // x10-x40 121 } save_area[SLB_NUM_BOLTED];
182} ____cacheline_aligned; 122} ____cacheline_aligned;
183 123
184extern struct slb_shadow slb_shadow[]; 124extern struct slb_shadow slb_shadow[];
diff --git a/arch/powerpc/include/asm/lv1call.h b/arch/powerpc/include/asm/lv1call.h
index 233f9ecae76..f5117674bf9 100644
--- a/arch/powerpc/include/asm/lv1call.h
+++ b/arch/powerpc/include/asm/lv1call.h
@@ -265,8 +265,8 @@ LV1_CALL(get_spe_irq_outlet, 2, 1, 78 )
265LV1_CALL(set_spe_privilege_state_area_1_register, 3, 0, 79 ) 265LV1_CALL(set_spe_privilege_state_area_1_register, 3, 0, 79 )
266LV1_CALL(create_repository_node, 6, 0, 90 ) 266LV1_CALL(create_repository_node, 6, 0, 90 )
267LV1_CALL(read_repository_node, 5, 2, 91 ) 267LV1_CALL(read_repository_node, 5, 2, 91 )
268LV1_CALL(modify_repository_node_value, 6, 0, 92 ) 268LV1_CALL(write_repository_node, 6, 0, 92 )
269LV1_CALL(remove_repository_node, 4, 0, 93 ) 269LV1_CALL(delete_repository_node, 4, 0, 93 )
270LV1_CALL(read_htab_entries, 2, 5, 95 ) 270LV1_CALL(read_htab_entries, 2, 5, 95 )
271LV1_CALL(set_dabr, 2, 0, 96 ) 271LV1_CALL(set_dabr, 2, 0, 96 )
272LV1_CALL(get_total_execution_time, 2, 1, 103 ) 272LV1_CALL(get_total_execution_time, 2, 1, 103 )
diff --git a/arch/powerpc/include/asm/pSeries_reconfig.h b/arch/powerpc/include/asm/pSeries_reconfig.h
index 23cd6cc30bc..c07edfe98b9 100644
--- a/arch/powerpc/include/asm/pSeries_reconfig.h
+++ b/arch/powerpc/include/asm/pSeries_reconfig.h
@@ -13,6 +13,18 @@
13#define PSERIES_RECONFIG_REMOVE 0x0002 13#define PSERIES_RECONFIG_REMOVE 0x0002
14#define PSERIES_DRCONF_MEM_ADD 0x0003 14#define PSERIES_DRCONF_MEM_ADD 0x0003
15#define PSERIES_DRCONF_MEM_REMOVE 0x0004 15#define PSERIES_DRCONF_MEM_REMOVE 0x0004
16#define PSERIES_UPDATE_PROPERTY 0x0005
17
18/**
19 * pSeries_reconfig_notify - Notifier value structure for OFDT property updates
20 *
21 * @node: Device tree node which owns the property being updated
22 * @property: Updated property
23 */
24struct pSeries_reconfig_prop_update {
25 struct device_node *node;
26 struct property *property;
27};
16 28
17#ifdef CONFIG_PPC_PSERIES 29#ifdef CONFIG_PPC_PSERIES
18extern int pSeries_reconfig_notifier_register(struct notifier_block *); 30extern int pSeries_reconfig_notifier_register(struct notifier_block *);
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 50f73aa2ba2..15444204a3a 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -369,7 +369,15 @@ BEGIN_FTR_SECTION \
369END_FTR_SECTION_IFCLR(CPU_FTR_601) 369END_FTR_SECTION_IFCLR(CPU_FTR_601)
370#endif 370#endif
371 371
372 372#ifdef CONFIG_PPC64
373#define MTOCRF(FXM, RS) \
374 BEGIN_FTR_SECTION_NESTED(848); \
375 mtcrf (FXM), (RS); \
376 FTR_SECTION_ELSE_NESTED(848); \
377 mtocrf (FXM), (RS); \
378 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)
379#endif
380
373/* 381/*
374 * This instruction is not implemented on the PPC 603 or 601; however, on 382 * This instruction is not implemented on the PPC 603 or 601; however, on
375 * the 403GCX and 405GP tlbia IS defined and tlbie is not. 383 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 84cc7840cd1..9c21ed42aba 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -354,12 +354,6 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
354#define PTRACE_GETREGS64 22 354#define PTRACE_GETREGS64 22
355#define PTRACE_SETREGS64 23 355#define PTRACE_SETREGS64 23
356 356
357/* (old) PTRACE requests with inverted arguments */
358#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
359#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
360#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
361#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
362
363/* Calls to trace a 64bit program from a 32bit program */ 357/* Calls to trace a 64bit program from a 32bit program */
364#define PPC_PTRACE_PEEKTEXT_3264 0x95 358#define PPC_PTRACE_PEEKTEXT_3264 0x95
365#define PPC_PTRACE_PEEKDATA_3264 0x94 359#define PPC_PTRACE_PEEKDATA_3264 0x94
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index caf82d0a00d..1a6320290d2 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -21,7 +21,6 @@ extern void disable_kernel_fp(void);
21extern void enable_kernel_fp(void); 21extern void enable_kernel_fp(void);
22extern void flush_fp_to_thread(struct task_struct *); 22extern void flush_fp_to_thread(struct task_struct *);
23extern void enable_kernel_altivec(void); 23extern void enable_kernel_altivec(void);
24extern void giveup_altivec(struct task_struct *);
25extern void load_up_altivec(struct task_struct *); 24extern void load_up_altivec(struct task_struct *);
26extern int emulate_altivec(struct pt_regs *); 25extern int emulate_altivec(struct pt_regs *);
27extern void __giveup_vsx(struct task_struct *); 26extern void __giveup_vsx(struct task_struct *);
@@ -40,10 +39,15 @@ static inline void discard_lazy_cpu_state(void)
40 39
41#ifdef CONFIG_ALTIVEC 40#ifdef CONFIG_ALTIVEC
42extern void flush_altivec_to_thread(struct task_struct *); 41extern void flush_altivec_to_thread(struct task_struct *);
42extern void giveup_altivec(struct task_struct *);
43extern void giveup_altivec_notask(void);
43#else 44#else
44static inline void flush_altivec_to_thread(struct task_struct *t) 45static inline void flush_altivec_to_thread(struct task_struct *t)
45{ 46{
46} 47}
48static inline void giveup_altivec(struct task_struct *t)
49{
50}
47#endif 51#endif
48 52
49#ifdef CONFIG_VSX 53#ifdef CONFIG_VSX
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 1a1bb00f061..a556ccc16b5 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -113,7 +113,6 @@ static inline struct thread_info *current_thread_info(void)
113#define _TIF_NOERROR (1<<TIF_NOERROR) 113#define _TIF_NOERROR (1<<TIF_NOERROR)
114#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 114#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
115#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) 115#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
116#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
117#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ 116#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
118 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT) 117 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT)
119 118
diff --git a/arch/powerpc/include/asm/vio.h b/arch/powerpc/include/asm/vio.h
index 6bfd5ffe1d4..b19adf751dd 100644
--- a/arch/powerpc/include/asm/vio.h
+++ b/arch/powerpc/include/asm/vio.h
@@ -46,6 +46,48 @@
46 46
47struct iommu_table; 47struct iommu_table;
48 48
49/*
50 * Platform Facilities Option (PFO)-specific data
51 */
52
53/* Starting unit address for PFO devices on the VIO BUS */
54#define VIO_BASE_PFO_UA 0x50000000
55
56/**
57 * vio_pfo_op - PFO operation parameters
58 *
59 * @flags: h_call subfunctions and modifiers
60 * @in: Input data block logical real address
61 * @inlen: If non-negative, the length of the input data block. If negative,
62 * the length of the input data descriptor list in bytes.
63 * @out: Output data block logical real address
64 * @outlen: If non-negative, the length of the input data block. If negative,
65 * the length of the input data descriptor list in bytes.
66 * @csbcpb: Logical real address of the 4k naturally-aligned storage block
67 * containing the CSB & optional FC field specific CPB
68 * @timeout: # of milliseconds to retry h_call, 0 for no timeout.
69 * @hcall_err: pointer to return the h_call return value, else NULL
70 */
71struct vio_pfo_op {
72 u64 flags;
73 s64 in;
74 s64 inlen;
75 s64 out;
76 s64 outlen;
77 u64 csbcpb;
78 void *done;
79 unsigned long handle;
80 unsigned int timeout;
81 long hcall_err;
82};
83
84/* End PFO specific data */
85
86enum vio_dev_family {
87 VDEVICE, /* The OF node is a child of /vdevice */
88 PFO, /* The OF node is a child of /ibm,platform-facilities */
89};
90
49/** 91/**
50 * vio_dev - This structure is used to describe virtual I/O devices. 92 * vio_dev - This structure is used to describe virtual I/O devices.
51 * 93 *
@@ -58,6 +100,7 @@ struct vio_dev {
58 const char *name; 100 const char *name;
59 const char *type; 101 const char *type;
60 uint32_t unit_address; 102 uint32_t unit_address;
103 uint32_t resource_id;
61 unsigned int irq; 104 unsigned int irq;
62 struct { 105 struct {
63 size_t desired; 106 size_t desired;
@@ -65,6 +108,7 @@ struct vio_dev {
65 size_t allocated; 108 size_t allocated;
66 atomic_t allocs_failed; 109 atomic_t allocs_failed;
67 } cmo; 110 } cmo;
111 enum vio_dev_family family;
68 struct device dev; 112 struct device dev;
69}; 113};
70 114
@@ -95,6 +139,8 @@ extern void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired);
95 139
96extern void __devinit vio_unregister_device(struct vio_dev *dev); 140extern void __devinit vio_unregister_device(struct vio_dev *dev);
97 141
142extern int vio_h_cop_sync(struct vio_dev *vdev, struct vio_pfo_op *op);
143
98struct device_node; 144struct device_node;
99 145
100extern struct vio_dev *vio_register_device_node( 146extern struct vio_dev *vio_register_device_node(
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-28 02:11:41 -0400