diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-12-07 02:22:47 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-12-07 02:22:47 -0500 |
commit | 48b1bf86c308532669571e929619e98a8d88ef54 (patch) | |
tree | f37beaafc114ca07e9fc807ca8544a4b5d5e3386 /arch/powerpc/include | |
parent | 4666ca2aa344105da0da3afda48d987c82261c05 (diff) | |
parent | 09dc34a95bfbc6062e1e7de0b96175480924aea8 (diff) |
Merge branch 'mpic' into next
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/mpic.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index e6fae49e0b7..67b4d983723 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h | |||
@@ -251,6 +251,9 @@ struct mpic_irq_save { | |||
251 | /* The instance data of a given MPIC */ | 251 | /* The instance data of a given MPIC */ |
252 | struct mpic | 252 | struct mpic |
253 | { | 253 | { |
254 | /* The OpenFirmware dt node for this MPIC */ | ||
255 | struct device_node *node; | ||
256 | |||
254 | /* The remapper for this MPIC */ | 257 | /* The remapper for this MPIC */ |
255 | struct irq_host *irqhost; | 258 | struct irq_host *irqhost; |
256 | 259 | ||
@@ -293,6 +296,9 @@ struct mpic | |||
293 | /* Register access method */ | 296 | /* Register access method */ |
294 | enum mpic_reg_type reg_type; | 297 | enum mpic_reg_type reg_type; |
295 | 298 | ||
299 | /* The physical base address of the MPIC */ | ||
300 | phys_addr_t paddr; | ||
301 | |||
296 | /* The various ioremap'ed bases */ | 302 | /* The various ioremap'ed bases */ |
297 | struct mpic_reg_bank gregs; | 303 | struct mpic_reg_bank gregs; |
298 | struct mpic_reg_bank tmregs; | 304 | struct mpic_reg_bank tmregs; |
@@ -331,11 +337,11 @@ struct mpic | |||
331 | * Note setting any ID (leaving those bits to 0) means standard MPIC | 337 | * Note setting any ID (leaving those bits to 0) means standard MPIC |
332 | */ | 338 | */ |
333 | 339 | ||
334 | /* This is the primary controller, only that one has IPIs and | 340 | /* |
335 | * has afinity control. A non-primary MPIC always uses CPU0 | 341 | * This is a secondary ("chained") controller; it only uses the CPU0 |
336 | * registers only | 342 | * registers. Primary controllers have IPIs and affinity control. |
337 | */ | 343 | */ |
338 | #define MPIC_PRIMARY 0x00000001 | 344 | #define MPIC_SECONDARY 0x00000001 |
339 | 345 | ||
340 | /* Set this for a big-endian MPIC */ | 346 | /* Set this for a big-endian MPIC */ |
341 | #define MPIC_BIG_ENDIAN 0x00000002 | 347 | #define MPIC_BIG_ENDIAN 0x00000002 |