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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/powerpc/boot
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/Makefile84
-rw-r--r--arch/powerpc/boot/dcr.h6
-rw-r--r--arch/powerpc/boot/div64.S52
-rw-r--r--arch/powerpc/boot/dts/a3m071.dts144
-rw-r--r--arch/powerpc/boot/dts/a4m072.dts168
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts4
-rw-r--r--arch/powerpc/boot/dts/bluestone.dts154
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dts34
-rw-r--r--arch/powerpc/boot/dts/bsc9131rdb.dtsi142
-rw-r--r--arch/powerpc/boot/dts/charon.dts236
-rw-r--r--arch/powerpc/boot/dts/currituck.dts237
-rw-r--r--arch/powerpc/boot/dts/digsy_mtc.dts59
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi193
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi59
-rw-r--r--arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi58
-rw-r--r--arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi52
-rw-r--r--arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi59
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi252
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi191
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi159
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi67
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi270
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi304
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi67
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi196
-rw-r--r--arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi73
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-post.dtsi202
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi67
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-post.dtsi184
-rw-r--r--arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi71
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi246
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi71
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-post.dtsi246
-rw-r--r--arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi71
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi227
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi79
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-post.dtsi201
-rw-r--r--arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi72
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi327
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi114
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi354
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi115
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi357
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi146
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi358
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi105
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi320
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi114
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi54
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi54
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi54
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi54
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi59
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi42
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi79
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi45
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi66
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi51
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi40
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi53
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi106
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi85
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi68
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi39
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi100
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi109
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi109
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi118
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/ge_imp3a.dts255
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts37
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts37
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts37
-rw-r--r--arch/powerpc/boot/dts/klondike.dts227
-rw-r--r--arch/powerpc/boot/dts/kmeter1.dts2
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts2
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts4
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts4
-rw-r--r--arch/powerpc/boot/dts/mgcoge.dts32
-rw-r--r--arch/powerpc/boot/dts/mpc5200b.dtsi8
-rw-r--r--arch/powerpc/boot/dts/mpc8308_p1m.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8308rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts8
-rw-r--r--arch/powerpc/boot/dts/mpc836x_rdk.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8377_wlan.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts460
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dtsi246
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds_36b.dts414
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts473
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dtsi209
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dtsi306
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds_32b.dts86
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds_36b.dts86
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts482
-rw-r--r--arch/powerpc/boot/dts/mpc8569mds.dts415
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts757
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dtsi428
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_36b.dts746
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts493
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts244
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts73
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts4
-rw-r--r--arch/powerpc/boot/dts/o2d.dts47
-rw-r--r--arch/powerpc/boot/dts/o2d.dtsi133
-rw-r--r--arch/powerpc/boot/dts/o2d300.dts52
-rw-r--r--arch/powerpc/boot/dts/o2dnt2.dts48
-rw-r--r--arch/powerpc/boot/dts/o2i.dts33
-rw-r--r--arch/powerpc/boot/dts/o2mnt.dts33
-rw-r--r--arch/powerpc/boot/dts/o3dnt.dts48
-rw-r--r--arch/powerpc/boot/dts/obs600.dts314
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dts234
-rw-r--r--arch/powerpc/boot/dts/p1010rdb.dtsi246
-rw-r--r--arch/powerpc/boot/dts/p1010rdb_36b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc.dtsi151
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc_32b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020mbg-pc_36b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020rdb-pc.dtsi247
-rw-r--r--arch/powerpc/boot/dts/p1020rdb-pc_32b.dts90
-rw-r--r--arch/powerpc/boot/dts/p1020rdb-pc_36b.dts90
-rw-r--r--arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts64
-rw-r--r--arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts142
-rw-r--r--arch/powerpc/boot/dts/p1020rdb.dts262
-rw-r--r--arch/powerpc/boot/dts/p1020rdb.dtsi246
-rw-r--r--arch/powerpc/boot/dts/p1020rdb_36b.dts66
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc.dtsi140
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc_32b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1020utm-pc_36b.dts89
-rw-r--r--arch/powerpc/boot/dts/p1021mds.dts428
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc.dtsi236
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc_32b.dts96
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc_36b.dts96
-rw-r--r--arch/powerpc/boot/dts/p1022ds.dtsi226
-rw-r--r--arch/powerpc/boot/dts/p1022ds_32b.dts103
-rw-r--r--arch/powerpc/boot/dts/p1022ds_36b.dts103
-rw-r--r--arch/powerpc/boot/dts/p1022rdk.dts188
-rw-r--r--arch/powerpc/boot/dts/p1023rds.dts383
-rw-r--r--arch/powerpc/boot/dts/p1024rdb.dtsi228
-rw-r--r--arch/powerpc/boot/dts/p1024rdb_32b.dts87
-rw-r--r--arch/powerpc/boot/dts/p1024rdb_36b.dts87
-rw-r--r--arch/powerpc/boot/dts/p1025rdb.dtsi326
-rw-r--r--arch/powerpc/boot/dts/p1025rdb_32b.dts135
-rw-r--r--arch/powerpc/boot/dts/p1025rdb_36b.dts88
-rw-r--r--arch/powerpc/boot/dts/p2020ds.dts348
-rw-r--r--arch/powerpc/boot/dts/p2020ds.dtsi327
-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc.dtsi241
-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc_32b.dts96
-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc_36b.dts96
-rw-r--r--arch/powerpc/boot/dts/p2020rdb.dts76
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts223
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts33
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts37
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts32
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts207
-rw-r--r--arch/powerpc/boot/dts/pcm030.dts7
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts4
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts4
-rw-r--r--arch/powerpc/boot/dts/sbc8641d.dts4
-rw-r--r--arch/powerpc/boot/dts/socrates.dts4
-rw-r--r--arch/powerpc/boot/dts/storcenter.dts4
-rw-r--r--arch/powerpc/boot/dts/stxssa8555.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts23
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts23
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts4
-rw-r--r--arch/powerpc/boot/dts/tqm8xx.dts25
-rw-r--r--arch/powerpc/boot/dts/xcalibur1501.dts4
-rw-r--r--arch/powerpc/boot/dts/xpedite5200.dts4
-rw-r--r--arch/powerpc/boot/dts/xpedite5200_xmon.dts4
-rw-r--r--arch/powerpc/boot/dts/xpedite5301.dts4
-rw-r--r--arch/powerpc/boot/dts/xpedite5330.dts4
-rw-r--r--arch/powerpc/boot/dts/xpedite5370.dts4
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts36
-rw-r--r--arch/powerpc/boot/treeboot-currituck.c119
-rwxr-xr-xarch/powerpc/boot/wrapper49
227 files changed, 5974 insertions, 19168 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 6a15c968d21..c26200b40a4 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -45,7 +45,6 @@ $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
45$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405 45$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
46$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 46$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
47$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405 47$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
48$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
49$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405 48$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
50 49
51 50
@@ -59,55 +58,34 @@ $(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \
59libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c 58libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
60libfdtheader := fdt.h libfdt.h libfdt_internal.h 59libfdtheader := fdt.h libfdt.h libfdt_internal.h
61 60
62$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \ 61$(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o): \
63 $(addprefix $(obj)/,$(libfdtheader)) 62 $(addprefix $(obj)/,$(libfdtheader))
64 63
65src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \ 64src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
66 $(libfdt) libfdt-wrapper.c \ 65 $(libfdt) libfdt-wrapper.c \
67 ns16550.c serial.c simple_alloc.c div64.S util.S \ 66 ns16550.c serial.c simple_alloc.c div64.S util.S \
68 gunzip_util.c elf_util.c $(zlib) devtree.c stdlib.c \ 67 gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
69 oflib.c ofconsole.c cuboot.c mpsc.c cpm-serial.c \ 68 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
70 uartlite.c mpc52xx-psc.c 69 cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
71src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c 70 fsl-soc.c mpc8xx.c pq2.c ugecon.c
72src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c 71src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
73src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c 72 cuboot-ebony.c cuboot-hotfoot.c epapr.c treeboot-ebony.c \
74src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c 73 prpmc2800.c \
75src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c 74 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
76 75 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
77src-plat-y := of.c 76 cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
78src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \ 77 fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
79 treeboot-walnut.c cuboot-acadia.c \ 78 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
80 cuboot-kilauea.c simpleboot.c \ 79 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
81 virtex405-head.S virtex.c 80 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
82src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \ 81 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
83 cuboot-bamboo.c cuboot-sam440ep.c \ 82 gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c
84 cuboot-sequoia.c cuboot-rainier.c \
85 cuboot-taishan.c cuboot-katmai.c \
86 cuboot-warp.c cuboot-yosemite.c \
87 treeboot-iss4xx.c treeboot-currituck.c \
88 simpleboot.c fixed-head.S virtex.c
89src-plat-$(CONFIG_8xx) += cuboot-8xx.c fixed-head.S ep88xc.c redboot-8xx.c
90src-plat-$(CONFIG_PPC_MPC52xx) += cuboot-52xx.c
91src-plat-$(CONFIG_PPC_82xx) += cuboot-pq2.c fixed-head.S ep8248e.c cuboot-824x.c
92src-plat-$(CONFIG_PPC_83xx) += cuboot-83xx.c fixed-head.S redboot-83xx.c
93src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
94src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
95 cuboot-c2k.c gamecube-head.S \
96 gamecube.c wii-head.S wii.c holly.c \
97 prpmc2800.c
98src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
99src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
100src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
101
102src-wlib := $(sort $(src-wlib-y))
103src-plat := $(sort $(src-plat-y))
104src-boot := $(src-wlib) $(src-plat) empty.c 83src-boot := $(src-wlib) $(src-plat) empty.c
105 84
106src-boot := $(addprefix $(obj)/, $(src-boot)) 85src-boot := $(addprefix $(obj)/, $(src-boot))
107obj-boot := $(addsuffix .o, $(basename $(src-boot))) 86obj-boot := $(addsuffix .o, $(basename $(src-boot)))
108obj-wlib := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-wlib)))) 87obj-wlib := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-wlib))))
109obj-plat := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-plat)))) 88obj-plat := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-plat))))
110obj-plat: $(libfdt)
111 89
112quiet_cmd_copy_zlib = COPY $@ 90quiet_cmd_copy_zlib = COPY $@
113 cmd_copy_zlib = sed "s@__used@@;s@<linux/\([^>]*\).*@\"\1\"@" $< > $@ 91 cmd_copy_zlib = sed "s@__used@@;s@<linux/\([^>]*\).*@\"\1\"@" $< > $@
@@ -193,7 +171,6 @@ quiet_cmd_wrap = WRAP $@
193 $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) vmlinux 171 $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) vmlinux
194 172
195image-$(CONFIG_PPC_PSERIES) += zImage.pseries 173image-$(CONFIG_PPC_PSERIES) += zImage.pseries
196image-$(CONFIG_PPC_POWERNV) += zImage.pseries
197image-$(CONFIG_PPC_MAPLE) += zImage.maple 174image-$(CONFIG_PPC_MAPLE) += zImage.maple
198image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries 175image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries
199image-$(CONFIG_PPC_PS3) += dtbImage.ps3 176image-$(CONFIG_PPC_PS3) += dtbImage.ps3
@@ -204,6 +181,7 @@ image-$(CONFIG_PPC_EFIKA) += zImage.chrp
204image-$(CONFIG_PPC_PMAC) += zImage.pmac 181image-$(CONFIG_PPC_PMAC) += zImage.pmac
205image-$(CONFIG_PPC_HOLLY) += dtbImage.holly 182image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
206image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800 183image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800
184image-$(CONFIG_PPC_ISERIES) += zImage.iseries
207image-$(CONFIG_DEFAULT_UIMAGE) += uImage 185image-$(CONFIG_DEFAULT_UIMAGE) += uImage
208image-$(CONFIG_EPAPR_BOOT) += zImage.epapr 186image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
209 187
@@ -220,7 +198,6 @@ image-$(CONFIG_EP405) += dtbImage.ep405
220image-$(CONFIG_HOTFOOT) += cuImage.hotfoot 198image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
221image-$(CONFIG_WALNUT) += treeImage.walnut 199image-$(CONFIG_WALNUT) += treeImage.walnut
222image-$(CONFIG_ACADIA) += cuImage.acadia 200image-$(CONFIG_ACADIA) += cuImage.acadia
223image-$(CONFIG_OBS600) += uImage.obs600
224 201
225# Board ports in arch/powerpc/platform/44x/Kconfig 202# Board ports in arch/powerpc/platform/44x/Kconfig
226image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony 203image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
@@ -234,7 +211,6 @@ image-$(CONFIG_WARP) += cuImage.warp
234image-$(CONFIG_YOSEMITE) += cuImage.yosemite 211image-$(CONFIG_YOSEMITE) += cuImage.yosemite
235image-$(CONFIG_ISS4xx) += treeImage.iss4xx \ 212image-$(CONFIG_ISS4xx) += treeImage.iss4xx \
236 treeImage.iss4xx-mpic 213 treeImage.iss4xx-mpic
237image-$(CONFIG_CURRITUCK) += treeImage.currituck
238 214
239# Board ports in arch/powerpc/platform/8xx/Kconfig 215# Board ports in arch/powerpc/platform/8xx/Kconfig
240image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads 216image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads
@@ -266,7 +242,7 @@ image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
266image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads 242image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
267image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads 243image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads
268image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \ 244image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \
269 cuImage.mpc8548cds_32b \ 245 cuImage.mpc8548cds \
270 cuImage.mpc8555cds 246 cuImage.mpc8555cds
271image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds 247image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds
272image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \ 248image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
@@ -277,6 +253,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm8548
277image-$(CONFIG_TQM8555) += cuImage.tqm8555 253image-$(CONFIG_TQM8555) += cuImage.tqm8555
278image-$(CONFIG_TQM8560) += cuImage.tqm8560 254image-$(CONFIG_TQM8560) += cuImage.tqm8560
279image-$(CONFIG_SBC8548) += cuImage.sbc8548 255image-$(CONFIG_SBC8548) += cuImage.sbc8548
256image-$(CONFIG_SBC8560) += cuImage.sbc8560
280image-$(CONFIG_KSI8560) += cuImage.ksi8560 257image-$(CONFIG_KSI8560) += cuImage.ksi8560
281 258
282# Board ports in arch/powerpc/platform/embedded6xx/Kconfig 259# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
@@ -329,15 +306,15 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
329$(obj)/vmlinux.strip: vmlinux 306$(obj)/vmlinux.strip: vmlinux
330 $(STRIP) -s -R .comment $< -o $@ 307 $(STRIP) -s -R .comment $< -o $@
331 308
309# The iseries hypervisor won't take an ET_DYN executable, so this
310# changes the type (byte 17) in the file to ET_EXEC (2).
311$(obj)/zImage.iseries: vmlinux
312 $(STRIP) -s -R .comment $< -o $@
313 printf "\x02" | dd of=$@ conv=notrunc bs=1 seek=17
314
332$(obj)/uImage: vmlinux $(wrapperbits) 315$(obj)/uImage: vmlinux $(wrapperbits)
333 $(call if_changed,wrap,uboot) 316 $(call if_changed,wrap,uboot)
334 317
335$(obj)/uImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
336 $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
337
338$(obj)/uImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
339 $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb)
340
341$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) 318$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
342 $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) 319 $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
343 320
@@ -357,8 +334,8 @@ $(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
357 $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) 334 $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb)
358 335
359# Rule to build device tree blobs 336# Rule to build device tree blobs
360$(obj)/%.dtb: $(src)/dts/%.dts FORCE 337$(obj)/%.dtb: $(src)/dts/%.dts
361 $(call if_changed_dep,dtc) 338 $(call cmd,dtc)
362 339
363# If there isn't a platform selected then just strip the vmlinux. 340# If there isn't a platform selected then just strip the vmlinux.
364ifeq (,$(image-y)) 341ifeq (,$(image-y))
@@ -376,7 +353,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
376# anything not in $(targets) 353# anything not in $(targets)
377clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \ 354clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
378 zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \ 355 zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
379 zImage.miboot zImage.pmac zImage.pseries \ 356 zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
380 zImage.maple simpleImage.* otheros.bld *.dtb 357 zImage.maple simpleImage.* otheros.bld *.dtb
381 358
382# clean up files cached by wrapper 359# clean up files cached by wrapper
@@ -431,3 +408,4 @@ $(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(
431 $(call cmd,install_wrapper) 408 $(call cmd,install_wrapper)
432 409
433$(obj)/bootwrapper_install: $(all-installed) 410$(obj)/bootwrapper_install: $(all-installed)
411
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index cc73f7a95e2..645a7c964e5 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -9,12 +9,6 @@
9 }) 9 })
10#define mtdcr(rn, val) \ 10#define mtdcr(rn, val) \
11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val)) 11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
12#define mfdcrx(rn) \
13 ({ \
14 unsigned long rval; \
15 asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
16 rval; \
17 })
18 12
19/* 440GP/440GX SDRAM controller DCRs */ 13/* 440GP/440GX SDRAM controller DCRs */
20#define DCRN_SDRAM0_CFGADDR 0x010 14#define DCRN_SDRAM0_CFGADDR 0x010
diff --git a/arch/powerpc/boot/div64.S b/arch/powerpc/boot/div64.S
index bbcb8a4cc12..d271ab54267 100644
--- a/arch/powerpc/boot/div64.S
+++ b/arch/powerpc/boot/div64.S
@@ -57,55 +57,3 @@ __div64_32:
57 stw r8,4(r3) 57 stw r8,4(r3)
58 mr r3,r6 # return the remainder in r3 58 mr r3,r6 # return the remainder in r3
59 blr 59 blr
60
61/*
62 * Extended precision shifts.
63 *
64 * Updated to be valid for shift counts from 0 to 63 inclusive.
65 * -- Gabriel
66 *
67 * R3/R4 has 64 bit value
68 * R5 has shift count
69 * result in R3/R4
70 *
71 * ashrdi3: arithmetic right shift (sign propagation)
72 * lshrdi3: logical right shift
73 * ashldi3: left shift
74 */
75 .globl __ashrdi3
76__ashrdi3:
77 subfic r6,r5,32
78 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
79 addi r7,r5,32 # could be xori, or addi with -32
80 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
81 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
82 sraw r7,r3,r7 # t2 = MSW >> (count-32)
83 or r4,r4,r6 # LSW |= t1
84 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
85 sraw r3,r3,r5 # MSW = MSW >> count
86 or r4,r4,r7 # LSW |= t2
87 blr
88
89 .globl __ashldi3
90__ashldi3:
91 subfic r6,r5,32
92 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
93 addi r7,r5,32 # could be xori, or addi with -32
94 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
95 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
96 or r3,r3,r6 # MSW |= t1
97 slw r4,r4,r5 # LSW = LSW << count
98 or r3,r3,r7 # MSW |= t2
99 blr
100
101 .globl __lshrdi3
102__lshrdi3:
103 subfic r6,r5,32
104 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
105 addi r7,r5,32 # could be xori, or addi with -32
106 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
107 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
108 or r4,r4,r6 # LSW |= t1
109 srw r3,r3,r5 # MSW = MSW >> count
110 or r4,r4,r7 # LSW |= t2
111 blr
diff --git a/arch/powerpc/boot/dts/a3m071.dts b/arch/powerpc/boot/dts/a3m071.dts
deleted file mode 100644
index 877a28cb77e..00000000000
--- a/arch/powerpc/boot/dts/a3m071.dts
+++ /dev/null
@@ -1,144 +0,0 @@
1/*
2 * a3m071 board Device Tree Source
3 *
4 * Copyright 2012 Stefan Roese <sr@denx.de>
5 *
6 * Copyright (C) 2011 DENX Software Engineering GmbH
7 * Heiko Schocher <hs@denx.de>
8 *
9 * Copyright (C) 2007 Semihalf
10 * Marian Balakowicz <m8@semihalf.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
18/include/ "mpc5200b.dtsi"
19
20/ {
21 model = "anonymous,a3m071";
22 compatible = "anonymous,a3m071";
23
24 soc5200@f0000000 {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "fsl,mpc5200b-immr";
28 ranges = <0 0xf0000000 0x0000c000>;
29 reg = <0xf0000000 0x00000100>;
30 bus-frequency = <0>; /* From boot loader */
31 system-frequency = <0>; /* From boot loader */
32
33 timer@600 {
34 fsl,has-wdt;
35 };
36
37 spi@f00 {
38 status = "disabled";
39 };
40
41 usb: usb@1000 {
42 status = "disabled";
43 };
44
45 psc@2000 {
46 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
47 reg = <0x2000 0x100>;
48 interrupts = <2 1 0>;
49 };
50
51 psc@2200 {
52 status = "disabled";
53 };
54
55 psc@2400 {
56 status = "disabled";
57 };
58
59 psc@2600 {
60 status = "disabled";
61 };
62
63 psc@2800 {
64 status = "disabled";
65 };
66
67 psc@2c00 { // PSC6
68 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
69 reg = <0x2c00 0x100>;
70 interrupts = <2 4 0>;
71 };
72
73 ethernet@3000 {
74 phy-handle = <&phy0>;
75 };
76
77 mdio@3000 {
78 phy0: ethernet-phy@3 {
79 reg = <0x03>;
80 };
81 };
82
83 ata@3a00 {
84 status = "disabled";
85 };
86
87 i2c@3d00 {
88 status = "disabled";
89 };
90
91 i2c@3d40 {
92 status = "disabled";
93 };
94 };
95
96 localbus {
97 compatible = "fsl,mpc5200b-lpb","simple-bus";
98 #address-cells = <2>;
99 #size-cells = <1>;
100 ranges = <0 0 0xfc000000 0x02000000
101 3 0 0xe9000000 0x00080000
102 5 0 0xe8000000 0x00010000>;
103
104 flash@0,0 {
105 #address-cells = <1>;
106 #size-cells = <1>;
107 reg = <0 0x0 0x02000000>;
108 compatible = "cfi-flash";
109 bank-width = <2>;
110 partition@0x0 {
111 label = "u-boot";
112 reg = <0x00000000 0x00040000>;
113 read-only;
114 };
115 partition@0x00040000 {
116 label = "env";
117 reg = <0x00040000 0x00020000>;
118 };
119 partition@0x00060000 {
120 label = "dtb";
121 reg = <0x00060000 0x00020000>;
122 };
123 partition@0x00080000 {
124 label = "kernel";
125 reg = <0x00080000 0x00500000>;
126 };
127 partition@0x00580000 {
128 label = "root";
129 reg = <0x00580000 0x00A80000>;
130 };
131 };
132
133 fpga@3,0 {
134 compatible = "anonymous,a3m071-fpga";
135 reg = <3 0x0 0x00080000
136 5 0x0 0x00010000>;
137 interrupts = <0 0 3>; /* level low */
138 };
139 };
140
141 pci@f0000d00 {
142 status = "disabled";
143 };
144};
diff --git a/arch/powerpc/boot/dts/a4m072.dts b/arch/powerpc/boot/dts/a4m072.dts
deleted file mode 100644
index fabe7b7d5f1..00000000000
--- a/arch/powerpc/boot/dts/a4m072.dts
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * a4m072 board Device Tree Source
3 *
4 * Copyright (C) 2011 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 *
7 * Copyright (C) 2007 Semihalf
8 * Marian Balakowicz <m8@semihalf.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16/include/ "mpc5200b.dtsi"
17
18/ {
19 model = "anonymous,a4m072";
20 compatible = "anonymous,a4m072";
21
22 soc5200@f0000000 {
23 #address-cells = <1>;
24 #size-cells = <1>;
25 compatible = "fsl,mpc5200b-immr";
26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
30
31 cdm@200 {
32 fsl,init-ext-48mhz-en = <0x0>;
33 fsl,init-fd-enable = <0x01>;
34 fsl,init-fd-counters = <0x3333>;
35 };
36
37 timer@600 {
38 fsl,has-wdt;
39 };
40
41 gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
42 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
43 gpio-controller;
44 #gpio-cells = <2>;
45 };
46
47 gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
48 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
49 gpio-controller;
50 #gpio-cells = <2>;
51 };
52
53 gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
54 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
55 gpio-controller;
56 #gpio-cells = <2>;
57 };
58
59 spi@f00 {
60 status = "disabled";
61 };
62
63 psc@2000 {
64 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
65 reg = <0x2000 0x100>;
66 interrupts = <2 1 0>;
67 };
68
69 psc@2200 {
70 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
71 reg = <0x2200 0x100>;
72 interrupts = <2 2 0>;
73 };
74
75 psc@2400 {
76 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
77 reg = <0x2400 0x100>;
78 interrupts = <2 3 0>;
79 };
80
81 psc@2600 {
82 status = "disabled";
83 };
84
85 psc@2800 {
86 status = "disabled";
87 };
88
89 psc@2c00 {
90 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
91 reg = <0x2c00 0x100>;
92 interrupts = <2 4 0>;
93 };
94
95 ethernet@3000 {
96 phy-handle = <&phy0>;
97 };
98
99 mdio@3000 {
100 phy0: ethernet-phy@1f {
101 reg = <0x1f>;
102 interrupts = <1 2 0>; /* IRQ 2 active low */
103 };
104 };
105
106 i2c@3d00 {
107 status = "disabled";
108 };
109
110 i2c@3d40 {
111 hwmon@2e {
112 compatible = "nsc,lm87";
113 reg = <0x2e>;
114 };
115 rtc@51 {
116 compatible = "nxp,rtc8564";
117 reg = <0x51>;
118 };
119 };
120 };
121
122 localbus {
123 compatible = "fsl,mpc5200b-lpb","simple-bus";
124 #address-cells = <2>;
125 #size-cells = <1>;
126 ranges = <0 0 0xfe000000 0x02000000
127 1 0 0x62000000 0x00400000
128 2 0 0x64000000 0x00200000
129 3 0 0x66000000 0x01000000
130 6 0 0x68000000 0x01000000
131 7 0 0x6a000000 0x00000004>;
132
133 flash@0,0 {
134 compatible = "cfi-flash";
135 reg = <0 0 0x02000000>;
136 bank-width = <2>;
137 #size-cells = <1>;
138 #address-cells = <1>;
139 };
140 sram0@1,0 {
141 compatible = "mtd-ram";
142 reg = <1 0x00000 0x00400000>;
143 bank-width = <2>;
144 };
145 };
146
147 pci@f0000d00 {
148 #interrupt-cells = <1>;
149 #size-cells = <2>;
150 #address-cells = <3>;
151 device_type = "pci";
152 compatible = "fsl,mpc5200-pci";
153 reg = <0xf0000d00 0x100>;
154 interrupt-map-mask = <0xf800 0 0 7>;
155 interrupt-map = <
156 /* IDSEL 0x16 */
157 0xc000 0 0 1 &mpc5200_pic 1 3 3
158 0xc000 0 0 2 &mpc5200_pic 1 3 3
159 0xc000 0 0 3 &mpc5200_pic 1 3 3
160 0xc000 0 0 4 &mpc5200_pic 1 3 3>;
161 clock-frequency = <0>; /* From boot loader */
162 interrupts = <2 8 0 2 9 0 2 10 0>;
163 bus-range = <0 0>;
164 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
165 0x02000000 0 0x90000000 0x90000000 0 0x10000000
166 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
167 };
168};
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 227290db866..261d10c4534 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -256,7 +256,7 @@
256 serial0: serial@4500 { 256 serial0: serial@4500 {
257 cell-index = <0>; 257 cell-index = <0>;
258 device_type = "serial"; 258 device_type = "serial";
259 compatible = "fsl,ns16550", "ns16550"; 259 compatible = "ns16550";
260 reg = <0x4500 0x100>; 260 reg = <0x4500 0x100>;
261 clock-frequency = <400000000>; 261 clock-frequency = <400000000>;
262 interrupts = <9 0x8>; 262 interrupts = <9 0x8>;
@@ -266,7 +266,7 @@
266 serial1: serial@4600 { 266 serial1: serial@4600 {
267 cell-index = <1>; 267 cell-index = <1>;
268 device_type = "serial"; 268 device_type = "serial";
269 compatible = "fsl,ns16550", "ns16550"; 269 compatible = "ns16550";
270 reg = <0x4600 0x100>; 270 reg = <0x4600 0x100>;
271 clock-frequency = <400000000>; 271 clock-frequency = <400000000>;
272 interrupts = <10 0x8>; 272 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
index 9d4917aebe6..2a56a0dbd1f 100644
--- a/arch/powerpc/boot/dts/bluestone.dts
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -33,7 +33,7 @@
33 aliases { 33 aliases {
34 ethernet0 = &EMAC0; 34 ethernet0 = &EMAC0;
35 serial0 = &UART0; 35 serial0 = &UART0;
36 serial1 = &UART1; 36 //serial1 = &UART1; --gcl missing UART1 label
37 }; 37 };
38 38
39 cpus { 39 cpus {
@@ -52,7 +52,7 @@
52 d-cache-size = <32768>; 52 d-cache-size = <32768>;
53 dcr-controller; 53 dcr-controller;
54 dcr-access-method = "native"; 54 dcr-access-method = "native";
55 next-level-cache = <&L2C0>; 55 //next-level-cache = <&L2C0>; --gcl missing L2C0 label
56 }; 56 };
57 }; 57 };
58 58
@@ -117,16 +117,6 @@
117 dcr-reg = <0x00c 0x002>; 117 dcr-reg = <0x00c 0x002>;
118 }; 118 };
119 119
120 L2C0: l2c {
121 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
122 dcr-reg = <0x020 0x008
123 0x030 0x008>;
124 cache-line-size = <32>;
125 cache-size = <262144>;
126 interrupt-parent = <&UIC1>;
127 interrupts = <11 1>;
128 };
129
130 plb { 120 plb {
131 compatible = "ibm,plb4"; 121 compatible = "ibm,plb4";
132 #address-cells = <2>; 122 #address-cells = <2>;
@@ -192,53 +182,6 @@
192 reg = <0x001a0000 0x00060000>; 182 reg = <0x001a0000 0x00060000>;
193 }; 183 };
194 }; 184 };
195
196 ndfc@1,0 {
197 compatible = "ibm,ndfc";
198 reg = <0x00000003 0x00000000 0x00002000>;
199 ccr = <0x00001000>;
200 bank-settings = <0x80002222>;
201 #address-cells = <1>;
202 #size-cells = <1>;
203 /* 2Gb Nand Flash */
204 nand {
205 #address-cells = <1>;
206 #size-cells = <1>;
207
208 partition@0 {
209 label = "firmware";
210 reg = <0x00000000 0x00C00000>;
211 };
212 partition@c00000 {
213 label = "environment";
214 reg = <0x00C00000 0x00B00000>;
215 };
216 partition@1700000 {
217 label = "kernel";
218 reg = <0x01700000 0x00E00000>;
219 };
220 partition@2500000 {
221 label = "root";
222 reg = <0x02500000 0x08200000>;
223 };
224 partition@a700000 {
225 label = "device-tree";
226 reg = <0x0A700000 0x00B00000>;
227 };
228 partition@b200000 {
229 label = "config";
230 reg = <0x0B200000 0x00D00000>;
231 };
232 partition@bf00000 {
233 label = "diag";
234 reg = <0x0BF00000 0x00C00000>;
235 };
236 partition@cb00000 {
237 label = "vendor";
238 reg = <0x0CB00000 0x3500000>;
239 };
240 };
241 };
242 }; 185 };
243 186
244 UART0: serial@ef600300 { 187 UART0: serial@ef600300 {
@@ -252,36 +195,11 @@
252 interrupts = <0x1 0x4>; 195 interrupts = <0x1 0x4>;
253 }; 196 };
254 197
255 UART1: serial@ef600400 {
256 device_type = "serial";
257 compatible = "ns16550";
258 reg = <0xef600400 0x00000008>;
259 virtual-reg = <0xef600400>;
260 clock-frequency = <0>; /* Filled in by U-Boot */
261 current-speed = <0>; /* Filled in by U-Boot */
262 interrupt-parent = <&UIC0>;
263 interrupts = <0x1 0x4>;
264 };
265
266 IIC0: i2c@ef600700 { 198 IIC0: i2c@ef600700 {
267 compatible = "ibm,iic"; 199 compatible = "ibm,iic";
268 reg = <0xef600700 0x00000014>; 200 reg = <0xef600700 0x00000014>;
269 interrupt-parent = <&UIC0>; 201 interrupt-parent = <&UIC0>;
270 interrupts = <0x2 0x4>; 202 interrupts = <0x2 0x4>;
271 #address-cells = <1>;
272 #size-cells = <0>;
273 rtc@68 {
274 compatible = "stm,m41t80";
275 reg = <0x68>;
276 interrupt-parent = <&UIC0>;
277 interrupts = <0x9 0x8>;
278 };
279 sttm@4C {
280 compatible = "adm,adm1032";
281 reg = <0x4C>;
282 interrupt-parent = <&UIC1>;
283 interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */
284 };
285 }; 203 };
286 204
287 IIC1: i2c@ef600800 { 205 IIC1: i2c@ef600800 {
@@ -304,7 +222,7 @@
304 222
305 EMAC0: ethernet@ef600c00 { 223 EMAC0: ethernet@ef600c00 {
306 device_type = "network"; 224 device_type = "network";
307 compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; 225 compatible = "ibm,emac4sync";
308 interrupt-parent = <&EMAC0>; 226 interrupt-parent = <&EMAC0>;
309 interrupts = <0x0 0x1>; 227 interrupts = <0x0 0x1>;
310 #interrupt-cells = <1>; 228 #interrupt-cells = <1>;
@@ -332,71 +250,5 @@
332 }; 250 };
333 }; 251 };
334 252
335 PCIE0: pciex@d00000000 {
336 device_type = "pci";
337 #interrupt-cells = <1>;
338 #size-cells = <2>;
339 #address-cells = <3>;
340 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
341 primary;
342 port = <0x0>; /* port number */
343 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
344 0x0000000c 0x08010000 0x00001000>; /* Registers */
345 dcr-reg = <0x100 0x020>;
346 sdr-base = <0x300>;
347
348 /* Outbound ranges, one memory and one IO,
349 * later cannot be changed
350 */
351 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
352 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
353 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
354
355 /* Inbound 2GB range starting at 0 */
356 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
357
358 /* This drives busses 40 to 0x7f */
359 bus-range = <0x40 0x7f>;
360
361 /* Legacy interrupts (note the weird polarity, the bridge seems
362 * to invert PCIe legacy interrupts).
363 * We are de-swizzling here because the numbers are actually for
364 * port of the root complex virtual P2P bridge. But I want
365 * to avoid putting a node for it in the tree, so the numbers
366 * below are basically de-swizzled numbers.
367 * The real slot is on idsel 0, so the swizzling is 1:1
368 */
369 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
370 interrupt-map = <
371 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
372 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
373 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
374 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
375 };
376
377 MSI: ppc4xx-msi@C10000000 {
378 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
379 reg = < 0xC 0x10000000 0x100
380 0xC 0x10000000 0x100>;
381 sdr-base = <0x36C>;
382 msi-data = <0x00004440>;
383 msi-mask = <0x0000ffe0>;
384 interrupts =<0 1 2 3 4 5 6 7>;
385 interrupt-parent = <&MSI>;
386 #interrupt-cells = <1>;
387 #address-cells = <0>;
388 #size-cells = <0>;
389 msi-available-ranges = <0x0 0x100>;
390 interrupt-map = <
391 0 &UIC3 0x18 1
392 1 &UIC3 0x19 1
393 2 &UIC3 0x1A 1
394 3 &UIC3 0x1B 1
395 4 &UIC3 0x1C 1
396 5 &UIC3 0x1D 1
397 6 &UIC3 0x1E 1
398 7 &UIC3 0x1F 1
399 >;
400 };
401 }; 253 };
402}; 254};
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dts b/arch/powerpc/boot/dts/bsc9131rdb.dts
deleted file mode 100644
index e13d2d4877b..00000000000
--- a/arch/powerpc/boot/dts/bsc9131rdb.dts
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * BSC9131 RDB Device Tree Source
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/bsc9131si-pre.dtsi"
13
14/ {
15 model = "fsl,bsc9131rdb";
16 compatible = "fsl,bsc9131rdb";
17
18 memory {
19 device_type = "memory";
20 };
21
22 board_ifc: ifc: ifc@ff71e000 {
23 /* NAND Flash on board */
24 ranges = <0x0 0x0 0x0 0xff800000 0x00004000>;
25 reg = <0x0 0xff71e000 0x0 0x2000>;
26 };
27
28 board_soc: soc: soc@ff700000 {
29 ranges = <0x0 0x0 0xff700000 0x100000>;
30 };
31};
32
33/include/ "bsc9131rdb.dtsi"
34/include/ "fsl/bsc9131si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
deleted file mode 100644
index 638adda2c21..00000000000
--- a/arch/powerpc/boot/dts/bsc9131rdb.dtsi
+++ /dev/null
@@ -1,142 +0,0 @@
1/*
2 * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_ifc {
36
37 nand@0,0 {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "fsl,ifc-nand";
41 reg = <0x0 0x0 0x4000>;
42
43 partition@0 {
44 /* This location must not be altered */
45 /* 3MB for u-boot Bootloader Image */
46 reg = <0x0 0x00300000>;
47 label = "NAND U-Boot Image";
48 read-only;
49 };
50
51 partition@300000 {
52 /* 1MB for DTB Image */
53 reg = <0x00300000 0x00100000>;
54 label = "NAND DTB Image";
55 };
56
57 partition@400000 {
58 /* 8MB for Linux Kernel Image */
59 reg = <0x00400000 0x00800000>;
60 label = "NAND Linux Kernel Image";
61 };
62
63 partition@c00000 {
64 /* Rest space for Root file System Image */
65 reg = <0x00c00000 0x07400000>;
66 label = "NAND RFS Image";
67 };
68 };
69};
70
71&board_soc {
72 /* BSC9131RDB does not have any device on i2c@3100 */
73 i2c@3100 {
74 status = "disabled";
75 };
76
77 spi@7000 {
78 flash@0 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "spansion,s25sl12801";
82 reg = <0>;
83 spi-max-frequency = <50000000>;
84
85 /* 512KB for u-boot Bootloader Image */
86 partition@0 {
87 reg = <0x0 0x00080000>;
88 label = "SPI Flash U-Boot Image";
89 read-only;
90 };
91
92 /* 512KB for DTB Image */
93 partition@80000 {
94 reg = <0x00080000 0x00080000>;
95 label = "SPI Flash DTB Image";
96 };
97
98 /* 4MB for Linux Kernel Image */
99 partition@100000 {
100 reg = <0x00100000 0x00400000>;
101 label = "SPI Flash Kernel Image";
102 };
103
104 /*11MB for RFS Image */
105 partition@500000 {
106 reg = <0x00500000 0x00B00000>;
107 label = "SPI Flash RFS Image";
108 };
109
110 };
111 };
112
113 usb@22000 {
114 phy_type = "ulpi";
115 };
116
117 mdio@24000 {
118 phy0: ethernet-phy@0 {
119 interrupts = <3 1 0 0>;
120 reg = <0x0>;
121 };
122
123 phy1: ethernet-phy@1 {
124 interrupts = <2 1 0 0>;
125 reg = <0x3>;
126 };
127 };
128
129 sdhci@2e000 {
130 status = "disabled";
131 };
132
133 enet0: ethernet@b0000 {
134 phy-handle = <&phy0>;
135 phy-connection-type = "rgmii-id";
136 };
137
138 enet1: ethernet@b1000 {
139 phy-handle = <&phy1>;
140 phy-connection-type = "rgmii-id";
141 };
142};
diff --git a/arch/powerpc/boot/dts/charon.dts b/arch/powerpc/boot/dts/charon.dts
deleted file mode 100644
index 0e00e508eaa..00000000000
--- a/arch/powerpc/boot/dts/charon.dts
+++ /dev/null
@@ -1,236 +0,0 @@
1/*
2 * charon board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * Copyright (C) 2010 DENX Software Engineering GmbH
8 * Heiko Schocher <hs@denx.de>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16/dts-v1/;
17
18/ {
19 model = "anon,charon";
20 compatible = "anon,charon";
21 #address-cells = <1>;
22 #size-cells = <1>;
23 interrupt-parent = <&mpc5200_pic>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,5200@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <0x4000>; // L1, 16K
35 i-cache-size = <0x4000>; // L1, 16K
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <0x00000000 0x08000000>; // 128MB
45 };
46
47 soc5200@f0000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "fsl,mpc5200-immr";
51 ranges = <0 0xf0000000 0x0000c000>;
52 reg = <0xf0000000 0x00000100>;
53 bus-frequency = <0>; // from bootloader
54 system-frequency = <0>; // from bootloader
55
56 cdm@200 {
57 compatible = "fsl,mpc5200-cdm";
58 reg = <0x200 0x38>;
59 };
60
61 mpc5200_pic: interrupt-controller@500 {
62 // 5200 interrupts are encoded into two levels;
63 interrupt-controller;
64 #interrupt-cells = <3>;
65 compatible = "fsl,mpc5200-pic";
66 reg = <0x500 0x80>;
67 };
68
69 timer@600 { // General Purpose Timer
70 compatible = "fsl,mpc5200-gpt";
71 reg = <0x600 0x10>;
72 interrupts = <1 9 0>;
73 fsl,has-wdt;
74 };
75
76 can@900 {
77 compatible = "fsl,mpc5200-mscan";
78 interrupts = <2 17 0>;
79 reg = <0x900 0x80>;
80 };
81
82 can@980 {
83 compatible = "fsl,mpc5200-mscan";
84 interrupts = <2 18 0>;
85 reg = <0x980 0x80>;
86 };
87
88 gpio_simple: gpio@b00 {
89 compatible = "fsl,mpc5200-gpio";
90 reg = <0xb00 0x40>;
91 interrupts = <1 7 0>;
92 gpio-controller;
93 #gpio-cells = <2>;
94 };
95
96 usb@1000 {
97 compatible = "fsl,mpc5200-ohci","ohci-be";
98 reg = <0x1000 0xff>;
99 interrupts = <2 6 0>;
100 };
101
102 dma-controller@1200 {
103 device_type = "dma-controller";
104 compatible = "fsl,mpc5200-bestcomm";
105 reg = <0x1200 0x80>;
106 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
107 3 4 0 3 5 0 3 6 0 3 7 0
108 3 8 0 3 9 0 3 10 0 3 11 0
109 3 12 0 3 13 0 3 14 0 3 15 0>;
110 };
111
112 xlb@1f00 {
113 compatible = "fsl,mpc5200-xlb";
114 reg = <0x1f00 0x100>;
115 };
116
117 serial@2000 { // PSC1
118 compatible = "fsl,mpc5200-psc-uart";
119 reg = <0x2000 0x100>;
120 interrupts = <2 1 0>;
121 };
122
123 serial@2400 { // PSC3
124 compatible = "fsl,mpc5200-psc-uart";
125 reg = <0x2400 0x100>;
126 interrupts = <2 3 0>;
127 };
128
129 ethernet@3000 {
130 compatible = "fsl,mpc5200-fec";
131 reg = <0x3000 0x400>;
132 local-mac-address = [ 00 00 00 00 00 00 ];
133 interrupts = <2 5 0>;
134 fixed-link = <1 1 100 0 0>;
135 };
136
137 mdio@3000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 compatible = "fsl,mpc5200-mdio";
141 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
142 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
143 };
144
145 ata@3a00 {
146 compatible = "fsl,mpc5200-ata";
147 reg = <0x3a00 0x100>;
148 interrupts = <2 7 0>;
149 };
150
151 i2c@3d00 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 compatible = "fsl,mpc5200-i2c","fsl-i2c";
155 reg = <0x3d00 0x40>;
156 interrupts = <2 15 0>;
157 };
158
159
160 i2c@3d40 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,mpc5200-i2c","fsl-i2c";
164 reg = <0x3d40 0x40>;
165 interrupts = <2 16 0>;
166
167 dtt@28 {
168 compatible = "national,lm80";
169 reg = <0x28>;
170 };
171
172 rtc@68 {
173 compatible = "dallas,ds1374";
174 reg = <0x68>;
175 };
176 };
177
178 sram@8000 {
179 compatible = "fsl,mpc5200-sram";
180 reg = <0x8000 0x4000>;
181 };
182 };
183
184 localbus {
185 compatible = "fsl,mpc5200-lpb","simple-bus";
186 #address-cells = <2>;
187 #size-cells = <1>;
188 ranges = < 0 0 0xfc000000 0x02000000
189 1 0 0xe0000000 0x04000000 // CS1 range, SM501
190 3 0 0xe8000000 0x00080000>;
191
192 flash@0,0 {
193 compatible = "cfi-flash";
194 reg = <0 0 0x02000000>;
195 bank-width = <4>;
196 device-width = <2>;
197 #size-cells = <1>;
198 #address-cells = <1>;
199 };
200
201 display@1,0 {
202 compatible = "smi,sm501";
203 reg = <1 0x00000000 0x00800000
204 1 0x03e00000 0x00200000>;
205 mode = "640x480-32@60";
206 interrupts = <1 1 3>;
207 little-endian;
208 };
209
210 mram0@3,0 {
211 compatible = "mtd-ram";
212 reg = <3 0x00000 0x80000>;
213 bank-width = <1>;
214 };
215 };
216
217 pci@f0000d00 {
218 #interrupt-cells = <1>;
219 #size-cells = <2>;
220 #address-cells = <3>;
221 device_type = "pci";
222 compatible = "fsl,mpc5200-pci";
223 reg = <0xf0000d00 0x100>;
224 interrupt-map-mask = <0xf800 0 0 7>;
225 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
226 0xc000 0 0 2 &mpc5200_pic 0 0 3
227 0xc000 0 0 3 &mpc5200_pic 0 0 3
228 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
229 clock-frequency = <0>; // From boot loader
230 interrupts = <2 8 0 2 9 0 2 10 0>;
231 bus-range = <0 0>;
232 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
233 0x02000000 0 0x90000000 0x90000000 0 0x10000000
234 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
235 };
236};
diff --git a/arch/powerpc/boot/dts/currituck.dts b/arch/powerpc/boot/dts/currituck.dts
deleted file mode 100644
index b801dd06e57..00000000000
--- a/arch/powerpc/boot/dts/currituck.dts
+++ /dev/null
@@ -1,237 +0,0 @@
1/*
2 * Device Tree Source for IBM Embedded PPC 476 Platform
3 *
4 * Copyright © 2011 Tony Breeds IBM Corporation
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/memreserve/ 0x01f00000 0x00100000; // spin table
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <2>;
18 model = "ibm,currituck";
19 compatible = "ibm,currituck";
20 dcr-parent = <&{/cpus/cpu@0}>;
21
22 aliases {
23 serial0 = &UART0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 model = "PowerPC,476";
33 reg = <0>;
34 clock-frequency = <1600000000>; // 1.6 GHz
35 timebase-frequency = <100000000>; // 100Mhz
36 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <32768>;
39 d-cache-size = <32768>;
40 dcr-controller;
41 dcr-access-method = "native";
42 status = "ok";
43 };
44 cpu@1 {
45 device_type = "cpu";
46 model = "PowerPC,476";
47 reg = <1>;
48 clock-frequency = <1600000000>; // 1.6 GHz
49 timebase-frequency = <100000000>; // 100Mhz
50 i-cache-line-size = <32>;
51 d-cache-line-size = <32>;
52 i-cache-size = <32768>;
53 d-cache-size = <32768>;
54 dcr-controller;
55 dcr-access-method = "native";
56 status = "disabled";
57 enable-method = "spin-table";
58 cpu-release-addr = <0x0 0x01f00000>;
59 };
60 };
61
62 memory {
63 device_type = "memory";
64 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
65 };
66
67 MPIC: interrupt-controller {
68 compatible = "chrp,open-pic";
69 interrupt-controller;
70 dcr-reg = <0xffc00000 0x00040000>;
71 #address-cells = <0>;
72 #size-cells = <0>;
73 #interrupt-cells = <2>;
74
75 };
76
77 plb {
78 compatible = "ibm,plb6";
79 #address-cells = <2>;
80 #size-cells = <2>;
81 ranges;
82 clock-frequency = <200000000>; // 200Mhz
83
84 POB0: opb {
85 compatible = "ibm,opb-4xx", "ibm,opb";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 /* Wish there was a nicer way of specifying a full
89 * 32-bit range
90 */
91 ranges = <0x00000000 0x00000200 0x00000000 0x80000000
92 0x80000000 0x00000200 0x80000000 0x80000000>;
93 clock-frequency = <100000000>;
94
95 UART0: serial@10000000 {
96 device_type = "serial";
97 compatible = "ns16750", "ns16550";
98 reg = <0x10000000 0x00000008>;
99 virtual-reg = <0xe1000000>;
100 clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
101 current-speed = <115200>;
102 interrupt-parent = <&MPIC>;
103 interrupts = <34 2>;
104 };
105
106 IIC0: i2c@00000000 {
107 compatible = "ibm,iic-currituck", "ibm,iic";
108 reg = <0x0 0x00000014>;
109 interrupt-parent = <&MPIC>;
110 interrupts = <79 2>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 rtc@68 {
114 compatible = "stm,m41t80", "m41st85";
115 reg = <0x68>;
116 };
117 };
118 };
119
120 PCIE0: pciex@10100000000 { // 4xGBIF1
121 device_type = "pci";
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
126 primary;
127 port = <0x0>; /* port number */
128 reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */
129 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
130 dcr-reg = <0x80 0x20>;
131
132// pci_space < pci_addr > < cpu_addr > < size >
133 ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
134 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>;
135
136 /* Inbound starting at 0 to memsize filled in by zImage */
137 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
138
139 /* This drives busses 0 to 0xf */
140 bus-range = <0x0 0xf>;
141
142 /* Legacy interrupts (note the weird polarity, the bridge seems
143 * to invert PCIe legacy interrupts).
144 * We are de-swizzling here because the numbers are actually for
145 * port of the root complex virtual P2P bridge. But I want
146 * to avoid putting a node for it in the tree, so the numbers
147 * below are basically de-swizzled numbers.
148 * The real slot is on idsel 0, so the swizzling is 1:1
149 */
150 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
151 interrupt-map = <
152 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */
153 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */
154 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */
155 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>;
156 };
157
158 PCIE1: pciex@30100000000 { // 4xGBIF0
159 device_type = "pci";
160 #interrupt-cells = <1>;
161 #size-cells = <2>;
162 #address-cells = <3>;
163 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
164 primary;
165 port = <0x1>; /* port number */
166 reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */
167 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
168 dcr-reg = <0x60 0x20>;
169
170 ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000
171 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>;
172
173 /* Inbound starting at 0 to memsize filled in by zImage */
174 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
175
176 /* This drives busses 0 to 0xf */
177 bus-range = <0x0 0xf>;
178
179 /* Legacy interrupts (note the weird polarity, the bridge seems
180 * to invert PCIe legacy interrupts).
181 * We are de-swizzling here because the numbers are actually for
182 * port of the root complex virtual P2P bridge. But I want
183 * to avoid putting a node for it in the tree, so the numbers
184 * below are basically de-swizzled numbers.
185 * The real slot is on idsel 0, so the swizzling is 1:1
186 */
187 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
188 interrupt-map = <
189 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */
190 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */
191 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */
192 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>;
193 };
194
195 PCIE2: pciex@38100000000 { // 2xGBIF0
196 device_type = "pci";
197 #interrupt-cells = <1>;
198 #size-cells = <2>;
199 #address-cells = <3>;
200 compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
201 primary;
202 port = <0x2>; /* port number */
203 reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */
204 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
205 dcr-reg = <0xA0 0x20>;
206
207 ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000
208 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>;
209
210 /* Inbound starting at 0 to memsize filled in by zImage */
211 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
212
213 /* This drives busses 0 to 0xf */
214 bus-range = <0x0 0xf>;
215
216 /* Legacy interrupts (note the weird polarity, the bridge seems
217 * to invert PCIe legacy interrupts).
218 * We are de-swizzling here because the numbers are actually for
219 * port of the root complex virtual P2P bridge. But I want
220 * to avoid putting a node for it in the tree, so the numbers
221 * below are basically de-swizzled numbers.
222 * The real slot is on idsel 0, so the swizzling is 1:1
223 */
224 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
225 interrupt-map = <
226 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */
227 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */
228 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */
229 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>;
230 };
231
232 };
233
234 chosen {
235 linux,stdout-path = &UART0;
236 };
237};
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
index a7511f2d844..27bd267d631 100644
--- a/arch/powerpc/boot/dts/digsy_mtc.dts
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -23,26 +23,19 @@
23 23
24 soc5200@f0000000 { 24 soc5200@f0000000 {
25 timer@600 { // General Purpose Timer 25 timer@600 { // General Purpose Timer
26 #gpio-cells = <2>;
27 fsl,has-wdt; 26 fsl,has-wdt;
28 gpio-controller;
29 }; 27 };
30 28
31 timer@610 { 29 rtc@800 {
32 #gpio-cells = <2>; 30 status = "disabled";
33 gpio-controller;
34 }; 31 };
35 32
36 rtc@800 { 33 can@900 {
37 status = "disabled"; 34 status = "disabled";
38 }; 35 };
39 36
40 spi@f00 { 37 can@980 {
41 msp430@0 { 38 status = "disabled";
42 compatible = "spidev";
43 spi-max-frequency = <32000>;
44 reg = <0>;
45 };
46 }; 39 };
47 40
48 psc@2000 { // PSC1 41 psc@2000 { // PSC1
@@ -80,16 +73,11 @@
80 }; 73 };
81 74
82 i2c@3d00 { 75 i2c@3d00 {
83 eeprom@50 { 76 rtc@50 {
84 compatible = "at,24c08"; 77 compatible = "at,24c08";
85 reg = <0x50>; 78 reg = <0x50>;
86 }; 79 };
87 80
88 rtc@56 {
89 compatible = "mc,rv3029c2";
90 reg = <0x56>;
91 };
92
93 rtc@68 { 81 rtc@68 {
94 compatible = "dallas,ds1339"; 82 compatible = "dallas,ds1339";
95 reg = <0x68>; 83 reg = <0x68>;
@@ -102,22 +90,11 @@
102 }; 90 };
103 91
104 pci@f0000d00 { 92 pci@f0000d00 {
105 interrupt-map-mask = <0xf800 0 0 7>; 93 status = "disabled";
106 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
107 0xc000 0 0 2 &mpc5200_pic 0 0 3
108 0xc000 0 0 3 &mpc5200_pic 0 0 3
109 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
110 clock-frequency = <0>; // From boot loader
111 interrupts = <2 8 0 2 9 0 2 10 0>;
112 bus-range = <0 0>;
113 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
114 0x02000000 0 0x90000000 0x90000000 0 0x10000000
115 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
116 }; 94 };
117 95
118 localbus { 96 localbus {
119 ranges = <0 0 0xff000000 0x1000000 97 ranges = <0 0 0xff000000 0x1000000>;
120 4 0 0x60000000 0x0001000>;
121 98
122 // 16-bit flash device at LocalPlus Bus CS0 99 // 16-bit flash device at LocalPlus Bus CS0
123 flash@0,0 { 100 flash@0,0 {
@@ -145,25 +122,5 @@
145 reg = <0x00f00000 0x100000>; 122 reg = <0x00f00000 0x100000>;
146 }; 123 };
147 }; 124 };
148
149 can@4,0 {
150 compatible = "nxp,sja1000";
151 reg = <4 0x000 0x80>;
152 nxp,external-clock-frequency = <24000000>;
153 interrupts = <1 2 3>; // Level-low
154 };
155
156 can@4,100 {
157 compatible = "nxp,sja1000";
158 reg = <4 0x100 0x80>;
159 nxp,external-clock-frequency = <24000000>;
160 interrupts = <1 2 3>; // Level-low
161 };
162
163 serial@4,200 {
164 compatible = "nxp,sc28l92";
165 reg = <4 0x200 0x10>;
166 interrupts = <1 3 3>;
167 };
168 }; 125 };
169}; 126};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
deleted file mode 100644
index 5180d9d3798..00000000000
--- a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * BSC9131 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <16 2 0 0 20 2 0 0>;
40};
41
42&soc {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 device_type = "soc";
46 compatible = "fsl,bsc9131-immr", "simple-bus";
47 bus-frequency = <0>; // Filled out by uboot.
48
49 ecm-law@0 {
50 compatible = "fsl,ecm-law";
51 reg = <0x0 0x1000>;
52 fsl,num-laws = <12>;
53 };
54
55 ecm@1000 {
56 compatible = "fsl,bsc9131-ecm", "fsl,ecm";
57 reg = <0x1000 0x1000>;
58 interrupts = <16 2 0 0>;
59 };
60
61 memory-controller@2000 {
62 compatible = "fsl,bsc9131-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupts = <16 2 0 0>;
65 };
66
67/include/ "pq3-i2c-0.dtsi"
68 i2c@3000 {
69 interrupts = <17 2 0 0>;
70 };
71
72/include/ "pq3-i2c-1.dtsi"
73 i2c@3100 {
74 interrupts = <17 2 0 0>;
75 };
76
77/include/ "pq3-duart-0.dtsi"
78 serial0: serial@4500 {
79 interrupts = <18 2 0 0>;
80 };
81
82 serial1: serial@4600 {
83 interrupts = <18 2 0 0 >;
84 };
85/include/ "pq3-espi-0.dtsi"
86 spi0: spi@7000 {
87 fsl,espi-num-chipselects = <1>;
88 interrupts = <22 0x2 0 0>;
89 };
90
91/include/ "pq3-gpio-0.dtsi"
92 gpio-controller@f000 {
93 interrupts = <19 0x2 0 0>;
94 };
95
96 L2: l2-cache-controller@20000 {
97 compatible = "fsl,bsc9131-l2-cache-controller";
98 reg = <0x20000 0x1000>;
99 cache-line-size = <32>; // 32 bytes
100 cache-size = <0x40000>; // L2,256K
101 interrupts = <16 2 0 0>;
102 };
103
104/include/ "pq3-dma-0.dtsi"
105
106dma@21300 {
107
108 dma-channel@0 {
109 interrupts = <62 2 0 0>;
110 };
111
112 dma-channel@80 {
113 interrupts = <63 2 0 0>;
114 };
115
116 dma-channel@100 {
117 interrupts = <64 2 0 0>;
118 };
119
120 dma-channel@180 {
121 interrupts = <65 2 0 0>;
122 };
123};
124
125/include/ "pq3-usb2-dr-0.dtsi"
126usb@22000 {
127 compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
128 interrupts = <40 0x2 0 0>;
129};
130
131/include/ "pq3-esdhc-0.dtsi"
132 sdhc@2e000 {
133 fsl,sdhci-auto-cmd12;
134 interrupts = <41 0x2 0 0>;
135 };
136
137/include/ "pq3-sec4.4-0.dtsi"
138crypto@30000 {
139 interrupts = <57 2 0 0>;
140
141 sec_jr0: jr@1000 {
142 interrupts = <58 2 0 0>;
143 };
144
145 sec_jr1: jr@2000 {
146 interrupts = <59 2 0 0>;
147 };
148
149 sec_jr2: jr@3000 {
150 interrupts = <60 2 0 0>;
151 };
152
153 sec_jr3: jr@4000 {
154 interrupts = <61 2 0 0>;
155 };
156};
157
158/include/ "pq3-mpic.dtsi"
159
160timer@41100 {
161 compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
162 reg = <0x41400 0x200>;
163 interrupts = <
164 0xb0 2
165 0xb1 2
166 0xb2 2
167 0xb3 2>;
168};
169
170/include/ "pq3-etsec2-0.dtsi"
171enet0: ethernet@b0000 {
172 queue-group@b0000 {
173 fsl,rx-bit-map = <0xff>;
174 fsl,tx-bit-map = <0xff>;
175 interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
176 };
177};
178
179/include/ "pq3-etsec2-1.dtsi"
180enet1: ethernet@b1000 {
181 queue-group@b1000 {
182 fsl,rx-bit-map = <0xff>;
183 fsl,tx-bit-map = <0xff>;
184 interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
185 };
186};
187
188global-utilities@e0000 {
189 compatible = "fsl,bsc9131-guts";
190 reg = <0xe0000 0x1000>;
191 fsl,has-rstcr;
192 };
193};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
deleted file mode 100644
index 743e4aeda34..00000000000
--- a/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * BSC9131 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,BSC9131";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 ethernet0 = &enet0;
45 ethernet1 = &enet1;
46 };
47
48 cpus {
49 #address-cells = <1>;
50 #size-cells = <0>;
51
52 PowerPC,BSC9131@0 {
53 device_type = "cpu";
54 compatible = "fsl,e500v2";
55 reg = <0x0>;
56 next-level-cache = <&L2>;
57 };
58 };
59};
diff --git a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
deleted file mode 100644
index 870c6535a05..00000000000
--- a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * e500mc Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
46 power-isa-e.le; // Embedded.Little-Endian
47 power-isa-e.pm; // Embedded.Performance Monitor
48 power-isa-e.pc; // Embedded.Processor Control
49 power-isa-ecl; // Embedded Cache Locking
50 power-isa-exp; // External Proxy
51 power-isa-fp; // Floating Point
52 power-isa-fp.r; // Floating Point.Record
53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait
56 mmu-type = "power-embedded";
57 };
58};
diff --git a/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
deleted file mode 100644
index f4928144d2c..00000000000
--- a/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * e500v2 Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.03";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-e.le; // Embedded.Little-Endian
43 power-isa-e.pm; // Embedded.Performance Monitor
44 power-isa-ecl; // Embedded Cache Locking
45 power-isa-mmc; // Memory Coherence
46 power-isa-sp; // Signal Processing Engine
47 power-isa-sp.fd; // SPE.Embedded Float Scalar Double
48 power-isa-sp.fs; // SPE.Embedded Float Scalar Single
49 power-isa-sp.fv; // SPE.Embedded Float Vector
50 mmu-type = "power-embedded";
51 };
52};
diff --git a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
deleted file mode 100644
index 3230212f7ad..00000000000
--- a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * e5500 Power ISA Device Tree Source (include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
46 power-isa-e.le; // Embedded.Little-Endian
47 power-isa-e.pm; // Embedded.Performance Monitor
48 power-isa-e.pc; // Embedded.Processor Control
49 power-isa-ecl; // Embedded Cache Locking
50 power-isa-exp; // External Proxy
51 power-isa-fp; // Floating Point
52 power-isa-fp.r; // Floating Point.Record
53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait
56 power-isa-64; // 64-bit
57 mmu-type = "power-embedded";
58 };
59};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
deleted file mode 100644
index c8b2daa40ac..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
+++ /dev/null
@@ -1,252 +0,0 @@
1/*
2 * MPC8536 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8548-pcie";
56 device_type = "pci";
57 #size-cells = <2>;
58 #address-cells = <3>;
59 bus-range = <0 255>;
60 clock-frequency = <33333333>;
61 interrupts = <25 2 0 0>;
62
63 pcie@0 {
64 reg = <0 0 0 0 0>;
65 #interrupt-cells = <1>;
66 #size-cells = <2>;
67 #address-cells = <3>;
68 device_type = "pci";
69 interrupts = <25 2 0 0>;
70 interrupt-map-mask = <0xf800 0 0 7>;
71
72 interrupt-map = <
73 /* IDSEL 0x0 */
74 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
75 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
76 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
77 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
78 >;
79 };
80};
81
82/* controller at 0xa000 */
83&pci2 {
84 compatible = "fsl,mpc8548-pcie";
85 device_type = "pci";
86 #size-cells = <2>;
87 #address-cells = <3>;
88 bus-range = <0 255>;
89 clock-frequency = <33333333>;
90 interrupts = <26 2 0 0>;
91
92 pcie@0 {
93 reg = <0 0 0 0 0>;
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
97 device_type = "pci";
98 interrupts = <26 2 0 0>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
101 /* IDSEL 0x0 */
102 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
103 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
104 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
105 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
106 >;
107 };
108};
109
110/* controller at 0xb000 */
111&pci3 {
112 compatible = "fsl,mpc8548-pcie";
113 device_type = "pci";
114 #size-cells = <2>;
115 #address-cells = <3>;
116 bus-range = <0 255>;
117 clock-frequency = <33333333>;
118 interrupts = <27 2 0 0>;
119
120 pcie@0 {
121 reg = <0 0 0 0 0>;
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 device_type = "pci";
126 interrupts = <27 2 0 0>;
127 interrupt-map-mask = <0xf800 0 0 7>;
128 interrupt-map = <
129 /* IDSEL 0x0 */
130 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
131 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
132 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
133 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
134 >;
135 };
136};
137&soc {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 device_type = "soc";
141 compatible = "fsl,mpc8536-immr", "simple-bus";
142 bus-frequency = <0>; // Filled out by uboot.
143
144 ecm-law@0 {
145 compatible = "fsl,ecm-law";
146 reg = <0x0 0x1000>;
147 fsl,num-laws = <12>;
148 };
149
150 ecm@1000 {
151 compatible = "fsl,mpc8536-ecm", "fsl,ecm";
152 reg = <0x1000 0x1000>;
153 interrupts = <17 2 0 0>;
154 };
155
156 memory-controller@2000 {
157 compatible = "fsl,mpc8536-memory-controller";
158 reg = <0x2000 0x1000>;
159 interrupts = <18 2 0 0>;
160 };
161
162/include/ "pq3-i2c-0.dtsi"
163/include/ "pq3-i2c-1.dtsi"
164/include/ "pq3-duart-0.dtsi"
165
166/include/ "pq3-espi-0.dtsi"
167 spi@7000 {
168 fsl,espi-num-chipselects = <4>;
169 };
170
171/include/ "pq3-gpio-0.dtsi"
172
173 /* mark compat w/8572 to get some erratum treatment */
174 gpio-controller@f000 {
175 compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
176 };
177
178 sata@18000 {
179 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
180 reg = <0x18000 0x1000>;
181 cell-index = <1>;
182 interrupts = <74 0x2 0 0>;
183 };
184
185 sata@19000 {
186 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
187 reg = <0x19000 0x1000>;
188 cell-index = <2>;
189 interrupts = <41 0x2 0 0>;
190 };
191
192 L2: l2-cache-controller@20000 {
193 compatible = "fsl,mpc8536-l2-cache-controller";
194 reg = <0x20000 0x1000>;
195 cache-line-size = <32>; // 32 bytes
196 cache-size = <0x80000>; // L2, 512K
197 interrupts = <16 2 0 0>;
198 };
199
200/include/ "pq3-dma-0.dtsi"
201/include/ "pq3-etsec1-0.dtsi"
202/include/ "pq3-etsec1-timer-0.dtsi"
203
204 usb@22000 {
205 compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
206 reg = <0x22000 0x1000>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 interrupts = <28 0x2 0 0>;
210 };
211
212 usb@23000 {
213 compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
214 reg = <0x23000 0x1000>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 interrupts = <46 0x2 0 0>;
218 };
219
220 ptp_clock@24e00 {
221 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
222 };
223
224/include/ "pq3-etsec1-2.dtsi"
225
226 ethernet@26000 {
227 cell-index = <1>;
228 };
229
230 usb@2b000 {
231 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
232 reg = <0x2b000 0x1000>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 interrupts = <60 0x2 0 0>;
236 };
237
238/include/ "pq3-esdhc-0.dtsi"
239 sdhc@2e000 {
240 compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
241 };
242
243/include/ "pq3-sec3.0-0.dtsi"
244/include/ "pq3-mpic.dtsi"
245/include/ "pq3-mpic-timer-B.dtsi"
246
247 global-utilities@e0000 {
248 compatible = "fsl,mpc8536-guts";
249 reg = <0xe0000 0x1000>;
250 fsl,has-rstcr;
251 };
252};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
deleted file mode 100644
index 152906f98a0..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * MPC8536 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8536";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet2;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 pci3 = &pci3;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 PowerPC,8536@0 {
61 device_type = "cpu";
62 reg = <0x0>;
63 next-level-cache = <&L2>;
64 };
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
deleted file mode 100644
index b68eb119fae..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * MPC8544 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8548-pcie";
56 device_type = "pci";
57 #size-cells = <2>;
58 #address-cells = <3>;
59 bus-range = <0 255>;
60 clock-frequency = <33333333>;
61 interrupts = <25 2 0 0>;
62
63 pcie@0 {
64 reg = <0 0 0 0 0>;
65 #interrupt-cells = <1>;
66 #size-cells = <2>;
67 #address-cells = <3>;
68 device_type = "pci";
69 interrupts = <25 2 0 0>;
70 interrupt-map-mask = <0xf800 0 0 7>;
71
72 interrupt-map = <
73 /* IDSEL 0x0 */
74 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
75 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
76 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
77 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
78 >;
79 };
80};
81
82/* controller at 0xa000 */
83&pci2 {
84 compatible = "fsl,mpc8548-pcie";
85 device_type = "pci";
86 #size-cells = <2>;
87 #address-cells = <3>;
88 bus-range = <0 255>;
89 clock-frequency = <33333333>;
90 interrupts = <26 2 0 0>;
91
92 pcie@0 {
93 reg = <0 0 0 0 0>;
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
97 device_type = "pci";
98 interrupts = <26 2 0 0>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
101 /* IDSEL 0x0 */
102 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
103 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
104 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
105 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
106 >;
107 };
108};
109
110/* controller at 0xb000 */
111&pci3 {
112 compatible = "fsl,mpc8548-pcie";
113 device_type = "pci";
114 #size-cells = <2>;
115 #address-cells = <3>;
116 bus-range = <0 255>;
117 clock-frequency = <33333333>;
118 interrupts = <27 2 0 0>;
119
120 pcie@0 {
121 reg = <0 0 0 0 0>;
122 #interrupt-cells = <1>;
123 #size-cells = <2>;
124 #address-cells = <3>;
125 device_type = "pci";
126 interrupts = <27 2 0 0>;
127 interrupt-map-mask = <0xf800 0 0 7>;
128 interrupt-map = <
129 /* IDSEL 0x0 */
130 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
131 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
132 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
133 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
134 >;
135 };
136};
137
138&soc {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 device_type = "soc";
142 compatible = "fsl,mpc8544-immr", "simple-bus";
143 bus-frequency = <0>; // Filled out by uboot.
144
145 ecm-law@0 {
146 compatible = "fsl,ecm-law";
147 reg = <0x0 0x1000>;
148 fsl,num-laws = <10>;
149 };
150
151 ecm@1000 {
152 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
153 reg = <0x1000 0x1000>;
154 interrupts = <17 2 0 0>;
155 };
156
157 memory-controller@2000 {
158 compatible = "fsl,mpc8544-memory-controller";
159 reg = <0x2000 0x1000>;
160 interrupts = <18 2 0 0>;
161 };
162
163/include/ "pq3-i2c-0.dtsi"
164/include/ "pq3-i2c-1.dtsi"
165/include/ "pq3-duart-0.dtsi"
166
167 L2: l2-cache-controller@20000 {
168 compatible = "fsl,mpc8544-l2-cache-controller";
169 reg = <0x20000 0x1000>;
170 cache-line-size = <32>; // 32 bytes
171 cache-size = <0x40000>; // L2, 256K
172 interrupts = <16 2 0 0>;
173 };
174
175/include/ "pq3-dma-0.dtsi"
176/include/ "pq3-etsec1-0.dtsi"
177/include/ "pq3-etsec1-2.dtsi"
178
179 ethernet@26000 {
180 cell-index = <1>;
181 };
182
183/include/ "pq3-sec2.1-0.dtsi"
184/include/ "pq3-mpic.dtsi"
185
186 global-utilities@e0000 {
187 compatible = "fsl,mpc8544-guts";
188 reg = <0xe0000 0x1000>;
189 fsl,has-rstcr;
190 };
191};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
deleted file mode 100644
index 5a69bafb652..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * MPC8544 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8544";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet2;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 pci3 = &pci3;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 PowerPC,8544@0 {
61 device_type = "cpu";
62 reg = <0x0>;
63 next-level-cache = <&L2>;
64 };
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
deleted file mode 100644
index 579d76cb8e3..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * MPC8548 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
45 device_type = "pci";
46 interrupts = <24 0x2 0 0>;
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
51};
52
53/* controller at 0x9000 */
54&pci1 {
55 compatible = "fsl,mpc8540-pci";
56 device_type = "pci";
57 interrupts = <25 0x2 0 0>;
58 bus-range = <0 0xff>;
59 #interrupt-cells = <1>;
60 #size-cells = <2>;
61 #address-cells = <3>;
62};
63
64/* controller at 0xa000 */
65&pci2 {
66 compatible = "fsl,mpc8548-pcie";
67 device_type = "pci";
68 #size-cells = <2>;
69 #address-cells = <3>;
70 bus-range = <0 255>;
71 clock-frequency = <33333333>;
72 interrupts = <26 2 0 0>;
73
74 pcie@0 {
75 reg = <0 0 0 0 0>;
76 #interrupt-cells = <1>;
77 #size-cells = <2>;
78 #address-cells = <3>;
79 device_type = "pci";
80 interrupts = <26 2 0 0>;
81 interrupt-map-mask = <0xf800 0 0 7>;
82 interrupt-map = <
83 /* IDSEL 0x0 */
84 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
85 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
86 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
87 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
88 >;
89 };
90};
91
92&rio {
93 compatible = "fsl,srio";
94 interrupts = <48 2 0 0>;
95 #address-cells = <2>;
96 #size-cells = <2>;
97 fsl,srio-rmu-handle = <&rmu>;
98 ranges;
99
100 port1 {
101 #address-cells = <2>;
102 #size-cells = <2>;
103 cell-index = <1>;
104 };
105};
106
107&soc {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 device_type = "soc";
111 compatible = "fsl,mpc8548-immr", "simple-bus";
112 bus-frequency = <0>; // Filled out by uboot.
113
114 ecm-law@0 {
115 compatible = "fsl,ecm-law";
116 reg = <0x0 0x1000>;
117 fsl,num-laws = <10>;
118 };
119
120 ecm@1000 {
121 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
122 reg = <0x1000 0x1000>;
123 interrupts = <17 2 0 0>;
124 };
125
126 memory-controller@2000 {
127 compatible = "fsl,mpc8548-memory-controller";
128 reg = <0x2000 0x1000>;
129 interrupts = <18 2 0 0>;
130 };
131
132/include/ "pq3-i2c-0.dtsi"
133/include/ "pq3-i2c-1.dtsi"
134/include/ "pq3-duart-0.dtsi"
135
136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,mpc8548-l2-cache-controller";
138 reg = <0x20000 0x1000>;
139 cache-line-size = <32>; // 32 bytes
140 cache-size = <0x80000>; // L2, 512K
141 interrupts = <16 2 0 0>;
142 };
143
144/include/ "pq3-dma-0.dtsi"
145/include/ "pq3-etsec1-0.dtsi"
146/include/ "pq3-etsec1-1.dtsi"
147/include/ "pq3-etsec1-2.dtsi"
148/include/ "pq3-etsec1-3.dtsi"
149
150/include/ "pq3-sec2.1-0.dtsi"
151/include/ "pq3-mpic.dtsi"
152/include/ "pq3-rmu-0.dtsi"
153
154 global-utilities@e0000 {
155 compatible = "fsl,mpc8548-guts";
156 reg = <0xe0000 0x1000>;
157 fsl,has-rstcr;
158 };
159};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
deleted file mode 100644
index fc1ce977422..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * MPC8548 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8548";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 ethernet3 = &enet3;
52 pci0 = &pci0;
53 pci1 = &pci1;
54 pci2 = &pci2;
55 };
56
57 cpus {
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 PowerPC,8548@0 {
62 device_type = "cpu";
63 reg = <0x0>;
64 next-level-cache = <&L2>;
65 };
66 };
67};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
deleted file mode 100644
index 64e7075a9cd..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
+++ /dev/null
@@ -1,270 +0,0 @@
1/*
2 * MPC8568 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
41};
42
43/* controller at 0x8000 */
44&pci0 {
45 compatible = "fsl,mpc8540-pci";
46 device_type = "pci";
47 interrupts = <24 0x2 0 0>;
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
53};
54
55/* controller at 0xa000 */
56&pci1 {
57 compatible = "fsl,mpc8548-pcie";
58 device_type = "pci";
59 #size-cells = <2>;
60 #address-cells = <3>;
61 bus-range = <0 255>;
62 clock-frequency = <33333333>;
63 interrupts = <26 2 0 0>;
64 sleep = <&pmc 0x20000000>;
65
66 pcie@0 {
67 reg = <0 0 0 0 0>;
68 #interrupt-cells = <1>;
69 #size-cells = <2>;
70 #address-cells = <3>;
71 device_type = "pci";
72 interrupts = <26 2 0 0>;
73 interrupt-map-mask = <0xf800 0 0 7>;
74 interrupt-map = <
75 /* IDSEL 0x0 */
76 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
77 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
78 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
79 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
80 >;
81 };
82};
83
84&rio {
85 compatible = "fsl,srio";
86 interrupts = <48 2 0 0>;
87 #address-cells = <2>;
88 #size-cells = <2>;
89 fsl,srio-rmu-handle = <&rmu>;
90 sleep = <&pmc 0x00080000>;
91 ranges;
92
93 port1 {
94 #address-cells = <2>;
95 #size-cells = <2>;
96 cell-index = <1>;
97 };
98};
99
100&soc {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 device_type = "soc";
104 compatible = "fsl,mpc8568-immr", "simple-bus";
105 bus-frequency = <0>; // Filled out by uboot.
106
107 ecm-law@0 {
108 compatible = "fsl,ecm-law";
109 reg = <0x0 0x1000>;
110 fsl,num-laws = <10>;
111 };
112
113 ecm@1000 {
114 compatible = "fsl,mpc8568-ecm", "fsl,ecm";
115 reg = <0x1000 0x1000>;
116 interrupts = <17 2 0 0>;
117 };
118
119 memory-controller@2000 {
120 compatible = "fsl,mpc8568-memory-controller";
121 reg = <0x2000 0x1000>;
122 interrupts = <18 2 0 0>;
123 };
124
125 i2c-sleep-nexus {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "simple-bus";
129 sleep = <&pmc 0x00000004>;
130 ranges;
131
132/include/ "pq3-i2c-0.dtsi"
133/include/ "pq3-i2c-1.dtsi"
134
135 };
136
137 duart-sleep-nexus {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "simple-bus";
141 sleep = <&pmc 0x00000002>;
142 ranges;
143
144/include/ "pq3-duart-0.dtsi"
145
146 };
147
148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,mpc8568-l2-cache-controller";
150 reg = <0x20000 0x1000>;
151 cache-line-size = <32>; // 32 bytes
152 cache-size = <0x80000>; // L2, 512K
153 interrupts = <16 2 0 0>;
154 };
155
156/include/ "pq3-dma-0.dtsi"
157 dma@21300 {
158 sleep = <&pmc 0x00000400>;
159 };
160
161/include/ "pq3-etsec1-0.dtsi"
162 ethernet@24000 {
163 sleep = <&pmc 0x00000080>;
164 };
165
166/include/ "pq3-etsec1-1.dtsi"
167 ethernet@25000 {
168 sleep = <&pmc 0x00000040>;
169 };
170
171 par_io@e0100 {
172 reg = <0xe0100 0x100>;
173 device_type = "par_io";
174 };
175
176/include/ "pq3-sec2.1-0.dtsi"
177 crypto@30000 {
178 sleep = <&pmc 0x01000000>;
179 };
180
181/include/ "pq3-mpic.dtsi"
182/include/ "pq3-rmu-0.dtsi"
183 rmu@d3000 {
184 sleep = <&pmc 0x00040000>;
185 };
186
187 global-utilities@e0000 {
188 #address-cells = <1>;
189 #size-cells = <1>;
190 compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
191 reg = <0xe0000 0x1000>;
192 ranges = <0 0xe0000 0x1000>;
193 fsl,has-rstcr;
194
195 pmc: power@70 {
196 compatible = "fsl,mpc8568-pmc",
197 "fsl,mpc8548-pmc";
198 reg = <0x70 0x20>;
199 };
200 };
201};
202
203&qe {
204 #address-cells = <1>;
205 #size-cells = <1>;
206 device_type = "qe";
207 compatible = "fsl,qe";
208 sleep = <&pmc 0x00000800>;
209 brg-frequency = <0>;
210 bus-frequency = <396000000>;
211 fsl,qe-num-riscs = <2>;
212 fsl,qe-num-snums = <28>;
213
214 qeic: interrupt-controller@80 {
215 interrupt-controller;
216 compatible = "fsl,qe-ic";
217 #address-cells = <0>;
218 #interrupt-cells = <1>;
219 reg = <0x80 0x80>;
220 interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
221 interrupt-parent = <&mpic>;
222 };
223
224 spi@4c0 {
225 #address-cells = <1>;
226 #size-cells = <0>;
227 compatible = "fsl,spi";
228 reg = <0x4c0 0x40>;
229 cell-index = <0>;
230 interrupts = <2>;
231 interrupt-parent = <&qeic>;
232 };
233
234 spi@500 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 cell-index = <1>;
238 compatible = "fsl,spi";
239 reg = <0x500 0x40>;
240 interrupts = <1>;
241 interrupt-parent = <&qeic>;
242 };
243
244 ucc@2000 {
245 cell-index = <1>;
246 reg = <0x2000 0x200>;
247 interrupts = <32>;
248 interrupt-parent = <&qeic>;
249 };
250
251 ucc@3000 {
252 cell-index = <2>;
253 reg = <0x3000 0x200>;
254 interrupts = <33>;
255 interrupt-parent = <&qeic>;
256 };
257
258 muram@10000 {
259 #address-cells = <1>;
260 #size-cells = <1>;
261 compatible = "fsl,qe-muram", "fsl,cpm-muram";
262 ranges = <0x0 0x10000 0x10000>;
263
264 data-only@0 {
265 compatible = "fsl,qe-muram-data",
266 "fsl,cpm-muram-data";
267 reg = <0x0 0x10000>;
268 };
269 };
270};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
deleted file mode 100644
index 122ca3bd0b0..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * MPC8568 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8568";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 ethernet3 = &enet3;
52 pci0 = &pci0;
53 pci1 = &pci1;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 PowerPC,8568@0 {
61 device_type = "cpu";
62 reg = <0x0>;
63 next-level-cache = <&L2>;
64 sleep = <&pmc 0x00008000 // core
65 &pmc 0x00004000>; // timebase
66 };
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
deleted file mode 100644
index 3e6346a4a18..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
+++ /dev/null
@@ -1,304 +0,0 @@
1/*
2 * MPC8569 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40 sleep = <&pmc 0x08000000>;
41};
42
43/* controller at 0xa000 */
44&pci1 {
45 compatible = "fsl,mpc8548-pcie";
46 device_type = "pci";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
51 interrupts = <26 2 0 0>;
52 sleep = <&pmc 0x20000000>;
53
54 pcie@0 {
55 reg = <0 0 0 0 0>;
56 #interrupt-cells = <1>;
57 #size-cells = <2>;
58 #address-cells = <3>;
59 device_type = "pci";
60 interrupts = <26 2 0 0>;
61 interrupt-map-mask = <0xf800 0 0 7>;
62 interrupt-map = <
63 /* IDSEL 0x0 */
64 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
65 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
66 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
67 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
68 >;
69 };
70};
71
72&rio {
73 compatible = "fsl,srio";
74 interrupts = <48 2 0 0>;
75 #address-cells = <2>;
76 #size-cells = <2>;
77 fsl,srio-rmu-handle = <&rmu>;
78 sleep = <&pmc 0x00080000>;
79 ranges;
80
81 port1 {
82 #address-cells = <2>;
83 #size-cells = <2>;
84 cell-index = <1>;
85 };
86
87 port2 {
88 #address-cells = <2>;
89 #size-cells = <2>;
90 cell-index = <2>;
91 };
92};
93
94&soc {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 device_type = "soc";
98 compatible = "fsl,mpc8569-immr", "simple-bus";
99 bus-frequency = <0>; // Filled out by uboot.
100
101 ecm-law@0 {
102 compatible = "fsl,ecm-law";
103 reg = <0x0 0x1000>;
104 fsl,num-laws = <10>;
105 };
106
107 ecm@1000 {
108 compatible = "fsl,mpc8569-ecm", "fsl,ecm";
109 reg = <0x1000 0x1000>;
110 interrupts = <17 2 0 0>;
111 };
112
113 memory-controller@2000 {
114 compatible = "fsl,mpc8569-memory-controller";
115 reg = <0x2000 0x1000>;
116 interrupts = <18 2 0 0>;
117 };
118
119 i2c-sleep-nexus {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 compatible = "simple-bus";
123 sleep = <&pmc 0x00000004>;
124 ranges;
125
126/include/ "pq3-i2c-0.dtsi"
127/include/ "pq3-i2c-1.dtsi"
128
129 };
130
131 duart-sleep-nexus {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "simple-bus";
135 sleep = <&pmc 0x00000002>;
136 ranges;
137
138/include/ "pq3-duart-0.dtsi"
139
140 };
141
142 L2: l2-cache-controller@20000 {
143 compatible = "fsl,mpc8569-l2-cache-controller";
144 reg = <0x20000 0x1000>;
145 cache-line-size = <32>; // 32 bytes
146 cache-size = <0x80000>; // L2, 512K
147 interrupts = <16 2 0 0>;
148 };
149
150/include/ "pq3-dma-0.dtsi"
151/include/ "pq3-esdhc-0.dtsi"
152 sdhc@2e000 {
153 sleep = <&pmc 0x00200000>;
154 };
155
156 par_io@e0100 {
157 #address-cells = <1>;
158 #size-cells = <1>;
159 reg = <0xe0100 0x100>;
160 ranges = <0x0 0xe0100 0x100>;
161 device_type = "par_io";
162 };
163
164/include/ "pq3-sec3.1-0.dtsi"
165 crypto@30000 {
166 sleep = <&pmc 0x01000000>;
167 };
168
169/include/ "pq3-mpic.dtsi"
170/include/ "pq3-rmu-0.dtsi"
171 rmu@d3000 {
172 sleep = <&pmc 0x00040000>;
173 };
174
175 global-utilities@e0000 {
176 #address-cells = <1>;
177 #size-cells = <1>;
178 compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
179 reg = <0xe0000 0x1000>;
180 ranges = <0 0xe0000 0x1000>;
181 fsl,has-rstcr;
182
183 pmc: power@70 {
184 compatible = "fsl,mpc8569-pmc",
185 "fsl,mpc8548-pmc";
186 reg = <0x70 0x20>;
187 };
188 };
189};
190
191&qe {
192 #address-cells = <1>;
193 #size-cells = <1>;
194 device_type = "qe";
195 compatible = "fsl,qe";
196 sleep = <&pmc 0x00000800>;
197 brg-frequency = <0>;
198 bus-frequency = <0>;
199 fsl,qe-num-riscs = <4>;
200 fsl,qe-num-snums = <46>;
201
202 qeic: interrupt-controller@80 {
203 interrupt-controller;
204 compatible = "fsl,qe-ic";
205 #address-cells = <0>;
206 #interrupt-cells = <1>;
207 reg = <0x80 0x80>;
208 interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
209 interrupt-parent = <&mpic>;
210 };
211
212 timer@440 {
213 compatible = "fsl,mpc8569-qe-gtm",
214 "fsl,qe-gtm", "fsl,gtm";
215 reg = <0x440 0x40>;
216 interrupts = <12 13 14 15>;
217 interrupt-parent = <&qeic>;
218 /* Filled in by U-Boot */
219 clock-frequency = <0>;
220 };
221
222 spi@4c0 {
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
226 reg = <0x4c0 0x40>;
227 cell-index = <0>;
228 interrupts = <2>;
229 interrupt-parent = <&qeic>;
230 };
231
232 spi@500 {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 cell-index = <1>;
236 compatible = "fsl,spi";
237 reg = <0x500 0x40>;
238 interrupts = <1>;
239 interrupt-parent = <&qeic>;
240 };
241
242 usb@6c0 {
243 compatible = "fsl,mpc8569-qe-usb",
244 "fsl,mpc8323-qe-usb";
245 reg = <0x6c0 0x40 0x8b00 0x100>;
246 interrupts = <11>;
247 interrupt-parent = <&qeic>;
248 };
249
250 ucc@2000 {
251 cell-index = <1>;
252 reg = <0x2000 0x200>;
253 interrupts = <32>;
254 interrupt-parent = <&qeic>;
255 };
256
257 ucc@2200 {
258 cell-index = <3>;
259 reg = <0x2200 0x200>;
260 interrupts = <34>;
261 interrupt-parent = <&qeic>;
262 };
263
264 ucc@3000 {
265 cell-index = <2>;
266 reg = <0x3000 0x200>;
267 interrupts = <33>;
268 interrupt-parent = <&qeic>;
269 };
270
271 ucc@3200 {
272 cell-index = <4>;
273 reg = <0x3200 0x200>;
274 interrupts = <35>;
275 interrupt-parent = <&qeic>;
276 };
277
278 ucc@3400 {
279 cell-index = <6>;
280 reg = <0x3400 0x200>;
281 interrupts = <41>;
282 interrupt-parent = <&qeic>;
283 };
284
285 ucc@3600 {
286 cell-index = <8>;
287 reg = <0x3600 0x200>;
288 interrupts = <43>;
289 interrupt-parent = <&qeic>;
290 };
291
292 muram@10000 {
293 #address-cells = <1>;
294 #size-cells = <1>;
295 compatible = "fsl,qe-muram", "fsl,cpm-muram";
296 ranges = <0x0 0x10000 0x20000>;
297
298 data-only@0 {
299 compatible = "fsl,qe-muram-data",
300 "fsl,cpm-muram-data";
301 reg = <0x0 0x20000>;
302 };
303 };
304};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
deleted file mode 100644
index 2cd15a2a042..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * MPC8569 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8569";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 ethernet3 = &enet3;
52 pci1 = &pci1;
53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 PowerPC,8569@0 {
60 device_type = "cpu";
61 reg = <0x0>;
62 next-level-cache = <&L2>;
63 sleep = <&pmc 0x00008000 // core
64 &pmc 0x00004000>; // timebase
65 };
66 };
67};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
deleted file mode 100644
index d44e25a4873..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
+++ /dev/null
@@ -1,196 +0,0 @@
1/*
2 * MPC8572 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x8000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <24 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <24 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60
61 interrupt-map = <
62 /* IDSEL 0x0 */
63 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
64 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
65 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
66 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
67 >;
68 };
69};
70
71/* controller at 0x9000 */
72&pci1 {
73 compatible = "fsl,mpc8548-pcie";
74 device_type = "pci";
75 #size-cells = <2>;
76 #address-cells = <3>;
77 bus-range = <0 255>;
78 clock-frequency = <33333333>;
79 interrupts = <25 2 0 0>;
80
81 pcie@0 {
82 reg = <0 0 0 0 0>;
83 #interrupt-cells = <1>;
84 #size-cells = <2>;
85 #address-cells = <3>;
86 device_type = "pci";
87 interrupts = <25 2 0 0>;
88 interrupt-map-mask = <0xf800 0 0 7>;
89
90 interrupt-map = <
91 /* IDSEL 0x0 */
92 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
93 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
94 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
95 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
96 >;
97 };
98};
99
100/* controller at 0xa000 */
101&pci2 {
102 compatible = "fsl,mpc8548-pcie";
103 device_type = "pci";
104 #size-cells = <2>;
105 #address-cells = <3>;
106 bus-range = <0 255>;
107 clock-frequency = <33333333>;
108 interrupts = <26 2 0 0>;
109
110 pcie@0 {
111 reg = <0 0 0 0 0>;
112 #interrupt-cells = <1>;
113 #size-cells = <2>;
114 #address-cells = <3>;
115 device_type = "pci";
116 interrupts = <26 2 0 0>;
117 interrupt-map-mask = <0xf800 0 0 7>;
118 interrupt-map = <
119 /* IDSEL 0x0 */
120 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
121 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
122 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
123 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
124 >;
125 };
126};
127
128&soc {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 device_type = "soc";
132 compatible = "fsl,mpc8572-immr", "simple-bus";
133 bus-frequency = <0>; // Filled out by uboot.
134
135 ecm-law@0 {
136 compatible = "fsl,ecm-law";
137 reg = <0x0 0x1000>;
138 fsl,num-laws = <12>;
139 };
140
141 ecm@1000 {
142 compatible = "fsl,mpc8572-ecm", "fsl,ecm";
143 reg = <0x1000 0x1000>;
144 interrupts = <17 2 0 0>;
145 };
146
147 memory-controller@2000 {
148 compatible = "fsl,mpc8572-memory-controller";
149 reg = <0x2000 0x1000>;
150 interrupts = <18 2 0 0>;
151 };
152
153 memory-controller@6000 {
154 compatible = "fsl,mpc8572-memory-controller";
155 reg = <0x6000 0x1000>;
156 interrupts = <18 2 0 0>;
157 };
158
159/include/ "pq3-i2c-0.dtsi"
160/include/ "pq3-i2c-1.dtsi"
161/include/ "pq3-duart-0.dtsi"
162/include/ "pq3-dma-1.dtsi"
163/include/ "pq3-gpio-0.dtsi"
164 gpio-controller@f000 {
165 compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
166 };
167
168 L2: l2-cache-controller@20000 {
169 compatible = "fsl,mpc8572-l2-cache-controller";
170 reg = <0x20000 0x1000>;
171 cache-line-size = <32>; // 32 bytes
172 cache-size = <0x100000>; // L2,1M
173 interrupts = <16 2 0 0>;
174 };
175
176/include/ "pq3-dma-0.dtsi"
177/include/ "pq3-etsec1-0.dtsi"
178/include/ "pq3-etsec1-timer-0.dtsi"
179
180 ptp_clock@24e00 {
181 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
182 };
183
184/include/ "pq3-etsec1-1.dtsi"
185/include/ "pq3-etsec1-2.dtsi"
186/include/ "pq3-etsec1-3.dtsi"
187/include/ "pq3-sec3.0-0.dtsi"
188/include/ "pq3-mpic.dtsi"
189/include/ "pq3-mpic-timer-B.dtsi"
190
191 global-utilities@e0000 {
192 compatible = "fsl,mpc8572-guts";
193 reg = <0xe0000 0x1000>;
194 fsl,has-rstcr;
195 };
196};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
deleted file mode 100644
index 28c2a862be9..00000000000
--- a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * MPC8572 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,MPC8572";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 ethernet3 = &enet3;
52 pci0 = &pci0;
53 pci1 = &pci1;
54 pci2 = &pci2;
55 };
56
57 cpus {
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 PowerPC,8572@0 {
62 device_type = "cpu";
63 reg = <0x0>;
64 next-level-cache = <&L2>;
65 };
66
67 PowerPC,8572@1 {
68 device_type = "cpu";
69 reg = <0x1>;
70 next-level-cache = <&L2>;
71 };
72 };
73};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
deleted file mode 100644
index 0bde9ee8afa..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ /dev/null
@@ -1,202 +0,0 @@
1/*
2 * P1010/P1014 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <16 2 0 0 19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1010-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1010-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1010-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127/include/ "pq3-espi-0.dtsi"
128 spi0: spi@7000 {
129 fsl,espi-num-chipselects = <1>;
130 };
131
132/include/ "pq3-gpio-0.dtsi"
133/include/ "pq3-sata2-0.dtsi"
134/include/ "pq3-sata2-1.dtsi"
135
136 can0: can@1c000 {
137 compatible = "fsl,p1010-flexcan";
138 reg = <0x1c000 0x1000>;
139 interrupts = <48 0x2 0 0>;
140 };
141
142 can1: can@1d000 {
143 compatible = "fsl,p1010-flexcan";
144 reg = <0x1d000 0x1000>;
145 interrupts = <61 0x2 0 0>;
146 };
147
148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,p1010-l2-cache-controller",
150 "fsl,p1014-l2-cache-controller";
151 reg = <0x20000 0x1000>;
152 cache-line-size = <32>; // 32 bytes
153 cache-size = <0x40000>; // L2,256K
154 interrupts = <16 2 0 0>;
155 };
156
157/include/ "pq3-dma-0.dtsi"
158/include/ "pq3-usb2-dr-0.dtsi"
159 usb@22000 {
160 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
161 };
162/include/ "pq3-esdhc-0.dtsi"
163 sdhc@2e000 {
164 compatible = "fsl,p1010-esdhc", "fsl,esdhc";
165 sdhci,auto-cmd12;
166 };
167
168/include/ "pq3-sec4.4-0.dtsi"
169/include/ "pq3-mpic.dtsi"
170/include/ "pq3-mpic-timer-B.dtsi"
171
172/include/ "pq3-etsec2-0.dtsi"
173 enet0: ethernet@b0000 {
174 queue-group@b0000 {
175 fsl,rx-bit-map = <0xff>;
176 fsl,tx-bit-map = <0xff>;
177 };
178 };
179
180/include/ "pq3-etsec2-1.dtsi"
181 enet1: ethernet@b1000 {
182 queue-group@b1000 {
183 fsl,rx-bit-map = <0xff>;
184 fsl,tx-bit-map = <0xff>;
185 };
186 };
187
188/include/ "pq3-etsec2-2.dtsi"
189 enet2: ethernet@b2000 {
190 queue-group@b2000 {
191 fsl,rx-bit-map = <0xff>;
192 fsl,tx-bit-map = <0xff>;
193 };
194
195 };
196
197 global-utilities@e0000 {
198 compatible = "fsl,p1010-guts";
199 reg = <0xe0000 0x1000>;
200 fsl,has-rstcr;
201 };
202};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
deleted file mode 100644
index 6e76f9b282a..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * P1010/P1014 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P1010";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 pci0 = &pci0;
52 pci1 = &pci1;
53 can0 = &can0;
54 can1 = &can1;
55 };
56
57 cpus {
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 PowerPC,P1010@0 {
62 device_type = "cpu";
63 reg = <0x0>;
64 next-level-cache = <&L2>;
65 };
66 };
67};
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
deleted file mode 100644
index 68cc5e7f647..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * P1020/P1011 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1020-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1020-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1020-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1020-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145 usb@22000 {
146 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
147 };
148/include/ "pq3-usb2-dr-1.dtsi"
149 usb@23000 {
150 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
151 };
152
153/include/ "pq3-esdhc-0.dtsi"
154 sdhc@2e000 {
155 compatible = "fsl,p1020-esdhc", "fsl,esdhc";
156 sdhci,auto-cmd12;
157 };
158/include/ "pq3-sec3.3-0.dtsi"
159
160/include/ "pq3-mpic.dtsi"
161/include/ "pq3-mpic-timer-B.dtsi"
162
163/include/ "pq3-etsec2-0.dtsi"
164 enet0: enet0_grp2: ethernet@b0000 {
165 };
166
167/include/ "pq3-etsec2-1.dtsi"
168 enet1: enet1_grp2: ethernet@b1000 {
169 };
170
171/include/ "pq3-etsec2-2.dtsi"
172 enet2: enet2_grp2: ethernet@b2000 {
173 };
174
175 global-utilities@e0000 {
176 compatible = "fsl,p1020-guts";
177 reg = <0xe0000 0x1000>;
178 fsl,has-rstcr;
179 };
180};
181
182/include/ "pq3-etsec2-grp2-0.dtsi"
183/include/ "pq3-etsec2-grp2-1.dtsi"
184/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
deleted file mode 100644
index fed9c4c8d96..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * P1020/P1011 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P1020";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 pci0 = &pci0;
52 pci1 = &pci1;
53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 PowerPC,P1020@0 {
60 device_type = "cpu";
61 reg = <0x0>;
62 next-level-cache = <&L2>;
63 };
64
65 PowerPC,P1020@1 {
66 device_type = "cpu";
67 reg = <0x1>;
68 next-level-cache = <&L2>;
69 };
70 };
71};
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
deleted file mode 100644
index adb82fd9057..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
1/*
2 * P1021/P1012 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0x9000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0xa000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
95 >;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1021-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1021-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1021-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1021-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145 usb@22000 {
146 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
147 };
148
149/include/ "pq3-esdhc-0.dtsi"
150 sdhc@2e000 {
151 sdhci,auto-cmd12;
152 };
153
154/include/ "pq3-sec3.3-0.dtsi"
155
156/include/ "pq3-mpic.dtsi"
157/include/ "pq3-mpic-timer-B.dtsi"
158
159/include/ "pq3-etsec2-0.dtsi"
160 enet0: enet0_grp2: ethernet@b0000 {
161 };
162
163/include/ "pq3-etsec2-1.dtsi"
164 enet1: enet1_grp2: ethernet@b1000 {
165 };
166
167/include/ "pq3-etsec2-2.dtsi"
168 enet2: enet2_grp2: ethernet@b2000 {
169 };
170
171 global-utilities@e0000 {
172 compatible = "fsl,p1021-guts";
173 reg = <0xe0000 0x1000>;
174 fsl,has-rstcr;
175 };
176};
177
178&qe {
179 #address-cells = <1>;
180 #size-cells = <1>;
181 device_type = "qe";
182 compatible = "fsl,qe";
183 fsl,qe-num-riscs = <1>;
184 fsl,qe-num-snums = <28>;
185
186 qeic: interrupt-controller@80 {
187 interrupt-controller;
188 compatible = "fsl,qe-ic";
189 #address-cells = <0>;
190 #interrupt-cells = <1>;
191 reg = <0x80 0x80>;
192 interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44
193 };
194
195 ucc@2000 {
196 cell-index = <1>;
197 reg = <0x2000 0x200>;
198 interrupts = <32>;
199 interrupt-parent = <&qeic>;
200 };
201
202 mdio@2120 {
203 #address-cells = <1>;
204 #size-cells = <0>;
205 reg = <0x2120 0x18>;
206 compatible = "fsl,ucc-mdio";
207 };
208
209 ucc@2400 {
210 cell-index = <5>;
211 reg = <0x2400 0x200>;
212 interrupts = <40>;
213 interrupt-parent = <&qeic>;
214 };
215
216 ucc@2600 {
217 cell-index = <7>;
218 reg = <0x2600 0x200>;
219 interrupts = <42>;
220 interrupt-parent = <&qeic>;
221 };
222
223 ucc@2200 {
224 cell-index = <3>;
225 reg = <0x2200 0x200>;
226 interrupts = <34>;
227 interrupt-parent = <&qeic>;
228 };
229
230 muram@10000 {
231 #address-cells = <1>;
232 #size-cells = <1>;
233 compatible = "fsl,qe-muram", "fsl,cpm-muram";
234 ranges = <0x0 0x10000 0x6000>;
235
236 data-only@0 {
237 compatible = "fsl,qe-muram-data",
238 "fsl,cpm-muram-data";
239 reg = <0x0 0x6000>;
240 };
241 };
242};
243
244/include/ "pq3-etsec2-grp2-0.dtsi"
245/include/ "pq3-etsec2-grp2-1.dtsi"
246/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
deleted file mode 100644
index 36161b50017..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * P1021/P1012 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P1021";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 pci0 = &pci0;
52 pci1 = &pci1;
53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 PowerPC,P1021@0 {
60 device_type = "cpu";
61 reg = <0x0>;
62 next-level-cache = <&L2>;
63 };
64
65 PowerPC,P1021@1 {
66 device_type = "cpu";
67 reg = <0x1>;
68 next-level-cache = <&L2>;
69 };
70 };
71};
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
deleted file mode 100644
index 06216b8c0af..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
1/*
2 * P1022/P1013 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 /*
39 * The localbus on the P1022 is not a simple-bus because of the eLBC
40 * pin muxing when the DIU is enabled.
41 */
42 compatible = "fsl,p1022-elbc", "fsl,elbc";
43 interrupts = <19 2 0 0>;
44};
45
46/* controller at 0x9000 */
47&pci0 {
48 compatible = "fsl,p1022-pcie";
49 device_type = "pci";
50 #size-cells = <2>;
51 #address-cells = <3>;
52 bus-range = <0 255>;
53 clock-frequency = <33333333>;
54 interrupts = <16 2 0 0>;
55
56 pcie@0 {
57 reg = <0 0 0 0 0>;
58 #interrupt-cells = <1>;
59 #size-cells = <2>;
60 #address-cells = <3>;
61 device_type = "pci";
62 interrupts = <16 2 0 0>;
63 interrupt-map-mask = <0xf800 0 0 7>;
64 interrupt-map = <
65 /* IDSEL 0x0 */
66 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
67 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
68 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
69 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
70 >;
71 };
72};
73
74/* controller at 0xa000 */
75&pci1 {
76 compatible = "fsl,p1022-pcie";
77 device_type = "pci";
78 #size-cells = <2>;
79 #address-cells = <3>;
80 bus-range = <0 255>;
81 clock-frequency = <33333333>;
82 interrupts = <16 2 0 0>;
83
84 pcie@0 {
85 reg = <0 0 0 0 0>;
86 #interrupt-cells = <1>;
87 #size-cells = <2>;
88 #address-cells = <3>;
89 device_type = "pci";
90 interrupts = <16 2 0 0>;
91 interrupt-map-mask = <0xf800 0 0 7>;
92
93 interrupt-map = <
94 /* IDSEL 0x0 */
95 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
96 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
97 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
98 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
99 >;
100 };
101};
102
103/* controller at 0xb000 */
104&pci2 {
105 compatible = "fsl,p1022-pcie";
106 device_type = "pci";
107 #size-cells = <2>;
108 #address-cells = <3>;
109 bus-range = <0 255>;
110 clock-frequency = <33333333>;
111 interrupts = <16 2 0 0>;
112
113 pcie@0 {
114 reg = <0 0 0 0 0>;
115 #interrupt-cells = <1>;
116 #size-cells = <2>;
117 #address-cells = <3>;
118 device_type = "pci";
119 interrupts = <16 2 0 0>;
120 interrupt-map-mask = <0xf800 0 0 7>;
121
122 interrupt-map = <
123 /* IDSEL 0x0 */
124 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
125 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
126 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
127 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
128 >;
129 };
130};
131
132&soc {
133 #address-cells = <1>;
134 #size-cells = <1>;
135 device_type = "soc";
136 compatible = "fsl,p1022-immr", "simple-bus";
137 bus-frequency = <0>; // Filled out by uboot.
138
139 ecm-law@0 {
140 compatible = "fsl,ecm-law";
141 reg = <0x0 0x1000>;
142 fsl,num-laws = <12>;
143 };
144
145 ecm@1000 {
146 compatible = "fsl,p1022-ecm", "fsl,ecm";
147 reg = <0x1000 0x1000>;
148 interrupts = <16 2 0 0>;
149 };
150
151 memory-controller@2000 {
152 compatible = "fsl,p1022-memory-controller";
153 reg = <0x2000 0x1000>;
154 interrupts = <16 2 0 0>;
155 };
156
157/include/ "pq3-i2c-0.dtsi"
158/include/ "pq3-i2c-1.dtsi"
159/include/ "pq3-duart-0.dtsi"
160/include/ "pq3-espi-0.dtsi"
161 spi@7000 {
162 fsl,espi-num-chipselects = <4>;
163 };
164
165/include/ "pq3-dma-1.dtsi"
166 dma@c300 {
167 dma00: dma-channel@0 {
168 compatible = "fsl,ssi-dma-channel";
169 };
170 dma01: dma-channel@80 {
171 compatible = "fsl,ssi-dma-channel";
172 };
173 };
174
175/include/ "pq3-gpio-0.dtsi"
176
177 display@10000 {
178 compatible = "fsl,diu", "fsl,p1022-diu";
179 reg = <0x10000 1000>;
180 interrupts = <64 2 0 0>;
181 };
182
183 ssi@15000 {
184 compatible = "fsl,mpc8610-ssi";
185 cell-index = <0>;
186 reg = <0x15000 0x100>;
187 interrupts = <75 2 0 0>;
188 fsl,playback-dma = <&dma00>;
189 fsl,capture-dma = <&dma01>;
190 fsl,fifo-depth = <15>;
191 };
192
193/include/ "pq3-sata2-0.dtsi"
194/include/ "pq3-sata2-1.dtsi"
195
196 L2: l2-cache-controller@20000 {
197 compatible = "fsl,p1022-l2-cache-controller";
198 reg = <0x20000 0x1000>;
199 cache-line-size = <32>; // 32 bytes
200 cache-size = <0x40000>; // L2,256K
201 interrupts = <16 2 0 0>;
202 };
203
204/include/ "pq3-dma-0.dtsi"
205/include/ "pq3-usb2-dr-0.dtsi"
206 usb@22000 {
207 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
208 };
209/include/ "pq3-usb2-dr-1.dtsi"
210 usb@23000 {
211 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
212 };
213
214/include/ "pq3-esdhc-0.dtsi"
215 sdhc@2e000 {
216 compatible = "fsl,p1022-esdhc", "fsl,esdhc";
217 sdhci,auto-cmd12;
218 };
219
220/include/ "pq3-sec3.3-0.dtsi"
221/include/ "pq3-mpic.dtsi"
222/include/ "pq3-mpic-timer-B.dtsi"
223
224/include/ "pq3-etsec2-0.dtsi"
225 enet0: enet0_grp2: ethernet@b0000 {
226 };
227
228/include/ "pq3-etsec2-1.dtsi"
229 enet1: enet1_grp2: ethernet@b1000 {
230 };
231
232 global-utilities@e0000 {
233 compatible = "fsl,p1022-guts";
234 reg = <0xe0000 0x1000>;
235 fsl,has-rstcr;
236 };
237
238 power@e0070{
239 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
240 reg = <0xe0070 0x20>;
241 };
242
243};
244
245/include/ "pq3-etsec2-grp2-0.dtsi"
246/include/ "pq3-etsec2-grp2-1.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
deleted file mode 100644
index 1956dea040c..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * P1022/P1013 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P1022";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 pci0 = &pci0;
51 pci1 = &pci1;
52 pci2 = &pci2;
53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 PowerPC,P1022@0 {
60 device_type = "cpu";
61 reg = <0x0>;
62 next-level-cache = <&L2>;
63 };
64
65 PowerPC,P1022@1 {
66 device_type = "cpu";
67 reg = <0x1>;
68 next-level-cache = <&L2>;
69 };
70 };
71};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
deleted file mode 100644
index 941fa159cef..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ /dev/null
@@ -1,227 +0,0 @@
1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0xa000 */
43&pci0 {
44 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 0 0>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 0 0>;
58 };
59};
60
61/* controller at 0x9000 */
62&pci1 {
63 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
64 device_type = "pci";
65 #size-cells = <2>;
66 #address-cells = <3>;
67 bus-range = <0 0xff>;
68 clock-frequency = <33333333>;
69 interrupts = <16 2 0 0>;
70 pcie@0 {
71 reg = <0 0 0 0 0>;
72 #interrupt-cells = <1>;
73 #size-cells = <2>;
74 #address-cells = <3>;
75 device_type = "pci";
76 interrupts = <16 2 0 0>;
77 };
78};
79
80/* controller at 0xb000 */
81&pci2 {
82 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
83 device_type = "pci";
84 #size-cells = <2>;
85 #address-cells = <3>;
86 bus-range = <0x0 0xff>;
87 clock-frequency = <33333333>;
88 interrupts = <16 2 0 0>;
89 pcie@0 {
90 reg = <0 0 0 0 0>;
91 #interrupt-cells = <1>;
92 #size-cells = <2>;
93 #address-cells = <3>;
94 device_type = "pci";
95 interrupts = <16 2 0 0>;
96 };
97};
98
99&soc {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 device_type = "soc";
103 compatible = "fsl,p1023-immr", "simple-bus";
104 bus-frequency = <0>; // Filled out by uboot.
105
106 ecm-law@0 {
107 compatible = "fsl,ecm-law";
108 reg = <0x0 0x1000>;
109 fsl,num-laws = <12>;
110 };
111
112 ecm@1000 {
113 compatible = "fsl,p1023-ecm", "fsl,ecm";
114 reg = <0x1000 0x1000>;
115 interrupts = <16 2 0 0>;
116 };
117
118 memory-controller@2000 {
119 compatible = "fsl,p1023-memory-controller";
120 reg = <0x2000 0x1000>;
121 interrupts = <16 2 0 0>;
122 };
123
124/include/ "pq3-i2c-0.dtsi"
125/include/ "pq3-i2c-1.dtsi"
126/include/ "pq3-duart-0.dtsi"
127
128/include/ "pq3-espi-0.dtsi"
129 spi@7000 {
130 fsl,espi-num-chipselects = <4>;
131 };
132
133/include/ "pq3-gpio-0.dtsi"
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,p1023-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x40000>; // L2,256K
140 interrupts = <16 2 0 0>;
141 };
142
143/include/ "pq3-dma-0.dtsi"
144/include/ "pq3-usb2-dr-0.dtsi"
145 usb@22000 {
146 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
147 };
148
149 crypto: crypto@300000 {
150 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 reg = <0x30000 0x10000>;
154 ranges = <0 0x30000 0x10000>;
155 interrupts = <58 2 0 0>;
156
157 sec_jr0: jr@1000 {
158 compatible = "fsl,sec-v4.2-job-ring",
159 "fsl,sec-v4.0-job-ring";
160 reg = <0x1000 0x1000>;
161 interrupts = <45 2 0 0>;
162 };
163
164 sec_jr1: jr@2000 {
165 compatible = "fsl,sec-v4.2-job-ring",
166 "fsl,sec-v4.0-job-ring";
167 reg = <0x2000 0x1000>;
168 interrupts = <45 2 0 0>;
169 };
170
171 sec_jr2: jr@3000 {
172 compatible = "fsl,sec-v4.2-job-ring",
173 "fsl,sec-v4.0-job-ring";
174 reg = <0x3000 0x1000>;
175 interrupts = <57 2 0 0>;
176 };
177
178 sec_jr3: jr@4000 {
179 compatible = "fsl,sec-v4.2-job-ring",
180 "fsl,sec-v4.0-job-ring";
181 reg = <0x4000 0x1000>;
182 interrupts = <57 2 0 0>;
183 };
184
185 rtic@6000 {
186 compatible = "fsl,sec-v4.2-rtic",
187 "fsl,sec-v4.0-rtic";
188 #address-cells = <1>;
189 #size-cells = <1>;
190 reg = <0x6000 0x100>;
191 ranges = <0x0 0x6100 0xe00>;
192
193 rtic_a: rtic-a@0 {
194 compatible = "fsl,sec-v4.2-rtic-memory",
195 "fsl,sec-v4.0-rtic-memory";
196 reg = <0x00 0x20 0x100 0x80>;
197 };
198
199 rtic_b: rtic-b@20 {
200 compatible = "fsl,sec-v4.2-rtic-memory",
201 "fsl,sec-v4.0-rtic-memory";
202 reg = <0x20 0x20 0x200 0x80>;
203 };
204
205 rtic_c: rtic-c@40 {
206 compatible = "fsl,sec-v4.2-rtic-memory",
207 "fsl,sec-v4.0-rtic-memory";
208 reg = <0x40 0x20 0x300 0x80>;
209 };
210
211 rtic_d: rtic-d@60 {
212 compatible = "fsl,sec-v4.2-rtic-memory",
213 "fsl,sec-v4.0-rtic-memory";
214 reg = <0x60 0x20 0x500 0x80>;
215 };
216 };
217 };
218
219/include/ "pq3-mpic.dtsi"
220/include/ "pq3-mpic-timer-B.dtsi"
221
222 global-utilities@e0000 {
223 compatible = "fsl,p1023-guts";
224 reg = <0xe0000 0x1000>;
225 fsl,has-rstcr;
226 };
227};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
deleted file mode 100644
index 132a1521921..00000000000
--- a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P1023";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 pci2 = &pci2;
51
52 crypto = &crypto;
53 sec_jr0 = &sec_jr0;
54 sec_jr1 = &sec_jr1;
55 sec_jr2 = &sec_jr2;
56 sec_jr3 = &sec_jr3;
57 rtic_a = &rtic_a;
58 rtic_b = &rtic_b;
59 rtic_c = &rtic_c;
60 rtic_d = &rtic_d;
61 };
62
63 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 PowerPC,P1023@0 {
68 device_type = "cpu";
69 reg = <0x0>;
70 next-level-cache = <&L2>;
71 };
72
73 PowerPC,P1023@1 {
74 device_type = "cpu";
75 reg = <0x1>;
76 next-level-cache = <&L2>;
77 };
78 };
79};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
deleted file mode 100644
index 884e01bcb24..00000000000
--- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
+++ /dev/null
@@ -1,201 +0,0 @@
1/*
2 * P2020/P2010 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
39 interrupts = <19 2 0 0>;
40};
41
42/* controller at 0xa000 */
43&pci0 {
44 compatible = "fsl,mpc8548-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
50 interrupts = <26 2 0 0>;
51
52 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <26 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
63 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
64 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
65 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
66 >;
67 };
68};
69
70/* controller at 0x9000 */
71&pci1 {
72 compatible = "fsl,mpc8548-pcie";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 255>;
77 clock-frequency = <33333333>;
78 interrupts = <25 2 0 0>;
79
80 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <25 2 0 0>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88
89 interrupt-map = <
90 /* IDSEL 0x0 */
91 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
92 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
93 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
94 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
95 >;
96 };
97};
98
99/* controller at 0x8000 */
100&pci2 {
101 compatible = "fsl,mpc8548-pcie";
102 device_type = "pci";
103 #size-cells = <2>;
104 #address-cells = <3>;
105 bus-range = <0 255>;
106 clock-frequency = <33333333>;
107 interrupts = <24 2 0 0>;
108
109 pcie@0 {
110 reg = <0 0 0 0 0>;
111 #interrupt-cells = <1>;
112 #size-cells = <2>;
113 #address-cells = <3>;
114 device_type = "pci";
115 interrupts = <24 2 0 0>;
116 interrupt-map-mask = <0xf800 0 0 7>;
117
118 interrupt-map = <
119 /* IDSEL 0x0 */
120 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
121 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
122 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
123 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
124 >;
125 };
126};
127
128&soc {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 device_type = "soc";
132 compatible = "fsl,p2020-immr", "simple-bus";
133 bus-frequency = <0>; // Filled out by uboot.
134
135 ecm-law@0 {
136 compatible = "fsl,ecm-law";
137 reg = <0x0 0x1000>;
138 fsl,num-laws = <12>;
139 };
140
141 ecm@1000 {
142 compatible = "fsl,p2020-ecm", "fsl,ecm";
143 reg = <0x1000 0x1000>;
144 interrupts = <17 2 0 0>;
145 };
146
147 memory-controller@2000 {
148 compatible = "fsl,p2020-memory-controller";
149 reg = <0x2000 0x1000>;
150 interrupts = <18 2 0 0>;
151 };
152
153/include/ "pq3-i2c-0.dtsi"
154/include/ "pq3-i2c-1.dtsi"
155/include/ "pq3-duart-0.dtsi"
156/include/ "pq3-espi-0.dtsi"
157 spi0: spi@7000 {
158 fsl,espi-num-chipselects = <4>;
159 };
160
161/include/ "pq3-dma-1.dtsi"
162/include/ "pq3-gpio-0.dtsi"
163
164 L2: l2-cache-controller@20000 {
165 compatible = "fsl,p2020-l2-cache-controller";
166 reg = <0x20000 0x1000>;
167 cache-line-size = <32>; // 32 bytes
168 cache-size = <0x80000>; // L2,512K
169 interrupts = <16 2 0 0>;
170 };
171
172/include/ "pq3-dma-0.dtsi"
173/include/ "pq3-usb2-dr-0.dtsi"
174 usb@22000 {
175 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
176 };
177/include/ "pq3-etsec1-0.dtsi"
178/include/ "pq3-etsec1-timer-0.dtsi"
179
180 ptp_clock@24e00 {
181 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
182 };
183
184
185/include/ "pq3-etsec1-1.dtsi"
186/include/ "pq3-etsec1-2.dtsi"
187/include/ "pq3-esdhc-0.dtsi"
188 sdhc@2e000 {
189 compatible = "fsl,p2020-esdhc", "fsl,esdhc";
190 };
191
192/include/ "pq3-sec3.1-0.dtsi"
193/include/ "pq3-mpic.dtsi"
194/include/ "pq3-mpic-timer-B.dtsi"
195
196 global-utilities@e0000 {
197 compatible = "fsl,p2020-guts";
198 reg = <0xe0000 0x1000>;
199 fsl,has-rstcr;
200 };
201};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
deleted file mode 100644
index 42bf3c6d25c..00000000000
--- a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * P2020/P2010 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P2020";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 ethernet0 = &enet0;
49 ethernet1 = &enet1;
50 ethernet2 = &enet2;
51 pci0 = &pci0;
52 pci1 = &pci1;
53 pci2 = &pci2;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 PowerPC,P2020@0 {
61 device_type = "cpu";
62 reg = <0x0>;
63 next-level-cache = <&L2>;
64 };
65
66 PowerPC,P2020@1 {
67 device_type = "cpu";
68 reg = <0x1>;
69 next-level-cache = <&L2>;
70 };
71 };
72};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
deleted file mode 100644
index 531eab82c6c..00000000000
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ /dev/null
@@ -1,327 +0,0 @@
1/*
2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 ranges;
129
130 port1 {
131 #address-cells = <2>;
132 #size-cells = <2>;
133 cell-index = <1>;
134 };
135
136 port2 {
137 #address-cells = <2>;
138 #size-cells = <2>;
139 cell-index = <2>;
140 };
141};
142
143&dcsr {
144 #address-cells = <1>;
145 #size-cells = <1>;
146 compatible = "fsl,dcsr", "simple-bus";
147
148 dcsr-epu@0 {
149 compatible = "fsl,dcsr-epu";
150 interrupts = <52 2 0 0
151 84 2 0 0
152 85 2 0 0>;
153 reg = <0x0 0x1000>;
154 };
155 dcsr-npc {
156 compatible = "fsl,dcsr-npc";
157 reg = <0x1000 0x1000 0x1000000 0x8000>;
158 };
159 dcsr-nxc@2000 {
160 compatible = "fsl,dcsr-nxc";
161 reg = <0x2000 0x1000>;
162 };
163 dcsr-corenet {
164 compatible = "fsl,dcsr-corenet";
165 reg = <0x8000 0x1000 0xB0000 0x1000>;
166 };
167 dcsr-dpaa@9000 {
168 compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
169 reg = <0x9000 0x1000>;
170 };
171 dcsr-ocn@11000 {
172 compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
173 reg = <0x11000 0x1000>;
174 };
175 dcsr-ddr@12000 {
176 compatible = "fsl,dcsr-ddr";
177 dev-handle = <&ddr1>;
178 reg = <0x12000 0x1000>;
179 };
180 dcsr-nal@18000 {
181 compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
182 reg = <0x18000 0x1000>;
183 };
184 dcsr-rcpm@22000 {
185 compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
186 reg = <0x22000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@40000 {
189 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu0>;
191 reg = <0x40000 0x1000>;
192 };
193 dcsr-cpu-sb-proxy@41000 {
194 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
195 cpu-handle = <&cpu1>;
196 reg = <0x41000 0x1000>;
197 };
198 dcsr-cpu-sb-proxy@42000 {
199 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
200 cpu-handle = <&cpu2>;
201 reg = <0x42000 0x1000>;
202 };
203 dcsr-cpu-sb-proxy@43000 {
204 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
205 cpu-handle = <&cpu3>;
206 reg = <0x43000 0x1000>;
207 };
208};
209
210&soc {
211 #address-cells = <1>;
212 #size-cells = <1>;
213 device_type = "soc";
214 compatible = "simple-bus";
215
216 soc-sram-error {
217 compatible = "fsl,soc-sram-error";
218 interrupts = <16 2 1 29>;
219 };
220
221 corenet-law@0 {
222 compatible = "fsl,corenet-law";
223 reg = <0x0 0x1000>;
224 fsl,num-laws = <32>;
225 };
226
227 ddr1: memory-controller@8000 {
228 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
229 reg = <0x8000 0x1000>;
230 interrupts = <16 2 1 23>;
231 };
232
233 cpc: l3-cache-controller@10000 {
234 compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
235 reg = <0x10000 0x1000>;
236 interrupts = <16 2 1 27>;
237 };
238
239 corenet-cf@18000 {
240 compatible = "fsl,corenet-cf";
241 reg = <0x18000 0x1000>;
242 interrupts = <16 2 1 31>;
243 fsl,ccf-num-csdids = <32>;
244 fsl,ccf-num-snoopids = <32>;
245 };
246
247 iommu@20000 {
248 compatible = "fsl,pamu-v1.0", "fsl,pamu";
249 reg = <0x20000 0x4000>;
250 interrupts = <
251 24 2 0 0
252 16 2 1 30>;
253 };
254
255/include/ "qoriq-mpic.dtsi"
256
257 guts: global-utilities@e0000 {
258 compatible = "fsl,qoriq-device-config-1.0";
259 reg = <0xe0000 0xe00>;
260 fsl,has-rstcr;
261 #sleep-cells = <1>;
262 fsl,liodn-bits = <12>;
263 };
264
265 pins: global-utilities@e0e00 {
266 compatible = "fsl,qoriq-pin-control-1.0";
267 reg = <0xe0e00 0x200>;
268 #sleep-cells = <2>;
269 };
270
271 clockgen: global-utilities@e1000 {
272 compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
273 reg = <0xe1000 0x1000>;
274 clock-frequency = <0>;
275 };
276
277 rcpm: global-utilities@e2000 {
278 compatible = "fsl,qoriq-rcpm-1.0";
279 reg = <0xe2000 0x1000>;
280 #sleep-cells = <1>;
281 };
282
283 sfp: sfp@e8000 {
284 compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
285 reg = <0xe8000 0x1000>;
286 };
287
288 serdes: serdes@ea000 {
289 compatible = "fsl,p2041-serdes";
290 reg = <0xea000 0x1000>;
291 };
292
293/include/ "qoriq-dma-0.dtsi"
294/include/ "qoriq-dma-1.dtsi"
295/include/ "qoriq-espi-0.dtsi"
296 spi@110000 {
297 fsl,espi-num-chipselects = <4>;
298 };
299
300/include/ "qoriq-esdhc-0.dtsi"
301 sdhc@114000 {
302 sdhci,auto-cmd12;
303 };
304
305/include/ "qoriq-i2c-0.dtsi"
306/include/ "qoriq-i2c-1.dtsi"
307/include/ "qoriq-duart-0.dtsi"
308/include/ "qoriq-duart-1.dtsi"
309/include/ "qoriq-gpio-0.dtsi"
310/include/ "qoriq-usb2-mph-0.dtsi"
311 usb0: usb@210000 {
312 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
313 phy_type = "utmi";
314 port0;
315 };
316
317/include/ "qoriq-usb2-dr-0.dtsi"
318 usb1: usb@211000 {
319 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
320 dr_mode = "host";
321 phy_type = "utmi";
322 };
323
324/include/ "qoriq-sata2-0.dtsi"
325/include/ "qoriq-sata2-1.dtsi"
326/include/ "qoriq-sec4.2-0.dtsi"
327};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
deleted file mode 100644
index 7a2697d0454..00000000000
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ /dev/null
@@ -1,114 +0,0 @@
1/*
2 * P2041 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P2041";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 usb0 = &usb0;
57 usb1 = &usb1;
58 dma0 = &dma0;
59 dma1 = &dma1;
60 sdhc = &sdhc;
61 msi0 = &msi0;
62 msi1 = &msi1;
63 msi2 = &msi2;
64
65 crypto = &crypto;
66 sec_jr0 = &sec_jr0;
67 sec_jr1 = &sec_jr1;
68 sec_jr2 = &sec_jr2;
69 sec_jr3 = &sec_jr3;
70 rtic_a = &rtic_a;
71 rtic_b = &rtic_b;
72 rtic_c = &rtic_c;
73 rtic_d = &rtic_d;
74 sec_mon = &sec_mon;
75 };
76
77 cpus {
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 cpu0: PowerPC,e500mc@0 {
82 device_type = "cpu";
83 reg = <0>;
84 next-level-cache = <&L2_0>;
85 L2_0: l2-cache {
86 next-level-cache = <&cpc>;
87 };
88 };
89 cpu1: PowerPC,e500mc@1 {
90 device_type = "cpu";
91 reg = <1>;
92 next-level-cache = <&L2_1>;
93 L2_1: l2-cache {
94 next-level-cache = <&cpc>;
95 };
96 };
97 cpu2: PowerPC,e500mc@2 {
98 device_type = "cpu";
99 reg = <2>;
100 next-level-cache = <&L2_2>;
101 L2_2: l2-cache {
102 next-level-cache = <&cpc>;
103 };
104 };
105 cpu3: PowerPC,e500mc@3 {
106 device_type = "cpu";
107 reg = <3>;
108 next-level-cache = <&L2_3>;
109 L2_3: l2-cache {
110 next-level-cache = <&cpc>;
111 };
112 };
113 };
114};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
deleted file mode 100644
index af4ebc8009e..00000000000
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ /dev/null
@@ -1,354 +0,0 @@
1/*
2 * P3041 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123/* controller at 0x203000 */
124&pci3 {
125 compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
126 device_type = "pci";
127 #size-cells = <2>;
128 #address-cells = <3>;
129 bus-range = <0x0 0xff>;
130 clock-frequency = <33333333>;
131 interrupts = <16 2 1 12>;
132 pcie@0 {
133 reg = <0 0 0 0 0>;
134 #interrupt-cells = <1>;
135 #size-cells = <2>;
136 #address-cells = <3>;
137 device_type = "pci";
138 interrupts = <16 2 1 12>;
139 interrupt-map-mask = <0xf800 0 0 7>;
140 interrupt-map = <
141 /* IDSEL 0x0 */
142 0000 0 0 1 &mpic 43 1 0 0
143 0000 0 0 2 &mpic 0 1 0 0
144 0000 0 0 3 &mpic 4 1 0 0
145 0000 0 0 4 &mpic 8 1 0 0
146 >;
147 };
148};
149
150&rio {
151 compatible = "fsl,srio";
152 interrupts = <16 2 1 11>;
153 #address-cells = <2>;
154 #size-cells = <2>;
155 ranges;
156
157 port1 {
158 #address-cells = <2>;
159 #size-cells = <2>;
160 cell-index = <1>;
161 };
162
163 port2 {
164 #address-cells = <2>;
165 #size-cells = <2>;
166 cell-index = <2>;
167 };
168};
169
170&dcsr {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "fsl,dcsr", "simple-bus";
174
175 dcsr-epu@0 {
176 compatible = "fsl,dcsr-epu";
177 interrupts = <52 2 0 0
178 84 2 0 0
179 85 2 0 0>;
180 reg = <0x0 0x1000>;
181 };
182 dcsr-npc {
183 compatible = "fsl,dcsr-npc";
184 reg = <0x1000 0x1000 0x1000000 0x8000>;
185 };
186 dcsr-nxc@2000 {
187 compatible = "fsl,dcsr-nxc";
188 reg = <0x2000 0x1000>;
189 };
190 dcsr-corenet {
191 compatible = "fsl,dcsr-corenet";
192 reg = <0x8000 0x1000 0xB0000 0x1000>;
193 };
194 dcsr-dpaa@9000 {
195 compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
196 reg = <0x9000 0x1000>;
197 };
198 dcsr-ocn@11000 {
199 compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
200 reg = <0x11000 0x1000>;
201 };
202 dcsr-ddr@12000 {
203 compatible = "fsl,dcsr-ddr";
204 dev-handle = <&ddr1>;
205 reg = <0x12000 0x1000>;
206 };
207 dcsr-nal@18000 {
208 compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
209 reg = <0x18000 0x1000>;
210 };
211 dcsr-rcpm@22000 {
212 compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
213 reg = <0x22000 0x1000>;
214 };
215 dcsr-cpu-sb-proxy@40000 {
216 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
217 cpu-handle = <&cpu0>;
218 reg = <0x40000 0x1000>;
219 };
220 dcsr-cpu-sb-proxy@41000 {
221 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
222 cpu-handle = <&cpu1>;
223 reg = <0x41000 0x1000>;
224 };
225 dcsr-cpu-sb-proxy@42000 {
226 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
227 cpu-handle = <&cpu2>;
228 reg = <0x42000 0x1000>;
229 };
230 dcsr-cpu-sb-proxy@43000 {
231 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
232 cpu-handle = <&cpu3>;
233 reg = <0x43000 0x1000>;
234 };
235};
236
237&soc {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 device_type = "soc";
241 compatible = "simple-bus";
242
243 soc-sram-error {
244 compatible = "fsl,soc-sram-error";
245 interrupts = <16 2 1 29>;
246 };
247
248 corenet-law@0 {
249 compatible = "fsl,corenet-law";
250 reg = <0x0 0x1000>;
251 fsl,num-laws = <32>;
252 };
253
254 ddr1: memory-controller@8000 {
255 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
256 reg = <0x8000 0x1000>;
257 interrupts = <16 2 1 23>;
258 };
259
260 cpc: l3-cache-controller@10000 {
261 compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
262 reg = <0x10000 0x1000>;
263 interrupts = <16 2 1 27>;
264 };
265
266 corenet-cf@18000 {
267 compatible = "fsl,corenet-cf";
268 reg = <0x18000 0x1000>;
269 interrupts = <16 2 1 31>;
270 fsl,ccf-num-csdids = <32>;
271 fsl,ccf-num-snoopids = <32>;
272 };
273
274 iommu@20000 {
275 compatible = "fsl,pamu-v1.0", "fsl,pamu";
276 reg = <0x20000 0x4000>;
277 interrupts = <
278 24 2 0 0
279 16 2 1 30>;
280 };
281
282/include/ "qoriq-mpic.dtsi"
283
284 guts: global-utilities@e0000 {
285 compatible = "fsl,qoriq-device-config-1.0";
286 reg = <0xe0000 0xe00>;
287 fsl,has-rstcr;
288 #sleep-cells = <1>;
289 fsl,liodn-bits = <12>;
290 };
291
292 pins: global-utilities@e0e00 {
293 compatible = "fsl,qoriq-pin-control-1.0";
294 reg = <0xe0e00 0x200>;
295 #sleep-cells = <2>;
296 };
297
298 clockgen: global-utilities@e1000 {
299 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
300 reg = <0xe1000 0x1000>;
301 clock-frequency = <0>;
302 };
303
304 rcpm: global-utilities@e2000 {
305 compatible = "fsl,qoriq-rcpm-1.0";
306 reg = <0xe2000 0x1000>;
307 #sleep-cells = <1>;
308 };
309
310 sfp: sfp@e8000 {
311 compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
312 reg = <0xe8000 0x1000>;
313 };
314
315 serdes: serdes@ea000 {
316 compatible = "fsl,p3041-serdes";
317 reg = <0xea000 0x1000>;
318 };
319
320/include/ "qoriq-dma-0.dtsi"
321/include/ "qoriq-dma-1.dtsi"
322/include/ "qoriq-espi-0.dtsi"
323 spi@110000 {
324 fsl,espi-num-chipselects = <4>;
325 };
326
327/include/ "qoriq-esdhc-0.dtsi"
328 sdhc@114000 {
329 sdhci,auto-cmd12;
330 };
331
332/include/ "qoriq-i2c-0.dtsi"
333/include/ "qoriq-i2c-1.dtsi"
334/include/ "qoriq-duart-0.dtsi"
335/include/ "qoriq-duart-1.dtsi"
336/include/ "qoriq-gpio-0.dtsi"
337/include/ "qoriq-usb2-mph-0.dtsi"
338 usb0: usb@210000 {
339 compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
340 phy_type = "utmi";
341 port0;
342 };
343
344/include/ "qoriq-usb2-dr-0.dtsi"
345 usb1: usb@211000 {
346 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
347 dr_mode = "host";
348 phy_type = "utmi";
349 };
350
351/include/ "qoriq-sata2-0.dtsi"
352/include/ "qoriq-sata2-1.dtsi"
353/include/ "qoriq-sec4.2-0.dtsi"
354};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
deleted file mode 100644
index c9ca2c305cf..00000000000
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * P3041 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P3041";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 pci3 = &pci3;
57 usb0 = &usb0;
58 usb1 = &usb1;
59 dma0 = &dma0;
60 dma1 = &dma1;
61 sdhc = &sdhc;
62 msi0 = &msi0;
63 msi1 = &msi1;
64 msi2 = &msi2;
65
66 crypto = &crypto;
67 sec_jr0 = &sec_jr0;
68 sec_jr1 = &sec_jr1;
69 sec_jr2 = &sec_jr2;
70 sec_jr3 = &sec_jr3;
71 rtic_a = &rtic_a;
72 rtic_b = &rtic_b;
73 rtic_c = &rtic_c;
74 rtic_d = &rtic_d;
75 sec_mon = &sec_mon;
76 };
77
78 cpus {
79 #address-cells = <1>;
80 #size-cells = <0>;
81
82 cpu0: PowerPC,e500mc@0 {
83 device_type = "cpu";
84 reg = <0>;
85 next-level-cache = <&L2_0>;
86 L2_0: l2-cache {
87 next-level-cache = <&cpc>;
88 };
89 };
90 cpu1: PowerPC,e500mc@1 {
91 device_type = "cpu";
92 reg = <1>;
93 next-level-cache = <&L2_1>;
94 L2_1: l2-cache {
95 next-level-cache = <&cpc>;
96 };
97 };
98 cpu2: PowerPC,e500mc@2 {
99 device_type = "cpu";
100 reg = <2>;
101 next-level-cache = <&L2_2>;
102 L2_2: l2-cache {
103 next-level-cache = <&cpc>;
104 };
105 };
106 cpu3: PowerPC,e500mc@3 {
107 device_type = "cpu";
108 reg = <3>;
109 next-level-cache = <&L2_3>;
110 L2_3: l2-cache {
111 next-level-cache = <&cpc>;
112 };
113 };
114 };
115};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
deleted file mode 100644
index 4f9c9f682ec..00000000000
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ /dev/null
@@ -1,357 +0,0 @@
1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p4080-pcie";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p4080-pcie";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p4080-pcie";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&rio {
124 compatible = "fsl,srio";
125 interrupts = <16 2 1 11>;
126 #address-cells = <2>;
127 #size-cells = <2>;
128 fsl,srio-rmu-handle = <&rmu>;
129 ranges;
130
131 port1 {
132 #address-cells = <2>;
133 #size-cells = <2>;
134 cell-index = <1>;
135 };
136
137 port2 {
138 #address-cells = <2>;
139 #size-cells = <2>;
140 cell-index = <2>;
141 };
142};
143
144&dcsr {
145 #address-cells = <1>;
146 #size-cells = <1>;
147 compatible = "fsl,dcsr", "simple-bus";
148
149 dcsr-epu@0 {
150 compatible = "fsl,dcsr-epu";
151 interrupts = <52 2 0 0
152 84 2 0 0
153 85 2 0 0>;
154 reg = <0x0 0x1000>;
155 };
156 dcsr-npc {
157 compatible = "fsl,dcsr-npc";
158 reg = <0x1000 0x1000 0x1000000 0x8000>;
159 };
160 dcsr-nxc@2000 {
161 compatible = "fsl,dcsr-nxc";
162 reg = <0x2000 0x1000>;
163 };
164 dcsr-corenet {
165 compatible = "fsl,dcsr-corenet";
166 reg = <0x8000 0x1000 0xB0000 0x1000>;
167 };
168 dcsr-dpaa@9000 {
169 compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
170 reg = <0x9000 0x1000>;
171 };
172 dcsr-ocn@11000 {
173 compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
174 reg = <0x11000 0x1000>;
175 };
176 dcsr-ddr@12000 {
177 compatible = "fsl,dcsr-ddr";
178 dev-handle = <&ddr1>;
179 reg = <0x12000 0x1000>;
180 };
181 dcsr-ddr@13000 {
182 compatible = "fsl,dcsr-ddr";
183 dev-handle = <&ddr2>;
184 reg = <0x13000 0x1000>;
185 };
186 dcsr-nal@18000 {
187 compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
188 reg = <0x18000 0x1000>;
189 };
190 dcsr-rcpm@22000 {
191 compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
192 reg = <0x22000 0x1000>;
193 };
194 dcsr-cpu-sb-proxy@40000 {
195 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
196 cpu-handle = <&cpu0>;
197 reg = <0x40000 0x1000>;
198 };
199 dcsr-cpu-sb-proxy@41000 {
200 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
201 cpu-handle = <&cpu1>;
202 reg = <0x41000 0x1000>;
203 };
204 dcsr-cpu-sb-proxy@42000 {
205 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
206 cpu-handle = <&cpu2>;
207 reg = <0x42000 0x1000>;
208 };
209 dcsr-cpu-sb-proxy@43000 {
210 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
211 cpu-handle = <&cpu3>;
212 reg = <0x43000 0x1000>;
213 };
214 dcsr-cpu-sb-proxy@44000 {
215 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
216 cpu-handle = <&cpu4>;
217 reg = <0x44000 0x1000>;
218 };
219 dcsr-cpu-sb-proxy@45000 {
220 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
221 cpu-handle = <&cpu5>;
222 reg = <0x45000 0x1000>;
223 };
224 dcsr-cpu-sb-proxy@46000 {
225 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
226 cpu-handle = <&cpu6>;
227 reg = <0x46000 0x1000>;
228 };
229 dcsr-cpu-sb-proxy@47000 {
230 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
231 cpu-handle = <&cpu7>;
232 reg = <0x47000 0x1000>;
233 };
234
235};
236
237&soc {
238 #address-cells = <1>;
239 #size-cells = <1>;
240 device_type = "soc";
241 compatible = "simple-bus";
242
243 soc-sram-error {
244 compatible = "fsl,soc-sram-error";
245 interrupts = <16 2 1 29>;
246 };
247
248 corenet-law@0 {
249 compatible = "fsl,corenet-law";
250 reg = <0x0 0x1000>;
251 fsl,num-laws = <32>;
252 };
253
254 ddr1: memory-controller@8000 {
255 compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
256 reg = <0x8000 0x1000>;
257 interrupts = <16 2 1 23>;
258 };
259
260 ddr2: memory-controller@9000 {
261 compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
262 reg = <0x9000 0x1000>;
263 interrupts = <16 2 1 22>;
264 };
265
266 cpc: l3-cache-controller@10000 {
267 compatible = "fsl,p4080-l3-cache-controller", "cache";
268 reg = <0x10000 0x1000
269 0x11000 0x1000>;
270 interrupts = <16 2 1 27
271 16 2 1 26>;
272 };
273
274 corenet-cf@18000 {
275 compatible = "fsl,corenet-cf";
276 reg = <0x18000 0x1000>;
277 interrupts = <16 2 1 31>;
278 fsl,ccf-num-csdids = <32>;
279 fsl,ccf-num-snoopids = <32>;
280 };
281
282 iommu@20000 {
283 compatible = "fsl,pamu-v1.0", "fsl,pamu";
284 reg = <0x20000 0x5000>;
285 interrupts = <
286 24 2 0 0
287 16 2 1 30>;
288 };
289
290/include/ "qoriq-rmu-0.dtsi"
291/include/ "qoriq-mpic.dtsi"
292
293 guts: global-utilities@e0000 {
294 compatible = "fsl,qoriq-device-config-1.0";
295 reg = <0xe0000 0xe00>;
296 fsl,has-rstcr;
297 #sleep-cells = <1>;
298 fsl,liodn-bits = <12>;
299 };
300
301 pins: global-utilities@e0e00 {
302 compatible = "fsl,qoriq-pin-control-1.0";
303 reg = <0xe0e00 0x200>;
304 #sleep-cells = <2>;
305 };
306
307 clockgen: global-utilities@e1000 {
308 compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
309 reg = <0xe1000 0x1000>;
310 clock-frequency = <0>;
311 };
312
313 rcpm: global-utilities@e2000 {
314 compatible = "fsl,qoriq-rcpm-1.0";
315 reg = <0xe2000 0x1000>;
316 #sleep-cells = <1>;
317 };
318
319 sfp: sfp@e8000 {
320 compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
321 reg = <0xe8000 0x1000>;
322 };
323
324 serdes: serdes@ea000 {
325 compatible = "fsl,p4080-serdes";
326 reg = <0xea000 0x1000>;
327 };
328
329/include/ "qoriq-dma-0.dtsi"
330/include/ "qoriq-dma-1.dtsi"
331/include/ "qoriq-espi-0.dtsi"
332 spi@110000 {
333 fsl,espi-num-chipselects = <4>;
334 };
335
336/include/ "qoriq-esdhc-0.dtsi"
337 sdhc@114000 {
338 voltage-ranges = <3300 3300>;
339 sdhci,auto-cmd12;
340 };
341
342/include/ "qoriq-i2c-0.dtsi"
343/include/ "qoriq-i2c-1.dtsi"
344/include/ "qoriq-duart-0.dtsi"
345/include/ "qoriq-duart-1.dtsi"
346/include/ "qoriq-gpio-0.dtsi"
347/include/ "qoriq-usb2-mph-0.dtsi"
348 usb@210000 {
349 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
350 port0;
351 };
352/include/ "qoriq-usb2-dr-0.dtsi"
353 usb@211000 {
354 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
355 };
356/include/ "qoriq-sec4.0-0.dtsi"
357};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
deleted file mode 100644
index 493d9a056b5..00000000000
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500mc_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P4080";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 usb0 = &usb0;
57 usb1 = &usb1;
58 dma0 = &dma0;
59 dma1 = &dma1;
60 sdhc = &sdhc;
61 msi0 = &msi0;
62 msi1 = &msi1;
63 msi2 = &msi2;
64
65 crypto = &crypto;
66 sec_jr0 = &sec_jr0;
67 sec_jr1 = &sec_jr1;
68 sec_jr2 = &sec_jr2;
69 sec_jr3 = &sec_jr3;
70 rtic_a = &rtic_a;
71 rtic_b = &rtic_b;
72 rtic_c = &rtic_c;
73 rtic_d = &rtic_d;
74 sec_mon = &sec_mon;
75 };
76
77 cpus {
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 cpu0: PowerPC,e500mc@0 {
82 device_type = "cpu";
83 reg = <0>;
84 next-level-cache = <&L2_0>;
85 L2_0: l2-cache {
86 next-level-cache = <&cpc>;
87 };
88 };
89 cpu1: PowerPC,e500mc@1 {
90 device_type = "cpu";
91 reg = <1>;
92 next-level-cache = <&L2_1>;
93 L2_1: l2-cache {
94 next-level-cache = <&cpc>;
95 };
96 };
97 cpu2: PowerPC,e500mc@2 {
98 device_type = "cpu";
99 reg = <2>;
100 next-level-cache = <&L2_2>;
101 L2_2: l2-cache {
102 next-level-cache = <&cpc>;
103 };
104 };
105 cpu3: PowerPC,e500mc@3 {
106 device_type = "cpu";
107 reg = <3>;
108 next-level-cache = <&L2_3>;
109 L2_3: l2-cache {
110 next-level-cache = <&cpc>;
111 };
112 };
113 cpu4: PowerPC,e500mc@4 {
114 device_type = "cpu";
115 reg = <4>;
116 next-level-cache = <&L2_4>;
117 L2_4: l2-cache {
118 next-level-cache = <&cpc>;
119 };
120 };
121 cpu5: PowerPC,e500mc@5 {
122 device_type = "cpu";
123 reg = <5>;
124 next-level-cache = <&L2_5>;
125 L2_5: l2-cache {
126 next-level-cache = <&cpc>;
127 };
128 };
129 cpu6: PowerPC,e500mc@6 {
130 device_type = "cpu";
131 reg = <6>;
132 next-level-cache = <&L2_6>;
133 L2_6: l2-cache {
134 next-level-cache = <&cpc>;
135 };
136 };
137 cpu7: PowerPC,e500mc@7 {
138 device_type = "cpu";
139 reg = <7>;
140 next-level-cache = <&L2_7>;
141 L2_7: l2-cache {
142 next-level-cache = <&cpc>;
143 };
144 };
145 };
146};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
deleted file mode 100644
index 5d7205b7bb0..00000000000
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ /dev/null
@@ -1,358 +0,0 @@
1/*
2 * P5020/5010 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123/* controller at 0x203000 */
124&pci3 {
125 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
126 device_type = "pci";
127 #size-cells = <2>;
128 #address-cells = <3>;
129 bus-range = <0x0 0xff>;
130 clock-frequency = <33333333>;
131 interrupts = <16 2 1 12>;
132 pcie@0 {
133 reg = <0 0 0 0 0>;
134 #interrupt-cells = <1>;
135 #size-cells = <2>;
136 #address-cells = <3>;
137 device_type = "pci";
138 interrupts = <16 2 1 12>;
139 interrupt-map-mask = <0xf800 0 0 7>;
140 interrupt-map = <
141 /* IDSEL 0x0 */
142 0000 0 0 1 &mpic 43 1 0 0
143 0000 0 0 2 &mpic 0 1 0 0
144 0000 0 0 3 &mpic 4 1 0 0
145 0000 0 0 4 &mpic 8 1 0 0
146 >;
147 };
148};
149
150&rio {
151 compatible = "fsl,srio";
152 interrupts = <16 2 1 11>;
153 #address-cells = <2>;
154 #size-cells = <2>;
155 ranges;
156
157 port1 {
158 #address-cells = <2>;
159 #size-cells = <2>;
160 cell-index = <1>;
161 };
162
163 port2 {
164 #address-cells = <2>;
165 #size-cells = <2>;
166 cell-index = <2>;
167 };
168};
169
170&dcsr {
171 #address-cells = <1>;
172 #size-cells = <1>;
173 compatible = "fsl,dcsr", "simple-bus";
174
175 dcsr-epu@0 {
176 compatible = "fsl,dcsr-epu";
177 interrupts = <52 2 0 0
178 84 2 0 0
179 85 2 0 0>;
180 reg = <0x0 0x1000>;
181 };
182 dcsr-npc {
183 compatible = "fsl,dcsr-npc";
184 reg = <0x1000 0x1000 0x1000000 0x8000>;
185 };
186 dcsr-nxc@2000 {
187 compatible = "fsl,dcsr-nxc";
188 reg = <0x2000 0x1000>;
189 };
190 dcsr-corenet {
191 compatible = "fsl,dcsr-corenet";
192 reg = <0x8000 0x1000 0xB0000 0x1000>;
193 };
194 dcsr-dpaa@9000 {
195 compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
196 reg = <0x9000 0x1000>;
197 };
198 dcsr-ocn@11000 {
199 compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
200 reg = <0x11000 0x1000>;
201 };
202 dcsr-ddr@12000 {
203 compatible = "fsl,dcsr-ddr";
204 dev-handle = <&ddr1>;
205 reg = <0x12000 0x1000>;
206 };
207 dcsr-ddr@13000 {
208 compatible = "fsl,dcsr-ddr";
209 dev-handle = <&ddr2>;
210 reg = <0x13000 0x1000>;
211 };
212 dcsr-nal@18000 {
213 compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
214 reg = <0x18000 0x1000>;
215 };
216 dcsr-rcpm@22000 {
217 compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
218 reg = <0x22000 0x1000>;
219 };
220 dcsr-cpu-sb-proxy@40000 {
221 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
222 cpu-handle = <&cpu0>;
223 reg = <0x40000 0x1000>;
224 };
225 dcsr-cpu-sb-proxy@41000 {
226 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
227 cpu-handle = <&cpu1>;
228 reg = <0x41000 0x1000>;
229 };
230};
231
232&soc {
233 #address-cells = <1>;
234 #size-cells = <1>;
235 device_type = "soc";
236 compatible = "simple-bus";
237
238 soc-sram-error {
239 compatible = "fsl,soc-sram-error";
240 interrupts = <16 2 1 29>;
241 };
242
243 corenet-law@0 {
244 compatible = "fsl,corenet-law";
245 reg = <0x0 0x1000>;
246 fsl,num-laws = <32>;
247 };
248
249 ddr1: memory-controller@8000 {
250 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
251 reg = <0x8000 0x1000>;
252 interrupts = <16 2 1 23>;
253 };
254
255 ddr2: memory-controller@9000 {
256 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
257 reg = <0x9000 0x1000>;
258 interrupts = <16 2 1 22>;
259 };
260
261 cpc: l3-cache-controller@10000 {
262 compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
263 reg = <0x10000 0x1000
264 0x11000 0x1000>;
265 interrupts = <16 2 1 27
266 16 2 1 26>;
267 };
268
269 corenet-cf@18000 {
270 compatible = "fsl,corenet-cf";
271 reg = <0x18000 0x1000>;
272 interrupts = <16 2 1 31>;
273 fsl,ccf-num-csdids = <32>;
274 fsl,ccf-num-snoopids = <32>;
275 };
276
277 iommu@20000 {
278 compatible = "fsl,pamu-v1.0", "fsl,pamu";
279 reg = <0x20000 0x4000>;
280 interrupts = <
281 24 2 0 0
282 16 2 1 30>;
283 };
284
285/include/ "qoriq-mpic.dtsi"
286
287 guts: global-utilities@e0000 {
288 compatible = "fsl,qoriq-device-config-1.0";
289 reg = <0xe0000 0xe00>;
290 fsl,has-rstcr;
291 #sleep-cells = <1>;
292 fsl,liodn-bits = <12>;
293 };
294
295 pins: global-utilities@e0e00 {
296 compatible = "fsl,qoriq-pin-control-1.0";
297 reg = <0xe0e00 0x200>;
298 #sleep-cells = <2>;
299 };
300
301 clockgen: global-utilities@e1000 {
302 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
303 reg = <0xe1000 0x1000>;
304 clock-frequency = <0>;
305 };
306
307 rcpm: global-utilities@e2000 {
308 compatible = "fsl,qoriq-rcpm-1.0";
309 reg = <0xe2000 0x1000>;
310 #sleep-cells = <1>;
311 };
312
313 sfp: sfp@e8000 {
314 compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
315 reg = <0xe8000 0x1000>;
316 };
317
318 serdes: serdes@ea000 {
319 compatible = "fsl,p5020-serdes";
320 reg = <0xea000 0x1000>;
321 };
322
323/include/ "qoriq-dma-0.dtsi"
324/include/ "qoriq-dma-1.dtsi"
325/include/ "qoriq-espi-0.dtsi"
326 spi@110000 {
327 fsl,espi-num-chipselects = <4>;
328 };
329
330/include/ "qoriq-esdhc-0.dtsi"
331 sdhc@114000 {
332 sdhci,auto-cmd12;
333 };
334
335/include/ "qoriq-i2c-0.dtsi"
336/include/ "qoriq-i2c-1.dtsi"
337/include/ "qoriq-duart-0.dtsi"
338/include/ "qoriq-duart-1.dtsi"
339/include/ "qoriq-gpio-0.dtsi"
340/include/ "qoriq-usb2-mph-0.dtsi"
341 usb0: usb@210000 {
342 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
343 phy_type = "utmi";
344 port0;
345 };
346
347/include/ "qoriq-usb2-dr-0.dtsi"
348 usb1: usb@211000 {
349 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
350 dr_mode = "host";
351 phy_type = "utmi";
352 };
353
354/include/ "qoriq-sata2-0.dtsi"
355/include/ "qoriq-sata2-1.dtsi"
356/include/ "qoriq-sec4.2-0.dtsi"
357/include/ "qoriq-raid1.0-0.dtsi"
358};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
deleted file mode 100644
index 8df47fc45ab..00000000000
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e5500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P5020";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 pci3 = &pci3;
57 usb0 = &usb0;
58 usb1 = &usb1;
59 dma0 = &dma0;
60 dma1 = &dma1;
61 sdhc = &sdhc;
62 msi0 = &msi0;
63 msi1 = &msi1;
64 msi2 = &msi2;
65
66 crypto = &crypto;
67 sec_jr0 = &sec_jr0;
68 sec_jr1 = &sec_jr1;
69 sec_jr2 = &sec_jr2;
70 sec_jr3 = &sec_jr3;
71 rtic_a = &rtic_a;
72 rtic_b = &rtic_b;
73 rtic_c = &rtic_c;
74 rtic_d = &rtic_d;
75 sec_mon = &sec_mon;
76
77 raideng = &raideng;
78 raideng_jr0 = &raideng_jr0;
79 raideng_jr1 = &raideng_jr1;
80 raideng_jr2 = &raideng_jr2;
81 raideng_jr3 = &raideng_jr3;
82 };
83
84 cpus {
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 cpu0: PowerPC,e5500@0 {
89 device_type = "cpu";
90 reg = <0>;
91 next-level-cache = <&L2_0>;
92 L2_0: l2-cache {
93 next-level-cache = <&cpc>;
94 };
95 };
96 cpu1: PowerPC,e5500@1 {
97 device_type = "cpu";
98 reg = <1>;
99 next-level-cache = <&L2_1>;
100 L2_1: l2-cache {
101 next-level-cache = <&cpc>;
102 };
103 };
104 };
105};
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
deleted file mode 100644
index db2c9a7b3a0..00000000000
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ /dev/null
@@ -1,320 +0,0 @@
1/*
2 * P5040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
51 pcie@0 {
52 reg = <0 0 0 0 0>;
53 #interrupt-cells = <1>;
54 #size-cells = <2>;
55 #address-cells = <3>;
56 device_type = "pci";
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69/* controller at 0x201000 */
70&pci1 {
71 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
72 device_type = "pci";
73 #size-cells = <2>;
74 #address-cells = <3>;
75 bus-range = <0 0xff>;
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
78 pcie@0 {
79 reg = <0 0 0 0 0>;
80 #interrupt-cells = <1>;
81 #size-cells = <2>;
82 #address-cells = <3>;
83 device_type = "pci";
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <
87 /* IDSEL 0x0 */
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
92 >;
93 };
94};
95
96/* controller at 0x202000 */
97&pci2 {
98 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
113 interrupt-map = <
114 /* IDSEL 0x0 */
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
119 >;
120 };
121};
122
123&dcsr {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "fsl,dcsr", "simple-bus";
127
128 dcsr-epu@0 {
129 compatible = "fsl,dcsr-epu";
130 interrupts = <52 2 0 0
131 84 2 0 0
132 85 2 0 0>;
133 reg = <0x0 0x1000>;
134 };
135 dcsr-npc {
136 compatible = "fsl,dcsr-npc";
137 reg = <0x1000 0x1000 0x1000000 0x8000>;
138 };
139 dcsr-nxc@2000 {
140 compatible = "fsl,dcsr-nxc";
141 reg = <0x2000 0x1000>;
142 };
143 dcsr-corenet {
144 compatible = "fsl,dcsr-corenet";
145 reg = <0x8000 0x1000 0xB0000 0x1000>;
146 };
147 dcsr-dpaa@9000 {
148 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
149 reg = <0x9000 0x1000>;
150 };
151 dcsr-ocn@11000 {
152 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
153 reg = <0x11000 0x1000>;
154 };
155 dcsr-ddr@12000 {
156 compatible = "fsl,dcsr-ddr";
157 dev-handle = <&ddr1>;
158 reg = <0x12000 0x1000>;
159 };
160 dcsr-ddr@13000 {
161 compatible = "fsl,dcsr-ddr";
162 dev-handle = <&ddr2>;
163 reg = <0x13000 0x1000>;
164 };
165 dcsr-nal@18000 {
166 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
168 };
169 dcsr-rcpm@22000 {
170 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
172 };
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
177 };
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
182 };
183 dcsr-cpu-sb-proxy@42000 {
184 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu2>;
186 reg = <0x42000 0x1000>;
187 };
188 dcsr-cpu-sb-proxy@43000 {
189 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu3>;
191 reg = <0x43000 0x1000>;
192 };
193};
194
195&soc {
196 #address-cells = <1>;
197 #size-cells = <1>;
198 device_type = "soc";
199 compatible = "simple-bus";
200
201 soc-sram-error {
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
204 };
205
206 corenet-law@0 {
207 compatible = "fsl,corenet-law";
208 reg = <0x0 0x1000>;
209 fsl,num-laws = <32>;
210 };
211
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
216 };
217
218 ddr2: memory-controller@9000 {
219 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
220 reg = <0x9000 0x1000>;
221 interrupts = <16 2 1 22>;
222 };
223
224 cpc: l3-cache-controller@10000 {
225 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
226 reg = <0x10000 0x1000
227 0x11000 0x1000>;
228 interrupts = <16 2 1 27
229 16 2 1 26>;
230 };
231
232 corenet-cf@18000 {
233 compatible = "fsl,corenet-cf";
234 reg = <0x18000 0x1000>;
235 interrupts = <16 2 1 31>;
236 fsl,ccf-num-csdids = <32>;
237 fsl,ccf-num-snoopids = <32>;
238 };
239
240 iommu@20000 {
241 compatible = "fsl,pamu-v1.0", "fsl,pamu";
242 reg = <0x20000 0x5000>;
243 interrupts = <
244 24 2 0 0
245 16 2 1 30>;
246 };
247
248/include/ "qoriq-mpic.dtsi"
249
250 guts: global-utilities@e0000 {
251 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
252 reg = <0xe0000 0xe00>;
253 fsl,has-rstcr;
254 #sleep-cells = <1>;
255 fsl,liodn-bits = <12>;
256 };
257
258 pins: global-utilities@e0e00 {
259 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
260 reg = <0xe0e00 0x200>;
261 #sleep-cells = <2>;
262 };
263
264 clockgen: global-utilities@e1000 {
265 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
266 reg = <0xe1000 0x1000>;
267 clock-frequency = <0>;
268 };
269
270 rcpm: global-utilities@e2000 {
271 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
272 reg = <0xe2000 0x1000>;
273 #sleep-cells = <1>;
274 };
275
276 sfp: sfp@e8000 {
277 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
278 reg = <0xe8000 0x1000>;
279 };
280
281 serdes: serdes@ea000 {
282 compatible = "fsl,p5040-serdes";
283 reg = <0xea000 0x1000>;
284 };
285
286/include/ "qoriq-dma-0.dtsi"
287/include/ "qoriq-dma-1.dtsi"
288/include/ "qoriq-espi-0.dtsi"
289 spi@110000 {
290 fsl,espi-num-chipselects = <4>;
291 };
292
293/include/ "qoriq-esdhc-0.dtsi"
294 sdhc@114000 {
295 sdhci,auto-cmd12;
296 };
297
298/include/ "qoriq-i2c-0.dtsi"
299/include/ "qoriq-i2c-1.dtsi"
300/include/ "qoriq-duart-0.dtsi"
301/include/ "qoriq-duart-1.dtsi"
302/include/ "qoriq-gpio-0.dtsi"
303/include/ "qoriq-usb2-mph-0.dtsi"
304 usb0: usb@210000 {
305 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
306 phy_type = "utmi";
307 port0;
308 };
309
310/include/ "qoriq-usb2-dr-0.dtsi"
311 usb1: usb@211000 {
312 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
313 dr_mode = "host";
314 phy_type = "utmi";
315 };
316
317/include/ "qoriq-sata2-0.dtsi"
318/include/ "qoriq-sata2-1.dtsi"
319/include/ "qoriq-sec5.2-0.dtsi"
320};
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
deleted file mode 100644
index 40ca943f5d1..00000000000
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ /dev/null
@@ -1,114 +0,0 @@
1/*
2 * P5040 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/include/ "e5500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,P5040";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 pci0 = &pci0;
54 pci1 = &pci1;
55 pci2 = &pci2;
56 usb0 = &usb0;
57 usb1 = &usb1;
58 dma0 = &dma0;
59 dma1 = &dma1;
60 sdhc = &sdhc;
61 msi0 = &msi0;
62 msi1 = &msi1;
63 msi2 = &msi2;
64
65 crypto = &crypto;
66 sec_jr0 = &sec_jr0;
67 sec_jr1 = &sec_jr1;
68 sec_jr2 = &sec_jr2;
69 sec_jr3 = &sec_jr3;
70 rtic_a = &rtic_a;
71 rtic_b = &rtic_b;
72 rtic_c = &rtic_c;
73 rtic_d = &rtic_d;
74 sec_mon = &sec_mon;
75 };
76
77 cpus {
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 cpu0: PowerPC,e5500@0 {
82 device_type = "cpu";
83 reg = <0>;
84 next-level-cache = <&L2_0>;
85 L2_0: l2-cache {
86 next-level-cache = <&cpc>;
87 };
88 };
89 cpu1: PowerPC,e5500@1 {
90 device_type = "cpu";
91 reg = <1>;
92 next-level-cache = <&L2_1>;
93 L2_1: l2-cache {
94 next-level-cache = <&cpc>;
95 };
96 };
97 cpu2: PowerPC,e5500@2 {
98 device_type = "cpu";
99 reg = <2>;
100 next-level-cache = <&L2_2>;
101 L2_2: l2-cache {
102 next-level-cache = <&cpc>;
103 };
104 };
105 cpu3: PowerPC,e5500@3 {
106 device_type = "cpu";
107 reg = <3>;
108 next-level-cache = <&L2_3>;
109 L2_3: l2-cache {
110 next-level-cache = <&cpc>;
111 };
112 };
113 };
114};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
deleted file mode 100644
index b5b37ad30e7..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * PQ3 DMA device tree stub [ controller @ offset 0x21000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma@21300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x21300 0x4>;
40 ranges = <0x0 0x21100 0x200>;
41 cell-index = <0>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <20 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <21 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <22 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <23 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
deleted file mode 100644
index 28cb8a55d80..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma@c300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0xc300 0x4>;
40 ranges = <0x0 0xc100 0x200>;
41 cell-index = <1>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <76 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <77 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <78 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <79 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
deleted file mode 100644
index 5e268fdb9d1..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * PQ3 DUART device tree stub [ controller @ offset 0x4000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial0: serial@4500 {
36 cell-index = <0>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x4500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <42 2 0 0>;
42};
43
44serial1: serial@4600 {
45 cell-index = <1>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x4600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <42 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
deleted file mode 100644
index 5743433e278..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sdhc@2e000 {
36 compatible = "fsl,esdhc";
37 reg = <0x2e000 0x1000>;
38 interrupts = <72 0x2 0 0>;
39 /* Filled in by U-Boot */
40 clock-frequency = <0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
deleted file mode 100644
index 75854b2e039..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35spi@7000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,mpc8536-espi";
39 reg = <0x7000 0x1000>;
40 interrupts = <59 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
deleted file mode 100644
index 3b0650a9847..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@24000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x24000 0x1000>;
43 ranges = <0x0 0x24000 0x1000>;
44 fsl,magic-packet;
45 local-mac-address = [ 00 00 00 00 00 00 ];
46 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
47};
48
49mdio@24520 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,gianfar-mdio";
53 reg = <0x24520 0x20>;
54};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
deleted file mode 100644
index 96693b41f0f..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@25000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x25000 0x1000>;
43 ranges = <0x0 0x25000 0x1000>;
44 fsl,magic-packet;
45 local-mac-address = [ 00 00 00 00 00 00 ];
46 interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
47};
48
49mdio@25520 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,gianfar-tbi";
53 reg = <0x25520 0x20>;
54};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
deleted file mode 100644
index 6b3fab19da1..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@26000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <2>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x26000 0x1000>;
43 ranges = <0x0 0x26000 0x1000>;
44 fsl,magic-packet;
45 local-mac-address = [ 00 00 00 00 00 00 ];
46 interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
47};
48
49mdio@26520 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,gianfar-tbi";
53 reg = <0x26520 0x20>;
54};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
deleted file mode 100644
index 0da592d93dd..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ethernet@27000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <3>;
39 device_type = "network";
40 model = "eTSEC";
41 compatible = "gianfar";
42 reg = <0x27000 0x1000>;
43 ranges = <0x0 0x27000 0x1000>;
44 fsl,magic-packet;
45 local-mac-address = [ 00 00 00 00 00 00 ];
46 interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
47};
48
49mdio@27520 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,gianfar-tbi";
53 reg = <0x27520 0x20>;
54};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
deleted file mode 100644
index efe2ca04bce..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35ptp_clock@24e00 {
36 compatible = "fsl,etsec-ptp";
37 reg = <0x24e00 0xb0>;
38 interrupts = <68 2 0 0 69 2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
deleted file mode 100644
index 1382fec9e8c..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35
36mdio@24000 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 compatible = "fsl,etsec2-mdio";
40 reg = <0x24000 0x1000 0xb0030 0x4>;
41};
42
43ethernet@b0000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "network";
47 model = "eTSEC";
48 compatible = "fsl,etsec2";
49 fsl,num_rx_queues = <0x8>;
50 fsl,num_tx_queues = <0x8>;
51 fsl,magic-packet;
52 local-mac-address = [ 00 00 00 00 00 00 ];
53
54 queue-group@b0000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0xb0000 0x1000>;
58 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
59 };
60};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
deleted file mode 100644
index 221cd2ea5b3..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35
36mdio@25000 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 compatible = "fsl,etsec2-tbi";
40 reg = <0x25000 0x1000 0xb1030 0x4>;
41};
42
43ethernet@b1000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "network";
47 model = "eTSEC";
48 compatible = "fsl,etsec2";
49 fsl,num_rx_queues = <0x8>;
50 fsl,num_tx_queues = <0x8>;
51 fsl,magic-packet;
52 local-mac-address = [ 00 00 00 00 00 00 ];
53
54 queue-group@b1000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0xb1000 0x1000>;
58 interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
59 };
60};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
deleted file mode 100644
index 61456c31760..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mdio@26000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,etsec2-tbi";
39 reg = <0x26000 0x1000 0xb1030 0x4>;
40};
41
42ethernet@b2000 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 device_type = "network";
46 model = "eTSEC";
47 compatible = "fsl,etsec2";
48 fsl,num_rx_queues = <0x8>;
49 fsl,num_tx_queues = <0x8>;
50 fsl,magic-packet;
51 local-mac-address = [ 00 00 00 00 00 00 ];
52
53 queue-group@b2000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 reg = <0xb2000 0x1000>;
57 interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
58 };
59};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
deleted file mode 100644
index 034ab8fac22..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet0_grp2 {
36 queue-group@b4000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb4000 0x1000>;
40 interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
deleted file mode 100644
index 3be9ba3b374..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet1_grp2 {
36 queue-group@b5000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb5000 0x1000>;
40 interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
deleted file mode 100644
index 02a33457048..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&enet2_grp2 {
36 queue-group@b6000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0xb6000 0x1000>;
40 interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>;
41 };
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
deleted file mode 100644
index 72a3ef5945c..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * PQ3 GPIO device tree stub [ controller @ offset 0xf000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio-controller@f000 {
36 #gpio-cells = <2>;
37 compatible = "fsl,pq3-gpio";
38 reg = <0xf000 0x100>;
39 interrupts = <47 0x2 0 0>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
deleted file mode 100644
index d1dd6fb82a7..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * PQ3 I2C device tree stub [ controller @ offset 0x3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@3000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <0>;
39 compatible = "fsl-i2c";
40 reg = <0x3000 0x100>;
41 interrupts = <43 2 0 0>;
42 dfsrr;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
deleted file mode 100644
index a9bd803e209..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * PQ3 I2C device tree stub [ controller @ offset 0x3100 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@3100 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <1>;
39 compatible = "fsl-i2c";
40 reg = <0x3100 0x100>;
41 interrupts = <43 2 0 0>;
42 dfsrr;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
deleted file mode 100644
index 1cf0b77b1ef..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35message@42400 {
36 compatible = "fsl,mpic-v3.1-msgr";
37 reg = <0x42400 0x200>;
38 interrupts = <
39 0xb4 2 0 0
40 0xb5 2 0 0
41 0xb6 2 0 0
42 0xb7 2 0 0>;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
deleted file mode 100644
index 8734cffae1a..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35timer@42100 {
36 compatible = "fsl,mpic-global-timer";
37 reg = <0x42100 0x100 0x42300 4>;
38 interrupts = <4 0 3 0
39 5 0 3 0
40 6 0 3 0
41 7 0 3 0>;
42};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
deleted file mode 100644
index 71c30eb1005..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mpic: pic@40000 {
36 interrupt-controller;
37 #address-cells = <0>;
38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic";
41 device_type = "open-pic";
42 big-endian;
43 single-cpu-affinity;
44 last-interrupt-source = <255>;
45};
46
47timer@41100 {
48 compatible = "fsl,mpic-global-timer";
49 reg = <0x41100 0x100 0x41300 4>;
50 interrupts = <0 0 3 0
51 1 0 3 0
52 2 0 3 0
53 3 0 3 0>;
54};
55
56message@41400 {
57 compatible = "fsl,mpic-v3.1-msgr";
58 reg = <0x41400 0x200>;
59 interrupts = <
60 0xb0 2 0 0
61 0xb1 2 0 0
62 0xb2 2 0 0
63 0xb3 2 0 0>;
64};
65
66msi@41600 {
67 compatible = "fsl,mpic-msi";
68 reg = <0x41600 0x80>;
69 msi-available-ranges = <0 0x100>;
70 interrupts = <
71 0xe0 0 0 0
72 0xe1 0 0 0
73 0xe2 0 0 0
74 0xe3 0 0 0
75 0xe4 0 0 0
76 0xe5 0 0 0
77 0xe6 0 0 0
78 0xe7 0 0 0>;
79};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
deleted file mode 100644
index 587ca9ffad7..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35rmu: rmu@d3000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,srio-rmu";
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
41
42 message-unit@0 {
43 compatible = "fsl,srio-msg-unit";
44 reg = <0x0 0x100>;
45 interrupts = <
46 53 2 0 0 /* msg1_tx_irq */
47 54 2 0 0>;/* msg1_rx_irq */
48 };
49 message-unit@100 {
50 compatible = "fsl,srio-msg-unit";
51 reg = <0x100 0x100>;
52 interrupts = <
53 55 2 0 0 /* msg2_tx_irq */
54 56 2 0 0>;/* msg2_rx_irq */
55 };
56 doorbell-unit@400 {
57 compatible = "fsl,srio-dbell-unit";
58 reg = <0x400 0x80>;
59 interrupts = <
60 49 2 0 0 /* bell_outb_irq */
61 50 2 0 0>;/* bell_inb_irq */
62 };
63 port-write-unit@4e0 {
64 compatible = "fsl,srio-port-write-unit";
65 reg = <0x4e0 0x20>;
66 interrupts = <48 2 0 0>;
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
deleted file mode 100644
index 3c28dd08d38..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@18000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x18000 0x1000>;
38 cell-index = <1>;
39 interrupts = <74 0x2 0 0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
deleted file mode 100644
index eefaf2855e3..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@19000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x19000 0x1000>;
38 cell-index = <2>;
39 interrupts = <41 0x2 0 0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
deleted file mode 100644
index 02a5c7ae72d..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec2.1", "fsl,sec2.0";
37 reg = <0x30000 0x10000>;
38 interrupts = <45 2 0 0>;
39 fsl,num-channels = <4>;
40 fsl,channel-fifo-len = <24>;
41 fsl,exec-units-mask = <0xfe>;
42 fsl,descriptor-types-mask = <0x12b0ebf>;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
deleted file mode 100644
index bba1ba44ccf..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0x9fe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
deleted file mode 100644
index 8f0a5669bee..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.1", "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0xbfe>;
44 fsl,descriptor-types-mask = <0x3ab0ebf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
deleted file mode 100644
index c227f2748a2..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
37 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
38 "fsl,sec2.0";
39 reg = <0x30000 0x10000>;
40 interrupts = <45 2 0 0 58 2 0 0>;
41 fsl,num-channels = <4>;
42 fsl,channel-fifo-len = <24>;
43 fsl,exec-units-mask = <0x97c>;
44 fsl,descriptor-types-mask = <0x3a30abf>;
45};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
deleted file mode 100644
index d4c9d5daab2..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto@30000 {
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x30000 0x10000>;
40 interrupts = <58 2 0 0>;
41
42 sec_jr0: jr@1000 {
43 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
44 reg = <0x1000 0x1000>;
45 interrupts = <45 2 0 0>;
46 };
47
48 sec_jr1: jr@2000 {
49 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
50 reg = <0x2000 0x1000>;
51 interrupts = <45 2 0 0>;
52 };
53
54 sec_jr2: jr@3000 {
55 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
56 reg = <0x3000 0x1000>;
57 interrupts = <45 2 0 0>;
58 };
59
60 sec_jr3: jr@4000 {
61 compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
62 reg = <0x4000 0x1000>;
63 interrupts = <45 2 0 0>;
64 };
65};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
deleted file mode 100644
index 185ab9dc3ec..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * PQ3 USB DR device tree stub [ controller @ offset 0x22000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@22000 {
36 compatible = "fsl-usb2-dr";
37 reg = <0x22000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <28 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
deleted file mode 100644
index fe24cd612ff..00000000000
--- a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * PQ3 USB DR device tree stub [ controller @ offset 0x23000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@23000 {
36 compatible = "fsl-usb2-dr";
37 reg = <0x23000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <46 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
deleted file mode 100644
index 1aebf3ea4ca..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma0: dma@100300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x100300 0x4>;
40 ranges = <0x0 0x100100 0x200>;
41 cell-index = <0>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <28 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <29 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <30 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <31 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
deleted file mode 100644
index ecf5e180fe7..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35dma1: dma@101300 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,eloplus-dma";
39 reg = <0x101300 0x4>;
40 ranges = <0x0 0x101100 0x200>;
41 cell-index = <1>;
42 dma-channel@0 {
43 compatible = "fsl,eloplus-dma-channel";
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <32 2 0 0>;
47 };
48 dma-channel@80 {
49 compatible = "fsl,eloplus-dma-channel";
50 reg = <0x80 0x80>;
51 cell-index = <1>;
52 interrupts = <33 2 0 0>;
53 };
54 dma-channel@100 {
55 compatible = "fsl,eloplus-dma-channel";
56 reg = <0x100 0x80>;
57 cell-index = <2>;
58 interrupts = <34 2 0 0>;
59 };
60 dma-channel@180 {
61 compatible = "fsl,eloplus-dma-channel";
62 reg = <0x180 0x80>;
63 cell-index = <3>;
64 interrupts = <35 2 0 0>;
65 };
66};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
deleted file mode 100644
index 225c07b4e8a..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * QorIQ DUART device tree stub [ controller @ offset 0x11c000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial0: serial@11c500 {
36 cell-index = <0>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x11c500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <36 2 0 0>;
42};
43
44serial1: serial@11c600 {
45 cell-index = <1>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x11c600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <36 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
deleted file mode 100644
index d23233a56b9..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * QorIQ DUART device tree stub [ controller @ offset 0x11d000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35serial2: serial@11d500 {
36 cell-index = <2>;
37 device_type = "serial";
38 compatible = "fsl,ns16550", "ns16550";
39 reg = <0x11d500 0x100>;
40 clock-frequency = <0>;
41 interrupts = <37 2 0 0>;
42};
43
44serial3: serial@11d600 {
45 cell-index = <3>;
46 device_type = "serial";
47 compatible = "fsl,ns16550", "ns16550";
48 reg = <0x11d600 0x100>;
49 clock-frequency = <0>;
50 interrupts = <37 2 0 0>;
51};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
deleted file mode 100644
index 20835ae216c..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sdhc: sdhc@114000 {
36 compatible = "fsl,esdhc";
37 reg = <0x114000 0x1000>;
38 interrupts = <48 2 0 0>;
39 clock-frequency = <0>;
40};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
deleted file mode 100644
index 6db06975e09..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35spi@110000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 compatible = "fsl,mpc8536-espi";
39 reg = <0x110000 0x1000>;
40 interrupts = <53 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
deleted file mode 100644
index cf714f5f68b..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * QorIQ GPIO device tree stub [ controller @ offset 0x130000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio0: gpio@130000 {
36 compatible = "fsl,qoriq-gpio";
37 reg = <0x130000 0x1000>;
38 interrupts = <55 2 0 0>;
39 #gpio-cells = <2>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
deleted file mode 100644
index 5f9bf7debe4..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * QorIQ I2C device tree stub [ controller @ offset 0x118000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@118000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <0>;
39 compatible = "fsl-i2c";
40 reg = <0x118000 0x100>;
41 interrupts = <38 2 0 0>;
42 dfsrr;
43};
44
45i2c@118100 {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cell-index = <1>;
49 compatible = "fsl-i2c";
50 reg = <0x118100 0x100>;
51 interrupts = <38 2 0 0>;
52 dfsrr;
53};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
deleted file mode 100644
index 7989bf5eeb5..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * QorIQ I2C device tree stub [ controller @ offset 0x119000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35i2c@119000 {
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <2>;
39 compatible = "fsl-i2c";
40 reg = <0x119000 0x100>;
41 interrupts = <39 2 0 0>;
42 dfsrr;
43};
44
45i2c@119100 {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cell-index = <3>;
49 compatible = "fsl-i2c";
50 reg = <0x119100 0x100>;
51 interrupts = <39 2 0 0>;
52 dfsrr;
53};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
deleted file mode 100644
index 08f42271f86..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35mpic: pic@40000 {
36 interrupt-controller;
37 #address-cells = <0>;
38 #interrupt-cells = <4>;
39 reg = <0x40000 0x40000>;
40 compatible = "fsl,mpic", "chrp,open-pic";
41 device_type = "open-pic";
42 clock-frequency = <0x0>;
43};
44
45timer@41100 {
46 compatible = "fsl,mpic-global-timer";
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
52};
53
54msi0: msi@41600 {
55 compatible = "fsl,mpic-msi";
56 reg = <0x41600 0x200 0x44140 4>;
57 msi-available-ranges = <0 0x100>;
58 interrupts = <
59 0xe0 0 0 0
60 0xe1 0 0 0
61 0xe2 0 0 0
62 0xe3 0 0 0
63 0xe4 0 0 0
64 0xe5 0 0 0
65 0xe6 0 0 0
66 0xe7 0 0 0>;
67};
68
69msi1: msi@41800 {
70 compatible = "fsl,mpic-msi";
71 reg = <0x41800 0x200 0x45140 4>;
72 msi-available-ranges = <0 0x100>;
73 interrupts = <
74 0xe8 0 0 0
75 0xe9 0 0 0
76 0xea 0 0 0
77 0xeb 0 0 0
78 0xec 0 0 0
79 0xed 0 0 0
80 0xee 0 0 0
81 0xef 0 0 0>;
82};
83
84msi2: msi@41a00 {
85 compatible = "fsl,mpic-msi";
86 reg = <0x41a00 0x200 0x46140 4>;
87 msi-available-ranges = <0 0x100>;
88 interrupts = <
89 0xf0 0 0 0
90 0xf1 0 0 0
91 0xf2 0 0 0
92 0xf3 0 0 0
93 0xf4 0 0 0
94 0xf5 0 0 0
95 0xf6 0 0 0
96 0xf7 0 0 0>;
97};
98
99timer@42100 {
100 compatible = "fsl,mpic-global-timer";
101 reg = <0x42100 0x100 0x42300 4>;
102 interrupts = <4 0 3 0
103 5 0 3 0
104 6 0 3 0
105 7 0 3 0>;
106};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi
deleted file mode 100644
index 8d2e8aa6cf8..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-raid1.0-0.dtsi
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * QorIQ RAID 1.0 device tree stub [ controller @ offset 0x320000 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35raideng: raideng@320000 {
36 compatible = "fsl,raideng-v1.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x320000 0x10000>;
40 ranges = <0 0x320000 0x10000>;
41
42 raideng_jq0@1000 {
43 compatible = "fsl,raideng-v1.0-job-queue";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 reg = <0x1000 0x1000>;
47 ranges = <0x0 0x1000 0x1000>;
48
49 raideng_jr0: jr@0 {
50 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
51 reg = <0x0 0x400>;
52 interrupts = <139 2 0 0>;
53 interrupt-parent = <&mpic>;
54 };
55
56 raideng_jr1: jr@400 {
57 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
58 reg = <0x400 0x400>;
59 interrupts = <140 2 0 0>;
60 interrupt-parent = <&mpic>;
61 };
62 };
63
64 raideng_jq1@2000 {
65 compatible = "fsl,raideng-v1.0-job-queue";
66 #address-cells = <1>;
67 #size-cells = <1>;
68 reg = <0x2000 0x1000>;
69 ranges = <0x0 0x2000 0x1000>;
70
71 raideng_jr2: jr@0 {
72 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
73 reg = <0x0 0x400>;
74 interrupts = <141 2 0 0>;
75 interrupt-parent = <&mpic>;
76 };
77
78 raideng_jr3: jr@400 {
79 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
80 reg = <0x400 0x400>;
81 interrupts = <142 2 0 0>;
82 interrupt-parent = <&mpic>;
83 };
84 };
85};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
deleted file mode 100644
index ca7fec792e5..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35rmu: rmu@d3000 {
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "fsl,srio-rmu";
39 reg = <0xd3000 0x500>;
40 ranges = <0x0 0xd3000 0x500>;
41
42 message-unit@0 {
43 compatible = "fsl,srio-msg-unit";
44 reg = <0x0 0x100>;
45 interrupts = <
46 60 2 0 0 /* msg1_tx_irq */
47 61 2 0 0>;/* msg1_rx_irq */
48 };
49 message-unit@100 {
50 compatible = "fsl,srio-msg-unit";
51 reg = <0x100 0x100>;
52 interrupts = <
53 62 2 0 0 /* msg2_tx_irq */
54 63 2 0 0>;/* msg2_rx_irq */
55 };
56 doorbell-unit@400 {
57 compatible = "fsl,srio-dbell-unit";
58 reg = <0x400 0x80>;
59 interrupts = <
60 56 2 0 0 /* bell_outb_irq */
61 57 2 0 0>;/* bell_inb_irq */
62 };
63 port-write-unit@4e0 {
64 compatible = "fsl,srio-port-write-unit";
65 reg = <0x4e0 0x20>;
66 interrupts = <16 2 1 11>;
67 };
68};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
deleted file mode 100644
index b642047fdec..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@220000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x220000 0x1000>;
38 interrupts = <68 0x2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
deleted file mode 100644
index c5737025975..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35sata@221000 {
36 compatible = "fsl,pq-sata-v2";
37 reg = <0x221000 0x1000>;
38 interrupts = <69 0x2 0 0>;
39};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
deleted file mode 100644
index 0cbbac32953..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.0-job-ring";
45 reg = <0x1000 0x1000>;
46 interrupts = <88 2 0 0>;
47 };
48
49 sec_jr1: jr@2000 {
50 compatible = "fsl,sec-v4.0-job-ring";
51 reg = <0x2000 0x1000>;
52 interrupts = <89 2 0 0>;
53 };
54
55 sec_jr2: jr@3000 {
56 compatible = "fsl,sec-v4.0-job-ring";
57 reg = <0x3000 0x1000>;
58 interrupts = <90 2 0 0>;
59 };
60
61 sec_jr3: jr@4000 {
62 compatible = "fsl,sec-v4.0-job-ring";
63 reg = <0x4000 0x1000>;
64 interrupts = <91 2 0 0>;
65 };
66
67 rtic@6000 {
68 compatible = "fsl,sec-v4.0-rtic";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 reg = <0x6000 0x100>;
72 ranges = <0x0 0x6100 0xe00>;
73
74 rtic_a: rtic-a@0 {
75 compatible = "fsl,sec-v4.0-rtic-memory";
76 reg = <0x00 0x20 0x100 0x80>;
77 };
78
79 rtic_b: rtic-b@20 {
80 compatible = "fsl,sec-v4.0-rtic-memory";
81 reg = <0x20 0x20 0x200 0x80>;
82 };
83
84 rtic_c: rtic-c@40 {
85 compatible = "fsl,sec-v4.0-rtic-memory";
86 reg = <0x40 0x20 0x300 0x80>;
87 };
88
89 rtic_d: rtic-d@60 {
90 compatible = "fsl,sec-v4.0-rtic-memory";
91 reg = <0x60 0x20 0x500 0x80>;
92 };
93 };
94};
95
96sec_mon: sec_mon@314000 {
97 compatible = "fsl,sec-v4.0-mon";
98 reg = <0x314000 0x1000>;
99 interrupts = <93 2 0 0>;
100};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
deleted file mode 100644
index 3308986bba0..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.1-job-ring",
45 "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
48 };
49
50 sec_jr1: jr@2000 {
51 compatible = "fsl,sec-v4.1-job-ring",
52 "fsl,sec-v4.0-job-ring";
53 reg = <0x2000 0x1000>;
54 interrupts = <89 2 0 0>;
55 };
56
57 sec_jr2: jr@3000 {
58 compatible = "fsl,sec-v4.1-job-ring",
59 "fsl,sec-v4.0-job-ring";
60 reg = <0x3000 0x1000>;
61 interrupts = <90 2 0 0>;
62 };
63
64 sec_jr3: jr@4000 {
65 compatible = "fsl,sec-v4.1-job-ring",
66 "fsl,sec-v4.0-job-ring";
67 reg = <0x4000 0x1000>;
68 interrupts = <91 2 0 0>;
69 };
70
71 rtic@6000 {
72 compatible = "fsl,sec-v4.1-rtic",
73 "fsl,sec-v4.0-rtic";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 reg = <0x6000 0x100>;
77 ranges = <0x0 0x6100 0xe00>;
78
79 rtic_a: rtic-a@0 {
80 compatible = "fsl,sec-v4.1-rtic-memory",
81 "fsl,sec-v4.0-rtic-memory";
82 reg = <0x00 0x20 0x100 0x80>;
83 };
84
85 rtic_b: rtic-b@20 {
86 compatible = "fsl,sec-v4.1-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x20 0x20 0x200 0x80>;
89 };
90
91 rtic_c: rtic-c@40 {
92 compatible = "fsl,sec-v4.1-rtic-memory",
93 "fsl,sec-v4.0-rtic-memory";
94 reg = <0x40 0x20 0x300 0x80>;
95 };
96
97 rtic_d: rtic-d@60 {
98 compatible = "fsl,sec-v4.1-rtic-memory",
99 "fsl,sec-v4.0-rtic-memory";
100 reg = <0x60 0x20 0x500 0x80>;
101 };
102 };
103};
104
105sec_mon: sec_mon@314000 {
106 compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
107 reg = <0x314000 0x1000>;
108 interrupts = <93 2 0 0>;
109};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
deleted file mode 100644
index 7990e0d3d6f..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.2-job-ring",
45 "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>;
48 };
49
50 sec_jr1: jr@2000 {
51 compatible = "fsl,sec-v4.2-job-ring",
52 "fsl,sec-v4.0-job-ring";
53 reg = <0x2000 0x1000>;
54 interrupts = <89 2 0 0>;
55 };
56
57 sec_jr2: jr@3000 {
58 compatible = "fsl,sec-v4.2-job-ring",
59 "fsl,sec-v4.0-job-ring";
60 reg = <0x3000 0x1000>;
61 interrupts = <90 2 0 0>;
62 };
63
64 sec_jr3: jr@4000 {
65 compatible = "fsl,sec-v4.2-job-ring",
66 "fsl,sec-v4.0-job-ring";
67 reg = <0x4000 0x1000>;
68 interrupts = <91 2 0 0>;
69 };
70
71 rtic@6000 {
72 compatible = "fsl,sec-v4.2-rtic",
73 "fsl,sec-v4.0-rtic";
74 #address-cells = <1>;
75 #size-cells = <1>;
76 reg = <0x6000 0x100>;
77 ranges = <0x0 0x6100 0xe00>;
78
79 rtic_a: rtic-a@0 {
80 compatible = "fsl,sec-v4.2-rtic-memory",
81 "fsl,sec-v4.0-rtic-memory";
82 reg = <0x00 0x20 0x100 0x80>;
83 };
84
85 rtic_b: rtic-b@20 {
86 compatible = "fsl,sec-v4.2-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x20 0x20 0x200 0x80>;
89 };
90
91 rtic_c: rtic-c@40 {
92 compatible = "fsl,sec-v4.2-rtic-memory",
93 "fsl,sec-v4.0-rtic-memory";
94 reg = <0x40 0x20 0x300 0x80>;
95 };
96
97 rtic_d: rtic-d@60 {
98 compatible = "fsl,sec-v4.2-rtic-memory",
99 "fsl,sec-v4.0-rtic-memory";
100 reg = <0x60 0x20 0x500 0x80>;
101 };
102 };
103};
104
105sec_mon: sec_mon@314000 {
106 compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
107 reg = <0x314000 0x1000>;
108 interrupts = <93 2 0 0>;
109};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
deleted file mode 100644
index 7b2ab8a8c1f..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x300000 0x10000>;
40 ranges = <0 0x300000 0x10000>;
41 interrupts = <92 2 0 0>;
42
43 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v5.2-job-ring",
45 "fsl,sec-v5.0-job-ring",
46 "fsl,sec-v4.0-job-ring";
47 reg = <0x1000 0x1000>;
48 interrupts = <88 2 0 0>;
49 };
50
51 sec_jr1: jr@2000 {
52 compatible = "fsl,sec-v5.2-job-ring",
53 "fsl,sec-v5.0-job-ring",
54 "fsl,sec-v4.0-job-ring";
55 reg = <0x2000 0x1000>;
56 interrupts = <89 2 0 0>;
57 };
58
59 sec_jr2: jr@3000 {
60 compatible = "fsl,sec-v5.2-job-ring",
61 "fsl,sec-v5.0-job-ring",
62 "fsl,sec-v4.0-job-ring";
63 reg = <0x3000 0x1000>;
64 interrupts = <90 2 0 0>;
65 };
66
67 sec_jr3: jr@4000 {
68 compatible = "fsl,sec-v5.2-job-ring",
69 "fsl,sec-v5.0-job-ring",
70 "fsl,sec-v4.0-job-ring";
71 reg = <0x4000 0x1000>;
72 interrupts = <91 2 0 0>;
73 };
74
75 rtic@6000 {
76 compatible = "fsl,sec-v5.2-rtic",
77 "fsl,sec-v5.0-rtic",
78 "fsl,sec-v4.0-rtic";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 reg = <0x6000 0x100>;
82 ranges = <0x0 0x6100 0xe00>;
83
84 rtic_a: rtic-a@0 {
85 compatible = "fsl,sec-v5.2-rtic-memory",
86 "fsl,sec-v5.0-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x00 0x20 0x100 0x80>;
89 };
90
91 rtic_b: rtic-b@20 {
92 compatible = "fsl,sec-v5.2-rtic-memory",
93 "fsl,sec-v5.0-rtic-memory",
94 "fsl,sec-v4.0-rtic-memory";
95 reg = <0x20 0x20 0x200 0x80>;
96 };
97
98 rtic_c: rtic-c@40 {
99 compatible = "fsl,sec-v5.2-rtic-memory",
100 "fsl,sec-v5.0-rtic-memory",
101 "fsl,sec-v4.0-rtic-memory";
102 reg = <0x40 0x20 0x300 0x80>;
103 };
104
105 rtic_d: rtic-d@60 {
106 compatible = "fsl,sec-v5.2-rtic-memory",
107 "fsl,sec-v5.0-rtic-memory",
108 "fsl,sec-v4.0-rtic-memory";
109 reg = <0x60 0x20 0x500 0x80>;
110 };
111 };
112};
113
114sec_mon: sec_mon@314000 {
115 compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
116 reg = <0x314000 0x1000>;
117 interrupts = <93 2 0 0>;
118};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
deleted file mode 100644
index 4dd6f84c239..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * QorIQ USB DR device tree stub [ controller @ offset 0x211000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@211000 {
36 compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
37 reg = <0x211000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <45 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
deleted file mode 100644
index f053835aa1c..00000000000
--- a/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * QorIQ USB Host device tree stub [ controller @ offset 0x210000 ]
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@210000 {
36 compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
37 reg = <0x210000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <44 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts b/arch/powerpc/boot/dts/ge_imp3a.dts
deleted file mode 100644
index fefae416a09..00000000000
--- a/arch/powerpc/boot/dts/ge_imp3a.dts
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * GE IMP3A Device Tree Source
3 *
4 * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: P2020 DS Device Tree Source
12 * Copyright 2009 Freescale Semiconductor Inc.
13 */
14
15/include/ "fsl/p2020si-pre.dtsi"
16
17/ {
18 model = "GE_IMP3A";
19 compatible = "ge,imp3a";
20
21 memory {
22 device_type = "memory";
23 };
24
25 lbc: localbus@fef05000 {
26 reg = <0 0xfef05000 0 0x1000>;
27
28 ranges = <0x0 0x0 0x0 0xff000000 0x01000000
29 0x1 0x0 0x0 0xe0000000 0x08000000
30 0x2 0x0 0x0 0xe8000000 0x08000000
31 0x3 0x0 0x0 0xfc100000 0x00020000
32 0x4 0x0 0x0 0xfc000000 0x00008000
33 0x5 0x0 0x0 0xfc008000 0x00008000
34 0x6 0x0 0x0 0xfee00000 0x00040000
35 0x7 0x0 0x0 0xfee80000 0x00040000>;
36
37 /* nor@0,0 is a mirror of part of the memory in nor@1,0
38 nor@0,0 {
39 #address-cells = <1>;
40 #size-cells = <1>;
41 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
42 reg = <0x0 0x0 0x1000000>;
43 bank-width = <2>;
44 device-width = <1>;
45
46 partition@0 {
47 label = "firmware";
48 reg = <0x0 0x1000000>;
49 read-only;
50 };
51 };
52 */
53
54 nor@1,0 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "ge,imp3a-paged-flash", "cfi-flash";
58 reg = <0x1 0x0 0x8000000>;
59 bank-width = <2>;
60 device-width = <1>;
61
62 partition@0 {
63 label = "user";
64 reg = <0x0 0x7800000>;
65 };
66
67 partition@7800000 {
68 label = "firmware";
69 reg = <0x7800000 0x800000>;
70 read-only;
71 };
72 };
73
74 nvram@3,0 {
75 device_type = "nvram";
76 compatible = "simtek,stk14ca8";
77 reg = <0x3 0x0 0x20000>;
78 };
79
80 fpga@4,0 {
81 compatible = "ge,imp3a-fpga-regs";
82 reg = <0x4 0x0 0x20>;
83 };
84
85 gef_pic: pic@4,20 {
86 #interrupt-cells = <1>;
87 interrupt-controller;
88 device_type = "interrupt-controller";
89 compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
90 reg = <0x4 0x20 0x20>;
91 interrupts = <6 7 0 0>;
92 };
93
94 gef_gpio: gpio@4,400 {
95 #gpio-cells = <2>;
96 compatible = "ge,imp3a-gpio";
97 reg = <0x4 0x400 0x24>;
98 gpio-controller;
99 };
100
101 wdt@4,800 {
102 compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
103 "gef,fpga-wdt";
104 reg = <0x4 0x800 0x8>;
105 interrupts = <10 4>;
106 interrupt-parent = <&gef_pic>;
107 };
108
109 /* Second watchdog available, driver currently supports one.
110 wdt@4,808 {
111 compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
112 "gef,fpga-wdt";
113 reg = <0x4 0x808 0x8>;
114 interrupts = <9 4>;
115 interrupt-parent = <&gef_pic>;
116 };
117 */
118
119 nand@6,0 {
120 compatible = "fsl,elbc-fcm-nand";
121 reg = <0x6 0x0 0x40000>;
122 };
123
124 nand@7,0 {
125 compatible = "fsl,elbc-fcm-nand";
126 reg = <0x7 0x0 0x40000>;
127 };
128 };
129
130 soc: soc@fef00000 {
131 ranges = <0x0 0 0xfef00000 0x100000>;
132
133 i2c@3000 {
134 hwmon@48 {
135 compatible = "national,lm92";
136 reg = <0x48>;
137 };
138
139 hwmon@4c {
140 compatible = "adi,adt7461";
141 reg = <0x4c>;
142 };
143
144 rtc@51 {
145 compatible = "epson,rx8581";
146 reg = <0x51>;
147 };
148
149 eti@6b {
150 compatible = "dallas,ds1682";
151 reg = <0x6b>;
152 };
153 };
154
155 usb@22000 {
156 phy_type = "ulpi";
157 dr_mode = "host";
158 };
159
160 mdio@24520 {
161 phy0: ethernet-phy@0 {
162 interrupt-parent = <&gef_pic>;
163 interrupts = <0xc 0x4>;
164 reg = <0x1>;
165 };
166 phy1: ethernet-phy@1 {
167 interrupt-parent = <&gef_pic>;
168 interrupts = <0xb 0x4>;
169 reg = <0x2>;
170 };
171 tbi0: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 mdio@25520 {
178 tbi1: tbi-phy@11 {
179 reg = <0x11>;
180 device_type = "tbi-phy";
181 };
182 };
183
184 mdio@26520 {
185 status = "disabled";
186 };
187
188 enet0: ethernet@24000 {
189 tbi-handle = <&tbi0>;
190 phy-handle = <&phy0>;
191 phy-connection-type = "gmii";
192 };
193
194 enet1: ethernet@25000 {
195 tbi-handle = <&tbi1>;
196 phy-handle = <&phy1>;
197 phy-connection-type = "gmii";
198 };
199
200 enet2: ethernet@26000 {
201 status = "disabled";
202 };
203 };
204
205 pci0: pcie@fef08000 {
206 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
207 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>;
208 reg = <0 0xfef08000 0 0x1000>;
209
210 pcie@0 {
211 ranges = <0x2000000 0x0 0xc0000000
212 0x2000000 0x0 0xc0000000
213 0x0 0x20000000
214
215 0x1000000 0x0 0x0
216 0x1000000 0x0 0x0
217 0x0 0x10000>;
218 };
219 };
220
221 pci1: pcie@fef09000 {
222 reg = <0 0xfef09000 0 0x1000>;
223 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
224 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>;
225
226 pcie@0 {
227 ranges = <0x2000000 0x0 0xa0000000
228 0x2000000 0x0 0xa0000000
229 0x0 0x20000000
230
231 0x1000000 0x0 0x0
232 0x1000000 0x0 0x0
233 0x0 0x10000>;
234 };
235
236 };
237
238 pci2: pcie@fef0a000 {
239 reg = <0 0xfef0a000 0 0x1000>;
240 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
241 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>;
242
243 pcie@0 {
244 ranges = <0x2000000 0x0 0x80000000
245 0x2000000 0x0 0x80000000
246 0x0 0x20000000
247
248 0x1000000 0x0 0x0
249 0x1000000 0x0 0x0
250 0x0 0x10000>;
251 };
252 };
253};
254
255/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 38dcb96c8e2..83f4b79dff8 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -269,16 +269,14 @@
269 enet0: ethernet@24000 { 269 enet0: ethernet@24000 {
270 #address-cells = <1>; 270 #address-cells = <1>;
271 #size-cells = <1>; 271 #size-cells = <1>;
272 cell-index = <0>;
273 device_type = "network"; 272 device_type = "network";
274 model = "TSEC"; 273 model = "eTSEC";
275 compatible = "gianfar"; 274 compatible = "gianfar";
276 reg = <0x24000 0x1000>; 275 reg = <0x24000 0x1000>;
277 ranges = <0x0 0x24000 0x1000>; 276 ranges = <0x0 0x24000 0x1000>;
278 local-mac-address = [ 00 00 00 00 00 00 ]; 277 local-mac-address = [ 00 00 00 00 00 00 ];
279 interrupts = <29 2 30 2 34 2>; 278 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
280 interrupt-parent = <&mpic>; 279 interrupt-parent = <&mpic>;
281 tbi-handle = <&tbi0>;
282 phy-handle = <&phy0>; 280 phy-handle = <&phy0>;
283 phy-connection-type = "gmii"; 281 phy-connection-type = "gmii";
284 282
@@ -292,54 +290,31 @@
292 interrupt-parent = <&gef_pic>; 290 interrupt-parent = <&gef_pic>;
293 interrupts = <0x9 0x4>; 291 interrupts = <0x9 0x4>;
294 reg = <1>; 292 reg = <1>;
295 device_type = "ethernet-phy";
296 }; 293 };
297 phy2: ethernet-phy@2 { 294 phy2: ethernet-phy@2 {
298 interrupt-parent = <&gef_pic>; 295 interrupt-parent = <&gef_pic>;
299 interrupts = <0x8 0x4>; 296 interrupts = <0x8 0x4>;
300 reg = <3>; 297 reg = <3>;
301 device_type = "ethernet-phy";
302 };
303 tbi0: tbi-phy@11 {
304 reg = <0x11>;
305 device_type = "tbi-phy";
306 }; 298 };
307 }; 299 };
308 }; 300 };
309 301
310 enet1: ethernet@26000 { 302 enet1: ethernet@26000 {
311 #address-cells = <1>;
312 #size-cells = <1>;
313 cell-index = <2>;
314 device_type = "network"; 303 device_type = "network";
315 model = "TSEC"; 304 model = "eTSEC";
316 compatible = "gianfar"; 305 compatible = "gianfar";
317 reg = <0x26000 0x1000>; 306 reg = <0x26000 0x1000>;
318 ranges = <0x0 0x26000 0x1000>;
319 local-mac-address = [ 00 00 00 00 00 00 ]; 307 local-mac-address = [ 00 00 00 00 00 00 ];
320 interrupts = <31 2 32 2 33 2>; 308 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
321 interrupt-parent = <&mpic>; 309 interrupt-parent = <&mpic>;
322 tbi-handle = <&tbi2>;
323 phy-handle = <&phy2>; 310 phy-handle = <&phy2>;
324 phy-connection-type = "gmii"; 311 phy-connection-type = "gmii";
325
326 mdio@520 {
327 #address-cells = <1>;
328 #size-cells = <0>;
329 compatible = "fsl,gianfar-tbi";
330 reg = <0x520 0x20>;
331
332 tbi2: tbi-phy@11 {
333 reg = <0x11>;
334 device_type = "tbi-phy";
335 };
336 };
337 }; 312 };
338 313
339 serial0: serial@4500 { 314 serial0: serial@4500 {
340 cell-index = <0>; 315 cell-index = <0>;
341 device_type = "serial"; 316 device_type = "serial";
342 compatible = "fsl,ns16550", "ns16550"; 317 compatible = "ns16550";
343 reg = <0x4500 0x100>; 318 reg = <0x4500 0x100>;
344 clock-frequency = <0>; 319 clock-frequency = <0>;
345 interrupts = <0x2a 0x2>; 320 interrupts = <0x2a 0x2>;
@@ -349,7 +324,7 @@
349 serial1: serial@4600 { 324 serial1: serial@4600 {
350 cell-index = <1>; 325 cell-index = <1>;
351 device_type = "serial"; 326 device_type = "serial";
352 compatible = "fsl,ns16550", "ns16550"; 327 compatible = "ns16550";
353 reg = <0x4600 0x100>; 328 reg = <0x4600 0x100>;
354 clock-frequency = <0>; 329 clock-frequency = <0>;
355 interrupts = <0x1c 0x2>; 330 interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 5ab8932d09b..fc3a331dd39 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -267,16 +267,14 @@
267 enet0: ethernet@24000 { 267 enet0: ethernet@24000 {
268 #address-cells = <1>; 268 #address-cells = <1>;
269 #size-cells = <1>; 269 #size-cells = <1>;
270 cell-index = <0>;
271 device_type = "network"; 270 device_type = "network";
272 model = "TSEC"; 271 model = "eTSEC";
273 compatible = "gianfar"; 272 compatible = "gianfar";
274 reg = <0x24000 0x1000>; 273 reg = <0x24000 0x1000>;
275 ranges = <0x0 0x24000 0x1000>; 274 ranges = <0x0 0x24000 0x1000>;
276 local-mac-address = [ 00 00 00 00 00 00 ]; 275 local-mac-address = [ 00 00 00 00 00 00 ];
277 interrupts = <29 2 30 2 34 2>; 276 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
278 interrupt-parent = <&mpic>; 277 interrupt-parent = <&mpic>;
279 tbi-handle = <&tbi0>;
280 phy-handle = <&phy0>; 278 phy-handle = <&phy0>;
281 phy-connection-type = "gmii"; 279 phy-connection-type = "gmii";
282 280
@@ -290,54 +288,31 @@
290 interrupt-parent = <&gef_pic>; 288 interrupt-parent = <&gef_pic>;
291 interrupts = <0x9 0x4>; 289 interrupts = <0x9 0x4>;
292 reg = <1>; 290 reg = <1>;
293 device_type = "ethernet-phy";
294 }; 291 };
295 phy2: ethernet-phy@2 { 292 phy2: ethernet-phy@2 {
296 interrupt-parent = <&gef_pic>; 293 interrupt-parent = <&gef_pic>;
297 interrupts = <0x8 0x4>; 294 interrupts = <0x8 0x4>;
298 reg = <3>; 295 reg = <3>;
299 device_type = "ethernet-phy";
300 };
301 tbi0: tbi-phy@11 {
302 reg = <0x11>;
303 device_type = "tbi-phy";
304 }; 296 };
305 }; 297 };
306 }; 298 };
307 299
308 enet1: ethernet@26000 { 300 enet1: ethernet@26000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
311 cell-index = <2>;
312 device_type = "network"; 301 device_type = "network";
313 model = "TSEC"; 302 model = "eTSEC";
314 compatible = "gianfar"; 303 compatible = "gianfar";
315 reg = <0x26000 0x1000>; 304 reg = <0x26000 0x1000>;
316 ranges = <0x0 0x26000 0x1000>;
317 local-mac-address = [ 00 00 00 00 00 00 ]; 305 local-mac-address = [ 00 00 00 00 00 00 ];
318 interrupts = <31 2 32 2 33 2>; 306 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
319 interrupt-parent = <&mpic>; 307 interrupt-parent = <&mpic>;
320 tbi-handle = <&tbi2>;
321 phy-handle = <&phy2>; 308 phy-handle = <&phy2>;
322 phy-connection-type = "gmii"; 309 phy-connection-type = "gmii";
323
324 mdio@520 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "fsl,gianfar-tbi";
328 reg = <0x520 0x20>;
329
330 tbi2: tbi-phy@11 {
331 reg = <0x11>;
332 device_type = "tbi-phy";
333 };
334 };
335 }; 310 };
336 311
337 serial0: serial@4500 { 312 serial0: serial@4500 {
338 cell-index = <0>; 313 cell-index = <0>;
339 device_type = "serial"; 314 device_type = "serial";
340 compatible = "fsl,ns16550", "ns16550"; 315 compatible = "ns16550";
341 reg = <0x4500 0x100>; 316 reg = <0x4500 0x100>;
342 clock-frequency = <0>; 317 clock-frequency = <0>;
343 interrupts = <0x2a 0x2>; 318 interrupts = <0x2a 0x2>;
@@ -347,7 +322,7 @@
347 serial1: serial@4600 { 322 serial1: serial@4600 {
348 cell-index = <1>; 323 cell-index = <1>;
349 device_type = "serial"; 324 device_type = "serial";
350 compatible = "fsl,ns16550", "ns16550"; 325 compatible = "ns16550";
351 reg = <0x4600 0x100>; 326 reg = <0x4600 0x100>;
352 clock-frequency = <0>; 327 clock-frequency = <0>;
353 interrupts = <0x1c 0x2>; 328 interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index d5341f5741a..c0671cc9812 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -267,16 +267,14 @@
267 enet0: ethernet@24000 { 267 enet0: ethernet@24000 {
268 #address-cells = <1>; 268 #address-cells = <1>;
269 #size-cells = <1>; 269 #size-cells = <1>;
270 cell-index = <0>;
271 device_type = "network"; 270 device_type = "network";
272 model = "TSEC"; 271 model = "eTSEC";
273 compatible = "gianfar"; 272 compatible = "gianfar";
274 reg = <0x24000 0x1000>; 273 reg = <0x24000 0x1000>;
275 ranges = <0x0 0x24000 0x1000>; 274 ranges = <0x0 0x24000 0x1000>;
276 local-mac-address = [ 00 00 00 00 00 00 ]; 275 local-mac-address = [ 00 00 00 00 00 00 ];
277 interrupts = <29 2 30 2 34 2>; 276 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
278 interrupt-parent = <&mpic>; 277 interrupt-parent = <&mpic>;
279 tbi-handle = <&tbi0>;
280 phy-handle = <&phy0>; 278 phy-handle = <&phy0>;
281 phy-connection-type = "gmii"; 279 phy-connection-type = "gmii";
282 280
@@ -290,54 +288,31 @@
290 interrupt-parent = <&gef_pic>; 288 interrupt-parent = <&gef_pic>;
291 interrupts = <0x9 0x4>; 289 interrupts = <0x9 0x4>;
292 reg = <1>; 290 reg = <1>;
293 device_type = "ethernet-phy";
294 }; 291 };
295 phy2: ethernet-phy@2 { 292 phy2: ethernet-phy@2 {
296 interrupt-parent = <&gef_pic>; 293 interrupt-parent = <&gef_pic>;
297 interrupts = <0x8 0x4>; 294 interrupts = <0x8 0x4>;
298 reg = <3>; 295 reg = <3>;
299 device_type = "ethernet-phy";
300 };
301 tbi0: tbi-phy@11 {
302 reg = <0x11>;
303 device_type = "tbi-phy";
304 }; 296 };
305 }; 297 };
306 }; 298 };
307 299
308 enet1: ethernet@26000 { 300 enet1: ethernet@26000 {
309 #address-cells = <1>;
310 #size-cells = <1>;
311 cell-index = <2>;
312 device_type = "network"; 301 device_type = "network";
313 model = "TSEC"; 302 model = "eTSEC";
314 compatible = "gianfar"; 303 compatible = "gianfar";
315 reg = <0x26000 0x1000>; 304 reg = <0x26000 0x1000>;
316 ranges = <0x0 0x26000 0x1000>;
317 local-mac-address = [ 00 00 00 00 00 00 ]; 305 local-mac-address = [ 00 00 00 00 00 00 ];
318 interrupts = <31 2 32 2 33 2>; 306 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
319 interrupt-parent = <&mpic>; 307 interrupt-parent = <&mpic>;
320 tbi-handle = <&tbi2>;
321 phy-handle = <&phy2>; 308 phy-handle = <&phy2>;
322 phy-connection-type = "gmii"; 309 phy-connection-type = "gmii";
323
324 mdio@520 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327 compatible = "fsl,gianfar-tbi";
328 reg = <0x520 0x20>;
329
330 tbi2: tbi-phy@11 {
331 reg = <0x11>;
332 device_type = "tbi-phy";
333 };
334 };
335 }; 310 };
336 311
337 serial0: serial@4500 { 312 serial0: serial@4500 {
338 cell-index = <0>; 313 cell-index = <0>;
339 device_type = "serial"; 314 device_type = "serial";
340 compatible = "fsl,ns16550", "ns16550"; 315 compatible = "ns16550";
341 reg = <0x4500 0x100>; 316 reg = <0x4500 0x100>;
342 clock-frequency = <0>; 317 clock-frequency = <0>;
343 interrupts = <0x2a 0x2>; 318 interrupts = <0x2a 0x2>;
@@ -347,7 +322,7 @@
347 serial1: serial@4600 { 322 serial1: serial@4600 {
348 cell-index = <1>; 323 cell-index = <1>;
349 device_type = "serial"; 324 device_type = "serial";
350 compatible = "fsl,ns16550", "ns16550"; 325 compatible = "ns16550";
351 reg = <0x4600 0x100>; 326 reg = <0x4600 0x100>;
352 clock-frequency = <0>; 327 clock-frequency = <0>;
353 interrupts = <0x1c 0x2>; 328 interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/klondike.dts b/arch/powerpc/boot/dts/klondike.dts
deleted file mode 100644
index 8c942903361..00000000000
--- a/arch/powerpc/boot/dts/klondike.dts
+++ /dev/null
@@ -1,227 +0,0 @@
1/*
2 * Device Tree for Klondike (APM8018X) board.
3 *
4 * Copyright (c) 2010, Applied Micro Circuits Corporation
5 * Author: Tanmay Inamdar <tinamdar@apm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 *
22 */
23
24/dts-v1/;
25
26/ {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 model = "apm,klondike";
30 compatible = "apm,klondike";
31 dcr-parent = <&{/cpus/cpu@0}>;
32
33 aliases {
34 ethernet0 = &EMAC0;
35 ethernet1 = &EMAC1;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 cpu@0 {
43 device_type = "cpu";
44 model = "PowerPC,apm8018x";
45 reg = <0x00000000>;
46 clock-frequency = <300000000>; /* Filled in by U-Boot */
47 timebase-frequency = <300000000>; /* Filled in by U-Boot */
48 i-cache-line-size = <32>;
49 d-cache-line-size = <32>;
50 i-cache-size = <16384>; /* 16 kB */
51 d-cache-size = <16384>; /* 16 kB */
52 dcr-controller;
53 dcr-access-method = "native";
54 };
55 };
56
57 memory {
58 device_type = "memory";
59 reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
60 };
61
62 UIC0: interrupt-controller {
63 compatible = "ibm,uic";
64 interrupt-controller;
65 cell-index = <0>;
66 dcr-reg = <0x0c0 0x010>;
67 #address-cells = <0>;
68 #size-cells = <0>;
69 #interrupt-cells = <2>;
70 };
71
72 UIC1: interrupt-controller1 {
73 compatible = "ibm,uic";
74 interrupt-controller;
75 cell-index = <1>;
76 dcr-reg = <0x0d0 0x010>;
77 #address-cells = <0>;
78 #size-cells = <0>;
79 #interrupt-cells = <2>;
80 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
81 interrupt-parent = <&UIC0>;
82 };
83
84 UIC2: interrupt-controller2 {
85 compatible = "ibm,uic";
86 interrupt-controller;
87 cell-index = <2>;
88 dcr-reg = <0x0e0 0x010>;
89 #address-cells = <0>;
90 #size-cells = <0>;
91 #interrupt-cells = <2>;
92 interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
93 interrupt-parent = <&UIC0>;
94 };
95
96 UIC3: interrupt-controller3 {
97 compatible = "ibm,uic";
98 interrupt-controller;
99 cell-index = <3>;
100 dcr-reg = <0x0f0 0x010>;
101 #address-cells = <0>;
102 #size-cells = <0>;
103 #interrupt-cells = <2>;
104 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
105 interrupt-parent = <&UIC0>;
106 };
107
108 plb {
109 compatible = "ibm,plb4";
110 #address-cells = <1>;
111 #size-cells = <1>;
112 ranges;
113 clock-frequency = <0>; /* Filled in by U-Boot */
114
115 SDRAM0: memory-controller {
116 compatible = "ibm,sdram-apm8018x";
117 dcr-reg = <0x010 0x002>;
118 };
119
120 MAL0: mcmal {
121 compatible = "ibm,mcmal2";
122 dcr-reg = <0x180 0x062>;
123 num-tx-chans = <2>;
124 num-rx-chans = <16>;
125 #address-cells = <0>;
126 #size-cells = <0>;
127 interrupt-parent = <&UIC1>;
128 interrupts = </*TXEOB*/ 0x6 0x4
129 /*RXEOB*/ 0x7 0x4
130 /*SERR*/ 0x1 0x4
131 /*TXDE*/ 0x2 0x4
132 /*RXDE*/ 0x3 0x4>;
133 };
134
135 POB0: opb {
136 compatible = "ibm,opb";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 ranges = <0x20000000 0x20000000 0x30000000
140 0x50000000 0x50000000 0x10000000
141 0x60000000 0x60000000 0x10000000
142 0xFE000000 0xFE000000 0x00010000>;
143 dcr-reg = <0x100 0x020>;
144 clock-frequency = <300000000>; /* Filled in by U-Boot */
145
146 RGMII0: emac-rgmii@400a2000 {
147 compatible = "ibm,rgmii";
148 reg = <0x400a2000 0x00000010>;
149 has-mdio;
150 };
151
152 TAH0: emac-tah@400a3000 {
153 compatible = "ibm,tah";
154 reg = <0x400a3000 0x100>;
155 };
156
157 TAH1: emac-tah@400a4000 {
158 compatible = "ibm,tah";
159 reg = <0x400a4000 0x100>;
160 };
161
162 EMAC0: ethernet@400a0000 {
163 compatible = "ibm,emac4", "ibm-emac4sync";
164 interrupt-parent = <&EMAC0>;
165 interrupts = <0x0>;
166 #interrupt-cells = <1>;
167 #address-cells = <0>;
168 #size-cells = <0>;
169 interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
170 reg = <0x400a0000 0x00000100>;
171 local-mac-address = [000000000000]; /* Filled in by U-Boot */
172 mal-device = <&MAL0>;
173 mal-tx-channel = <0x0>;
174 mal-rx-channel = <0x0>;
175 cell-index = <0>;
176 max-frame-size = <9000>;
177 rx-fifo-size = <4096>;
178 tx-fifo-size = <2048>;
179 phy-mode = "rgmii";
180 phy-address = <0x2>;
181 turbo = "no";
182 phy-map = <0x00000000>;
183 rgmii-device = <&RGMII0>;
184 rgmii-channel = <0>;
185 tah-device = <&TAH0>;
186 tah-channel = <0>;
187 has-inverted-stacr-oc;
188 has-new-stacr-staopc;
189 };
190
191 EMAC1: ethernet@400a1000 {
192 compatible = "ibm,emac4", "ibm-emac4sync";
193 status = "disabled";
194 interrupt-parent = <&EMAC1>;
195 interrupts = <0x0>;
196 #interrupt-cells = <1>;
197 #address-cells = <0>;
198 #size-cells = <0>;
199 interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
200 reg = <0x400a1000 0x00000100>;
201 local-mac-address = [000000000000]; /* Filled in by U-Boot */
202 mal-device = <&MAL0>;
203 mal-tx-channel = <1>;
204 mal-rx-channel = <8>;
205 cell-index = <1>;
206 max-frame-size = <9000>;
207 rx-fifo-size = <4096>;
208 tx-fifo-size = <2048>;
209 phy-mode = "rgmii";
210 phy-address = <0x3>;
211 turbo = "no";
212 phy-map = <0x00000000>;
213 rgmii-device = <&RGMII0>;
214 rgmii-channel = <1>;
215 tah-device = <&TAH1>;
216 tah-channel = <0>;
217 has-inverted-stacr-oc;
218 has-new-stacr-staopc;
219 mdio-device = <&EMAC0>;
220 };
221 };
222 };
223
224 chosen {
225 linux,stdout-path = "/plb/opb/serial@50001000";
226 };
227};
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index 983aee18579..d16bae1230f 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -80,7 +80,7 @@
80 serial0: serial@4500 { 80 serial0: serial@4500 {
81 cell-index = <0>; 81 cell-index = <0>;
82 device_type = "serial"; 82 device_type = "serial";
83 compatible = "fsl,ns16550", "ns16550"; 83 compatible = "ns16550";
84 reg = <0x4500 0x100>; 84 reg = <0x4500 0x100>;
85 clock-frequency = <264000000>; 85 clock-frequency = <264000000>;
86 interrupts = <9 0x8>; 86 interrupts = <9 0x8>;
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 296c572ea60..bdb7fc0fa33 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -306,7 +306,7 @@
306 localbus@fdf05000 { 306 localbus@fdf05000 {
307 #address-cells = <2>; 307 #address-cells = <2>;
308 #size-cells = <1>; 308 #size-cells = <1>;
309 compatible = "fsl,mpc8560-localbus", "simple-bus"; 309 compatible = "fsl,mpc8560-localbus";
310 reg = <0xfdf05000 0x68>; 310 reg = <0xfdf05000 0x68>;
311 311
312 ranges = <0x0 0x0 0xe0000000 0x00800000 312 ranges = <0x0 0x0 0xe0000000 0x00800000
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 0a4545159e8..8d725d10882 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -84,7 +84,7 @@ XXXX add flash parts, rtc, ??
84 serial0: serial@80004500 { 84 serial0: serial@80004500 {
85 cell-index = <0>; 85 cell-index = <0>;
86 device_type = "serial"; 86 device_type = "serial";
87 compatible = "fsl,ns16550", "ns16550"; 87 compatible = "ns16550";
88 reg = <0x80004500 0x8>; 88 reg = <0x80004500 0x8>;
89 clock-frequency = <97553800>; 89 clock-frequency = <97553800>;
90 current-speed = <9600>; 90 current-speed = <9600>;
@@ -95,7 +95,7 @@ XXXX add flash parts, rtc, ??
95 serial1: serial@80004600 { 95 serial1: serial@80004600 {
96 cell-index = <1>; 96 cell-index = <1>;
97 device_type = "serial"; 97 device_type = "serial";
98 compatible = "fsl,ns16550", "ns16550"; 98 compatible = "ns16550";
99 reg = <0x80004600 0x8>; 99 reg = <0x80004600 0x8>;
100 clock-frequency = <97553800>; 100 clock-frequency = <97553800>;
101 current-speed = <57600>; 101 current-speed = <57600>;
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 0e758b347cd..b13a11eb81b 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -84,7 +84,7 @@ XXXX add flash parts, rtc, ??
84 serial0: serial@80004500 { 84 serial0: serial@80004500 {
85 cell-index = <0>; 85 cell-index = <0>;
86 device_type = "serial"; 86 device_type = "serial";
87 compatible = "fsl,ns16550", "ns16550"; 87 compatible = "ns16550";
88 reg = <0x80004500 0x8>; 88 reg = <0x80004500 0x8>;
89 clock-frequency = <130041000>; 89 clock-frequency = <130041000>;
90 current-speed = <9600>; 90 current-speed = <9600>;
@@ -95,7 +95,7 @@ XXXX add flash parts, rtc, ??
95 serial1: serial@80004600 { 95 serial1: serial@80004600 {
96 cell-index = <1>; 96 cell-index = <1>;
97 device_type = "serial"; 97 device_type = "serial";
98 compatible = "fsl,ns16550", "ns16550"; 98 compatible = "ns16550";
99 reg = <0x80004600 0x8>; 99 reg = <0x80004600 0x8>;
100 clock-frequency = <130041000>; 100 clock-frequency = <130041000>;
101 current-speed = <57600>; 101 current-speed = <57600>;
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
index d72fb5e219d..1360d2f6902 100644
--- a/arch/powerpc/boot/dts/mgcoge.dts
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -213,38 +213,6 @@
213 linux,network-index = <2>; 213 linux,network-index = <2>;
214 fsl,cpm-command = <0x16200300>; 214 fsl,cpm-command = <0x16200300>;
215 }; 215 };
216
217 usb@11b60 {
218 compatible = "fsl,mpc8272-cpm-usb";
219 mode = "peripheral";
220 reg = <0x11b60 0x40 0x8b00 0x100>;
221 interrupts = <11 8>;
222 interrupt-parent = <&PIC>;
223 usb-clock = <5>;
224 };
225 spi@11aa0 {
226 cell-index = <0>;
227 compatible = "fsl,spi", "fsl,cpm2-spi";
228 reg = <0x11a80 0x40 0x89fc 0x2>;
229 interrupts = <2 8>;
230 interrupt-parent = <&PIC>;
231 gpios = < &cpm2_pio_d 19 0>;
232 #address-cells = <1>;
233 #size-cells = <0>;
234 ds3106@1 {
235 compatible = "gen,spidev";
236 reg = <0>;
237 spi-max-frequency = <8000000>;
238 };
239 };
240
241 };
242
243 cpm2_pio_d: gpio-controller@10d60 {
244 #gpio-cells = <2>;
245 compatible = "fsl,cpm2-pario-bank";
246 reg = <0x10d60 0x14>;
247 gpio-controller;
248 }; 216 };
249 217
250 cpm2_pio_c: gpio-controller@10d40 { 218 cpm2_pio_c: gpio-controller@10d40 {
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
index 39ed65a44c5..bc27548e895 100644
--- a/arch/powerpc/boot/dts/mpc5200b.dtsi
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -147,8 +147,6 @@
147 }; 147 };
148 148
149 spi@f00 { 149 spi@f00 {
150 #address-cells = <1>;
151 #size-cells = <0>;
152 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 150 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
153 reg = <0xf00 0x20>; 151 reg = <0xf00 0x20>;
154 interrupts = <2 13 0 2 14 0>; 152 interrupts = <2 13 0 2 14 0>;
@@ -231,12 +229,6 @@
231 interrupts = <2 7 0>; 229 interrupts = <2 7 0>;
232 }; 230 };
233 231
234 sclpc@3c00 {
235 compatible = "fsl,mpc5200-lpbfifo";
236 reg = <0x3c00 0x60>;
237 interrupts = <2 23 0>;
238 };
239
240 i2c@3d00 { 232 i2c@3d00 {
241 #address-cells = <1>; 233 #address-cells = <1>;
242 #size-cells = <0>; 234 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8308_p1m.dts b/arch/powerpc/boot/dts/mpc8308_p1m.dts
index 22b0832b6c3..697b3f6b78b 100644
--- a/arch/powerpc/boot/dts/mpc8308_p1m.dts
+++ b/arch/powerpc/boot/dts/mpc8308_p1m.dts
@@ -233,7 +233,7 @@
233 serial0: serial@4500 { 233 serial0: serial@4500 {
234 cell-index = <0>; 234 cell-index = <0>;
235 device_type = "serial"; 235 device_type = "serial";
236 compatible = "fsl,ns16550", "ns16550"; 236 compatible = "ns16550";
237 reg = <0x4500 0x100>; 237 reg = <0x4500 0x100>;
238 clock-frequency = <133333333>; 238 clock-frequency = <133333333>;
239 interrupts = <9 0x8>; 239 interrupts = <9 0x8>;
@@ -243,7 +243,7 @@
243 serial1: serial@4600 { 243 serial1: serial@4600 {
244 cell-index = <1>; 244 cell-index = <1>;
245 device_type = "serial"; 245 device_type = "serial";
246 compatible = "fsl,ns16550", "ns16550"; 246 compatible = "ns16550";
247 reg = <0x4600 0x100>; 247 reg = <0x4600 0x100>;
248 clock-frequency = <133333333>; 248 clock-frequency = <133333333>;
249 interrupts = <10 0x8>; 249 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
index f66d10d95a8..a0bd1881081 100644
--- a/arch/powerpc/boot/dts/mpc8308rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -208,7 +208,7 @@
208 serial0: serial@4500 { 208 serial0: serial@4500 {
209 cell-index = <0>; 209 cell-index = <0>;
210 device_type = "serial"; 210 device_type = "serial";
211 compatible = "fsl,ns16550", "ns16550"; 211 compatible = "ns16550";
212 reg = <0x4500 0x100>; 212 reg = <0x4500 0x100>;
213 clock-frequency = <133333333>; 213 clock-frequency = <133333333>;
214 interrupts = <9 0x8>; 214 interrupts = <9 0x8>;
@@ -218,7 +218,7 @@
218 serial1: serial@4600 { 218 serial1: serial@4600 {
219 cell-index = <1>; 219 cell-index = <1>;
220 device_type = "serial"; 220 device_type = "serial";
221 compatible = "fsl,ns16550", "ns16550"; 221 compatible = "ns16550";
222 reg = <0x4600 0x100>; 222 reg = <0x4600 0x100>;
223 clock-frequency = <133333333>; 223 clock-frequency = <133333333>;
224 interrupts = <10 0x8>; 224 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 1c836c6c5be..ac1eb320c7b 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -261,7 +261,7 @@
261 serial0: serial@4500 { 261 serial0: serial@4500 {
262 cell-index = <0>; 262 cell-index = <0>;
263 device_type = "serial"; 263 device_type = "serial";
264 compatible = "fsl,ns16550", "ns16550"; 264 compatible = "ns16550";
265 reg = <0x4500 0x100>; 265 reg = <0x4500 0x100>;
266 clock-frequency = <0>; 266 clock-frequency = <0>;
267 interrupts = <9 0x8>; 267 interrupts = <9 0x8>;
@@ -271,7 +271,7 @@
271 serial1: serial@4600 { 271 serial1: serial@4600 {
272 cell-index = <1>; 272 cell-index = <1>;
273 device_type = "serial"; 273 device_type = "serial";
274 compatible = "fsl,ns16550", "ns16550"; 274 compatible = "ns16550";
275 reg = <0x4600 0x100>; 275 reg = <0x4600 0x100>;
276 clock-frequency = <0>; 276 clock-frequency = <0>;
277 interrupts = <10 0x8>; 277 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 811848e93ae..4dd08c32297 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -265,7 +265,7 @@
265 serial0: serial@4500 { 265 serial0: serial@4500 {
266 cell-index = <0>; 266 cell-index = <0>;
267 device_type = "serial"; 267 device_type = "serial";
268 compatible = "fsl,ns16550", "ns16550"; 268 compatible = "ns16550";
269 reg = <0x4500 0x100>; 269 reg = <0x4500 0x100>;
270 clock-frequency = <133333333>; 270 clock-frequency = <133333333>;
271 interrupts = <9 0x8>; 271 interrupts = <9 0x8>;
@@ -275,7 +275,7 @@
275 serial1: serial@4600 { 275 serial1: serial@4600 {
276 cell-index = <1>; 276 cell-index = <1>;
277 device_type = "serial"; 277 device_type = "serial";
278 compatible = "fsl,ns16550", "ns16550"; 278 compatible = "ns16550";
279 reg = <0x4600 0x100>; 279 reg = <0x4600 0x100>;
280 clock-frequency = <133333333>; 280 clock-frequency = <133333333>;
281 interrupts = <10 0x8>; 281 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index da9c72ddc34..05ad8c98e52 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -105,7 +105,7 @@
105 serial0: serial@4500 { 105 serial0: serial@4500 {
106 cell-index = <0>; 106 cell-index = <0>;
107 device_type = "serial"; 107 device_type = "serial";
108 compatible = "fsl,ns16550", "ns16550"; 108 compatible = "ns16550";
109 reg = <0x4500 0x100>; 109 reg = <0x4500 0x100>;
110 clock-frequency = <0>; 110 clock-frequency = <0>;
111 interrupts = <9 0x8>; 111 interrupts = <9 0x8>;
@@ -115,7 +115,7 @@
115 serial1: serial@4600 { 115 serial1: serial@4600 {
116 cell-index = <1>; 116 cell-index = <1>;
117 device_type = "serial"; 117 device_type = "serial";
118 compatible = "fsl,ns16550", "ns16550"; 118 compatible = "ns16550";
119 reg = <0x4600 0x100>; 119 reg = <0x4600 0x100>;
120 clock-frequency = <0>; 120 clock-frequency = <0>;
121 interrupts = <10 0x8>; 121 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index ff7b15b340a..f4fadb23ad6 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -83,7 +83,7 @@
83 serial0: serial@4500 { 83 serial0: serial@4500 {
84 cell-index = <0>; 84 cell-index = <0>;
85 device_type = "serial"; 85 device_type = "serial";
86 compatible = "fsl,ns16550", "ns16550"; 86 compatible = "ns16550";
87 reg = <0x4500 0x100>; 87 reg = <0x4500 0x100>;
88 clock-frequency = <0>; 88 clock-frequency = <0>;
89 interrupts = <9 0x8>; 89 interrupts = <9 0x8>;
@@ -93,7 +93,7 @@
93 serial1: serial@4600 { 93 serial1: serial@4600 {
94 cell-index = <1>; 94 cell-index = <1>;
95 device_type = "serial"; 95 device_type = "serial";
96 compatible = "fsl,ns16550", "ns16550"; 96 compatible = "ns16550";
97 reg = <0x4600 0x100>; 97 reg = <0x4600 0x100>;
98 clock-frequency = <0>; 98 clock-frequency = <0>;
99 interrupts = <10 0x8>; 99 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 2608679d0d4..b53d1df11e2 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -283,7 +283,7 @@
283 serial0: serial@4500 { 283 serial0: serial@4500 {
284 cell-index = <0>; 284 cell-index = <0>;
285 device_type = "serial"; 285 device_type = "serial";
286 compatible = "fsl,ns16550", "ns16550"; 286 compatible = "ns16550";
287 reg = <0x4500 0x100>; 287 reg = <0x4500 0x100>;
288 clock-frequency = <0>; // from bootloader 288 clock-frequency = <0>; // from bootloader
289 interrupts = <9 0x8>; 289 interrupts = <9 0x8>;
@@ -293,7 +293,7 @@
293 serial1: serial@4600 { 293 serial1: serial@4600 {
294 cell-index = <1>; 294 cell-index = <1>;
295 device_type = "serial"; 295 device_type = "serial";
296 compatible = "fsl,ns16550", "ns16550"; 296 compatible = "ns16550";
297 reg = <0x4600 0x100>; 297 reg = <0x4600 0x100>;
298 clock-frequency = <0>; // from bootloader 298 clock-frequency = <0>; // from bootloader
299 interrupts = <10 0x8>; 299 interrupts = <10 0x8>;
@@ -390,8 +390,7 @@
390 #address-cells = <2>; 390 #address-cells = <2>;
391 #size-cells = <1>; 391 #size-cells = <1>;
392 compatible = "fsl,mpc8349e-localbus", 392 compatible = "fsl,mpc8349e-localbus",
393 "fsl,pq2pro-localbus", 393 "fsl,pq2pro-localbus";
394 "simple-bus";
395 reg = <0xe0005000 0xd8>; 394 reg = <0xe0005000 0xd8>;
396 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ 395 ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
397 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ 396 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 6cd044d8fb8..eb732115f01 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -189,7 +189,7 @@
189 serial0: serial@4500 { 189 serial0: serial@4500 {
190 cell-index = <0>; 190 cell-index = <0>;
191 device_type = "serial"; 191 device_type = "serial";
192 compatible = "fsl,ns16550", "ns16550"; 192 compatible = "ns16550";
193 reg = <0x4500 0x100>; 193 reg = <0x4500 0x100>;
194 clock-frequency = <0>; // from bootloader 194 clock-frequency = <0>; // from bootloader
195 interrupts = <9 0x8>; 195 interrupts = <9 0x8>;
@@ -199,7 +199,7 @@
199 serial1: serial@4600 { 199 serial1: serial@4600 {
200 cell-index = <1>; 200 cell-index = <1>;
201 device_type = "serial"; 201 device_type = "serial";
202 compatible = "fsl,ns16550", "ns16550"; 202 compatible = "ns16550";
203 reg = <0x4600 0x100>; 203 reg = <0x4600 0x100>;
204 clock-frequency = <0>; // from bootloader 204 clock-frequency = <0>; // from bootloader
205 interrupts = <10 0x8>; 205 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 4552864082c..230febb9b72 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -242,7 +242,7 @@
242 serial0: serial@4500 { 242 serial0: serial@4500 {
243 cell-index = <0>; 243 cell-index = <0>;
244 device_type = "serial"; 244 device_type = "serial";
245 compatible = "fsl,ns16550", "ns16550"; 245 compatible = "ns16550";
246 reg = <0x4500 0x100>; 246 reg = <0x4500 0x100>;
247 clock-frequency = <0>; 247 clock-frequency = <0>;
248 interrupts = <9 0x8>; 248 interrupts = <9 0x8>;
@@ -252,7 +252,7 @@
252 serial1: serial@4600 { 252 serial1: serial@4600 {
253 cell-index = <1>; 253 cell-index = <1>;
254 device_type = "serial"; 254 device_type = "serial";
255 compatible = "fsl,ns16550", "ns16550"; 255 compatible = "ns16550";
256 reg = <0x4600 0x100>; 256 reg = <0x4600 0x100>;
257 clock-frequency = <0>; 257 clock-frequency = <0>;
258 interrupts = <10 0x8>; 258 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 81dd513d630..45cfa1c50a2 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -136,7 +136,7 @@
136 serial0: serial@4500 { 136 serial0: serial@4500 {
137 cell-index = <0>; 137 cell-index = <0>;
138 device_type = "serial"; 138 device_type = "serial";
139 compatible = "fsl,ns16550", "ns16550"; 139 compatible = "ns16550";
140 reg = <0x4500 0x100>; 140 reg = <0x4500 0x100>;
141 clock-frequency = <264000000>; 141 clock-frequency = <264000000>;
142 interrupts = <9 0x8>; 142 interrupts = <9 0x8>;
@@ -146,7 +146,7 @@
146 serial1: serial@4600 { 146 serial1: serial@4600 {
147 cell-index = <1>; 147 cell-index = <1>;
148 device_type = "serial"; 148 device_type = "serial";
149 compatible = "fsl,ns16550", "ns16550"; 149 compatible = "ns16550";
150 reg = <0x4600 0x100>; 150 reg = <0x4600 0x100>;
151 clock-frequency = <264000000>; 151 clock-frequency = <264000000>;
152 interrupts = <10 0x8>; 152 interrupts = <10 0x8>;
@@ -405,10 +405,6 @@
405 reg = <0x1>; 405 reg = <0x1>;
406 device_type = "ethernet-phy"; 406 device_type = "ethernet-phy";
407 }; 407 };
408 tbi-phy@2 {
409 device_type = "tbi-phy";
410 reg = <0x2>;
411 };
412 }; 408 };
413 409
414 qeic: interrupt-controller@80 { 410 qeic: interrupt-controller@80 {
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index b6e9aec1d86..bdf4459677b 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -102,7 +102,7 @@
102 102
103 serial0: serial@4500 { 103 serial0: serial@4500 {
104 device_type = "serial"; 104 device_type = "serial";
105 compatible = "fsl,ns16550", "ns16550"; 105 compatible = "ns16550";
106 reg = <0x4500 0x100>; 106 reg = <0x4500 0x100>;
107 interrupts = <9 8>; 107 interrupts = <9 8>;
108 interrupt-parent = <&ipic>; 108 interrupt-parent = <&ipic>;
@@ -112,7 +112,7 @@
112 112
113 serial1: serial@4600 { 113 serial1: serial@4600 {
114 device_type = "serial"; 114 device_type = "serial";
115 compatible = "fsl,ns16550", "ns16550"; 115 compatible = "ns16550";
116 reg = <0x4600 0x100>; 116 reg = <0x4600 0x100>;
117 interrupts = <10 8>; 117 interrupts = <10 8>;
118 interrupt-parent = <&ipic>; 118 interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index cfccef57cd1..855782c5e5e 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -276,7 +276,7 @@
276 serial0: serial@4500 { 276 serial0: serial@4500 {
277 cell-index = <0>; 277 cell-index = <0>;
278 device_type = "serial"; 278 device_type = "serial";
279 compatible = "fsl,ns16550", "ns16550"; 279 compatible = "ns16550";
280 reg = <0x4500 0x100>; 280 reg = <0x4500 0x100>;
281 clock-frequency = <0>; 281 clock-frequency = <0>;
282 interrupts = <9 0x8>; 282 interrupts = <9 0x8>;
@@ -286,7 +286,7 @@
286 serial1: serial@4600 { 286 serial1: serial@4600 {
287 cell-index = <1>; 287 cell-index = <1>;
288 device_type = "serial"; 288 device_type = "serial";
289 compatible = "fsl,ns16550", "ns16550"; 289 compatible = "ns16550";
290 reg = <0x4600 0x100>; 290 reg = <0x4600 0x100>;
291 clock-frequency = <0>; 291 clock-frequency = <0>;
292 interrupts = <10 0x8>; 292 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 353deff1b7f..dbc1b988b29 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -321,7 +321,7 @@
321 serial0: serial@4500 { 321 serial0: serial@4500 {
322 cell-index = <0>; 322 cell-index = <0>;
323 device_type = "serial"; 323 device_type = "serial";
324 compatible = "fsl,ns16550", "ns16550"; 324 compatible = "ns16550";
325 reg = <0x4500 0x100>; 325 reg = <0x4500 0x100>;
326 clock-frequency = <0>; 326 clock-frequency = <0>;
327 interrupts = <9 0x8>; 327 interrupts = <9 0x8>;
@@ -331,7 +331,7 @@
331 serial1: serial@4600 { 331 serial1: serial@4600 {
332 cell-index = <1>; 332 cell-index = <1>;
333 device_type = "serial"; 333 device_type = "serial";
334 compatible = "fsl,ns16550", "ns16550"; 334 compatible = "ns16550";
335 reg = <0x4600 0x100>; 335 reg = <0x4600 0x100>;
336 clock-frequency = <0>; 336 clock-frequency = <0>;
337 interrupts = <10 0x8>; 337 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8377_wlan.dts b/arch/powerpc/boot/dts/mpc8377_wlan.dts
index ef4a305a0d0..9ea78305696 100644
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -304,7 +304,7 @@
304 serial0: serial@4500 { 304 serial0: serial@4500 {
305 cell-index = <0>; 305 cell-index = <0>;
306 device_type = "serial"; 306 device_type = "serial";
307 compatible = "fsl,ns16550", "ns16550"; 307 compatible = "ns16550";
308 reg = <0x4500 0x100>; 308 reg = <0x4500 0x100>;
309 clock-frequency = <0>; 309 clock-frequency = <0>;
310 interrupts = <9 0x8>; 310 interrupts = <9 0x8>;
@@ -314,7 +314,7 @@
314 serial1: serial@4600 { 314 serial1: serial@4600 {
315 cell-index = <1>; 315 cell-index = <1>;
316 device_type = "serial"; 316 device_type = "serial";
317 compatible = "fsl,ns16550", "ns16550"; 317 compatible = "ns16550";
318 reg = <0x4600 0x100>; 318 reg = <0x4600 0x100>;
319 clock-frequency = <0>; 319 clock-frequency = <0>;
320 interrupts = <10 0x8>; 320 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 538fcb92733..f70cf600083 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -315,7 +315,7 @@
315 serial0: serial@4500 { 315 serial0: serial@4500 {
316 cell-index = <0>; 316 cell-index = <0>;
317 device_type = "serial"; 317 device_type = "serial";
318 compatible = "fsl,ns16550", "ns16550"; 318 compatible = "ns16550";
319 reg = <0x4500 0x100>; 319 reg = <0x4500 0x100>;
320 clock-frequency = <0>; 320 clock-frequency = <0>;
321 interrupts = <9 0x8>; 321 interrupts = <9 0x8>;
@@ -325,7 +325,7 @@
325 serial1: serial@4600 { 325 serial1: serial@4600 {
326 cell-index = <1>; 326 cell-index = <1>;
327 device_type = "serial"; 327 device_type = "serial";
328 compatible = "fsl,ns16550", "ns16550"; 328 compatible = "ns16550";
329 reg = <0x4600 0x100>; 329 reg = <0x4600 0x100>;
330 clock-frequency = <0>; 330 clock-frequency = <0>;
331 interrupts = <10 0x8>; 331 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 32333a908f3..3447eb9f6e8 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -321,7 +321,7 @@
321 serial0: serial@4500 { 321 serial0: serial@4500 {
322 cell-index = <0>; 322 cell-index = <0>;
323 device_type = "serial"; 323 device_type = "serial";
324 compatible = "fsl,ns16550", "ns16550"; 324 compatible = "ns16550";
325 reg = <0x4500 0x100>; 325 reg = <0x4500 0x100>;
326 clock-frequency = <0>; 326 clock-frequency = <0>;
327 interrupts = <9 0x8>; 327 interrupts = <9 0x8>;
@@ -331,7 +331,7 @@
331 serial1: serial@4600 { 331 serial1: serial@4600 {
332 cell-index = <1>; 332 cell-index = <1>;
333 device_type = "serial"; 333 device_type = "serial";
334 compatible = "fsl,ns16550", "ns16550"; 334 compatible = "ns16550";
335 reg = <0x4600 0x100>; 335 reg = <0x4600 0x100>;
336 clock-frequency = <0>; 336 clock-frequency = <0>;
337 interrupts = <10 0x8>; 337 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 5387092fdfb..645ec51cc6e 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -313,7 +313,7 @@
313 serial0: serial@4500 { 313 serial0: serial@4500 {
314 cell-index = <0>; 314 cell-index = <0>;
315 device_type = "serial"; 315 device_type = "serial";
316 compatible = "fsl,ns16550", "ns16550"; 316 compatible = "ns16550";
317 reg = <0x4500 0x100>; 317 reg = <0x4500 0x100>;
318 clock-frequency = <0>; 318 clock-frequency = <0>;
319 interrupts = <9 0x8>; 319 interrupts = <9 0x8>;
@@ -323,7 +323,7 @@
323 serial1: serial@4600 { 323 serial1: serial@4600 {
324 cell-index = <1>; 324 cell-index = <1>;
325 device_type = "serial"; 325 device_type = "serial";
326 compatible = "fsl,ns16550", "ns16550"; 326 compatible = "ns16550";
327 reg = <0x4600 0x100>; 327 reg = <0x4600 0x100>;
328 clock-frequency = <0>; 328 clock-frequency = <0>;
329 interrupts = <10 0x8>; 329 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 46224c2430f..15560c619b0 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -319,7 +319,7 @@
319 serial0: serial@4500 { 319 serial0: serial@4500 {
320 cell-index = <0>; 320 cell-index = <0>;
321 device_type = "serial"; 321 device_type = "serial";
322 compatible = "fsl,ns16550", "ns16550"; 322 compatible = "ns16550";
323 reg = <0x4500 0x100>; 323 reg = <0x4500 0x100>;
324 clock-frequency = <0>; 324 clock-frequency = <0>;
325 interrupts = <9 0x8>; 325 interrupts = <9 0x8>;
@@ -329,7 +329,7 @@
329 serial1: serial@4600 { 329 serial1: serial@4600 {
330 cell-index = <1>; 330 cell-index = <1>;
331 device_type = "serial"; 331 device_type = "serial";
332 compatible = "fsl,ns16550", "ns16550"; 332 compatible = "ns16550";
333 reg = <0x4600 0x100>; 333 reg = <0x4600 0x100>;
334 clock-frequency = <0>; 334 clock-frequency = <0>;
335 interrupts = <10 0x8>; 335 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 19736222a0b..a75c10eed26 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8536 DS Device Tree Source 2 * MPC8536 DS Device Tree Source
3 * 3 *
4 * Copyright 2008, 2011 Freescale Semiconductor, Inc. 4 * Copyright 2008 Freescale Semiconductor, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,11 +9,24 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8536si-pre.dtsi" 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "fsl,mpc8536ds"; 15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds"; 16 compatible = "fsl,mpc8536ds";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 pci3 = &pci3;
29 };
17 30
18 cpus { 31 cpus {
19 #cpus = <1>; 32 #cpus = <1>;
@@ -32,38 +45,403 @@
32 reg = <0 0 0 0>; // Filled by U-Boot 45 reg = <0 0 0 0>; // Filled by U-Boot
33 }; 46 };
34 47
35 lbc: localbus@ffe05000 { 48 soc@ffe00000 {
36 reg = <0 0xffe05000 0 0x1000>; 49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
52 compatible = "simple-bus";
53 ranges = <0x0 0 0xffe00000 0x100000>;
54 bus-frequency = <0>; // Filled out by uboot.
37 55
38 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 56 ecm-law@0 {
39 0x2 0x0 0x0 0xffa00000 0x00040000 57 compatible = "fsl,ecm-law";
40 0x3 0x0 0x0 0xffdf0000 0x00008000>; 58 reg = <0x0 0x1000>;
41 }; 59 fsl,num-laws = <12>;
60 };
42 61
43 board_soc: soc: soc@ffe00000 { 62 ecm@1000 {
44 ranges = <0x0 0 0xffe00000 0x100000>; 63 compatible = "fsl,mpc8536-ecm", "fsl,ecm";
64 reg = <0x1000 0x1000>;
65 interrupts = <17 2>;
66 interrupt-parent = <&mpic>;
67 };
68
69 memory-controller@2000 {
70 compatible = "fsl,mpc8536-memory-controller";
71 reg = <0x2000 0x1000>;
72 interrupt-parent = <&mpic>;
73 interrupts = <18 0x2>;
74 };
75
76 L2: l2-cache-controller@20000 {
77 compatible = "fsl,mpc8536-l2-cache-controller";
78 reg = <0x20000 0x1000>;
79 interrupt-parent = <&mpic>;
80 interrupts = <16 0x2>;
81 };
82
83 i2c@3000 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 cell-index = <0>;
87 compatible = "fsl-i2c";
88 reg = <0x3000 0x100>;
89 interrupts = <43 0x2>;
90 interrupt-parent = <&mpic>;
91 dfsrr;
92 };
93
94 i2c@3100 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 cell-index = <1>;
98 compatible = "fsl-i2c";
99 reg = <0x3100 0x100>;
100 interrupts = <43 0x2>;
101 interrupt-parent = <&mpic>;
102 dfsrr;
103 rtc@68 {
104 compatible = "dallas,ds3232";
105 reg = <0x68>;
106 interrupts = <0 0x1>;
107 interrupt-parent = <&mpic>;
108 };
109 };
110
111 spi@7000 {
112 #address-cells = <1>;
113 #size-cells = <0>;
114 compatible = "fsl,mpc8536-espi";
115 reg = <0x7000 0x1000>;
116 interrupts = <59 0x2>;
117 interrupt-parent = <&mpic>;
118 fsl,espi-num-chipselects = <4>;
119
120 flash@0 {
121 #address-cells = <1>;
122 #size-cells = <1>;
123 compatible = "spansion,s25sl12801";
124 reg = <0>;
125 spi-max-frequency = <40000000>;
126 partition@u-boot {
127 label = "u-boot";
128 reg = <0x00000000 0x00100000>;
129 read-only;
130 };
131 partition@kernel {
132 label = "kernel";
133 reg = <0x00100000 0x00500000>;
134 read-only;
135 };
136 partition@dtb {
137 label = "dtb";
138 reg = <0x00600000 0x00100000>;
139 read-only;
140 };
141 partition@fs {
142 label = "file system";
143 reg = <0x00700000 0x00900000>;
144 };
145 };
146 flash@1 {
147 compatible = "spansion,s25sl12801";
148 reg = <1>;
149 spi-max-frequency = <40000000>;
150 };
151 flash@2 {
152 compatible = "spansion,s25sl12801";
153 reg = <2>;
154 spi-max-frequency = <40000000>;
155 };
156 flash@3 {
157 compatible = "spansion,s25sl12801";
158 reg = <3>;
159 spi-max-frequency = <40000000>;
160 };
161 };
162
163 dma@21300 {
164 #address-cells = <1>;
165 #size-cells = <1>;
166 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
167 reg = <0x21300 4>;
168 ranges = <0 0x21100 0x200>;
169 cell-index = <0>;
170 dma-channel@0 {
171 compatible = "fsl,mpc8536-dma-channel",
172 "fsl,eloplus-dma-channel";
173 reg = <0x0 0x80>;
174 cell-index = <0>;
175 interrupt-parent = <&mpic>;
176 interrupts = <20 2>;
177 };
178 dma-channel@80 {
179 compatible = "fsl,mpc8536-dma-channel",
180 "fsl,eloplus-dma-channel";
181 reg = <0x80 0x80>;
182 cell-index = <1>;
183 interrupt-parent = <&mpic>;
184 interrupts = <21 2>;
185 };
186 dma-channel@100 {
187 compatible = "fsl,mpc8536-dma-channel",
188 "fsl,eloplus-dma-channel";
189 reg = <0x100 0x80>;
190 cell-index = <2>;
191 interrupt-parent = <&mpic>;
192 interrupts = <22 2>;
193 };
194 dma-channel@180 {
195 compatible = "fsl,mpc8536-dma-channel",
196 "fsl,eloplus-dma-channel";
197 reg = <0x180 0x80>;
198 cell-index = <3>;
199 interrupt-parent = <&mpic>;
200 interrupts = <23 2>;
201 };
202 };
203
204 usb@22000 {
205 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
206 reg = <0x22000 0x1000>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 interrupt-parent = <&mpic>;
210 interrupts = <28 0x2>;
211 phy_type = "ulpi";
212 };
213
214 usb@23000 {
215 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
216 reg = <0x23000 0x1000>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 interrupt-parent = <&mpic>;
220 interrupts = <46 0x2>;
221 phy_type = "ulpi";
222 };
223
224 enet0: ethernet@24000 {
225 #address-cells = <1>;
226 #size-cells = <1>;
227 cell-index = <0>;
228 device_type = "network";
229 model = "eTSEC";
230 compatible = "gianfar";
231 reg = <0x24000 0x1000>;
232 ranges = <0x0 0x24000 0x1000>;
233 local-mac-address = [ 00 00 00 00 00 00 ];
234 interrupts = <29 2 30 2 34 2>;
235 interrupt-parent = <&mpic>;
236 tbi-handle = <&tbi0>;
237 phy-handle = <&phy1>;
238 phy-connection-type = "rgmii-id";
239
240 mdio@520 {
241 #address-cells = <1>;
242 #size-cells = <0>;
243 compatible = "fsl,gianfar-mdio";
244 reg = <0x520 0x20>;
245
246 phy0: ethernet-phy@0 {
247 interrupt-parent = <&mpic>;
248 interrupts = <10 0x1>;
249 reg = <0>;
250 device_type = "ethernet-phy";
251 };
252 phy1: ethernet-phy@1 {
253 interrupt-parent = <&mpic>;
254 interrupts = <10 0x1>;
255 reg = <1>;
256 device_type = "ethernet-phy";
257 };
258 tbi0: tbi-phy@11 {
259 reg = <0x11>;
260 device_type = "tbi-phy";
261 };
262 };
263 };
264
265 enet1: ethernet@26000 {
266 #address-cells = <1>;
267 #size-cells = <1>;
268 cell-index = <1>;
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x26000 0x1000>;
273 ranges = <0x0 0x26000 0x1000>;
274 local-mac-address = [ 00 00 00 00 00 00 ];
275 interrupts = <31 2 32 2 33 2>;
276 interrupt-parent = <&mpic>;
277 tbi-handle = <&tbi1>;
278 phy-handle = <&phy0>;
279 phy-connection-type = "rgmii-id";
280
281 mdio@520 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "fsl,gianfar-tbi";
285 reg = <0x520 0x20>;
286
287 tbi1: tbi-phy@11 {
288 reg = <0x11>;
289 device_type = "tbi-phy";
290 };
291 };
292 };
293
294 usb@2b000 {
295 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
296 reg = <0x2b000 0x1000>;
297 #address-cells = <1>;
298 #size-cells = <0>;
299 interrupt-parent = <&mpic>;
300 interrupts = <60 0x2>;
301 dr_mode = "peripheral";
302 phy_type = "ulpi";
303 };
304
305 sdhci@2e000 {
306 compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
307 reg = <0x2e000 0x1000>;
308 interrupts = <72 0x2>;
309 interrupt-parent = <&mpic>;
310 clock-frequency = <250000000>;
311 };
312
313 serial0: serial@4500 {
314 cell-index = <0>;
315 device_type = "serial";
316 compatible = "ns16550";
317 reg = <0x4500 0x100>;
318 clock-frequency = <0>;
319 interrupts = <42 0x2>;
320 interrupt-parent = <&mpic>;
321 };
322
323 serial1: serial@4600 {
324 cell-index = <1>;
325 device_type = "serial";
326 compatible = "ns16550";
327 reg = <0x4600 0x100>;
328 clock-frequency = <0>;
329 interrupts = <42 0x2>;
330 interrupt-parent = <&mpic>;
331 };
332
333 crypto@30000 {
334 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
335 "fsl,sec2.1", "fsl,sec2.0";
336 reg = <0x30000 0x10000>;
337 interrupts = <45 2 58 2>;
338 interrupt-parent = <&mpic>;
339 fsl,num-channels = <4>;
340 fsl,channel-fifo-len = <24>;
341 fsl,exec-units-mask = <0x9fe>;
342 fsl,descriptor-types-mask = <0x3ab0ebf>;
343 };
344
345 sata@18000 {
346 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
347 reg = <0x18000 0x1000>;
348 cell-index = <1>;
349 interrupts = <74 0x2>;
350 interrupt-parent = <&mpic>;
351 };
352
353 sata@19000 {
354 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
355 reg = <0x19000 0x1000>;
356 cell-index = <2>;
357 interrupts = <41 0x2>;
358 interrupt-parent = <&mpic>;
359 };
360
361 global-utilities@e0000 { //global utilities block
362 compatible = "fsl,mpc8548-guts";
363 reg = <0xe0000 0x1000>;
364 fsl,has-rstcr;
365 };
366
367 mpic: pic@40000 {
368 clock-frequency = <0>;
369 interrupt-controller;
370 #address-cells = <0>;
371 #interrupt-cells = <2>;
372 reg = <0x40000 0x40000>;
373 compatible = "chrp,open-pic";
374 device_type = "open-pic";
375 big-endian;
376 };
377
378 msi@41600 {
379 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
380 reg = <0x41600 0x80>;
381 msi-available-ranges = <0 0x100>;
382 interrupts = <
383 0xe0 0
384 0xe1 0
385 0xe2 0
386 0xe3 0
387 0xe4 0
388 0xe5 0
389 0xe6 0
390 0xe7 0>;
391 interrupt-parent = <&mpic>;
392 };
45 }; 393 };
46 394
47 pci0: pci@ffe08000 { 395 pci0: pci@ffe08000 {
48 reg = <0 0xffe08000 0 0x1000>; 396 compatible = "fsl,mpc8540-pci";
49 ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000 397 device_type = "pci";
50 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
51 clock-frequency = <66666666>;
52 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 398 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
53 interrupt-map = < 399 interrupt-map = <
54 400
55 /* IDSEL 0x11 J17 Slot 1 */ 401 /* IDSEL 0x11 J17 Slot 1 */
56 0x8800 0 0 1 &mpic 1 1 0 0 402 0x8800 0 0 1 &mpic 1 1
57 0x8800 0 0 2 &mpic 2 1 0 0 403 0x8800 0 0 2 &mpic 2 1
58 0x8800 0 0 3 &mpic 3 1 0 0 404 0x8800 0 0 3 &mpic 3 1
59 0x8800 0 0 4 &mpic 4 1 0 0>; 405 0x8800 0 0 4 &mpic 4 1>;
406
407 interrupt-parent = <&mpic>;
408 interrupts = <24 0x2>;
409 bus-range = <0 0xff>;
410 ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
411 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
412 clock-frequency = <66666666>;
413 #interrupt-cells = <1>;
414 #size-cells = <2>;
415 #address-cells = <3>;
416 reg = <0 0xffe08000 0 0x1000>;
60 }; 417 };
61 418
62 pci1: pcie@ffe09000 { 419 pci1: pcie@ffe09000 {
420 compatible = "fsl,mpc8548-pcie";
421 device_type = "pci";
422 #interrupt-cells = <1>;
423 #size-cells = <2>;
424 #address-cells = <3>;
63 reg = <0 0xffe09000 0 0x1000>; 425 reg = <0 0xffe09000 0 0x1000>;
426 bus-range = <0 0xff>;
64 ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000 427 ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
65 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>; 428 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
429 clock-frequency = <33333333>;
430 interrupt-parent = <&mpic>;
431 interrupts = <25 0x2>;
432 interrupt-map-mask = <0xf800 0 0 7>;
433 interrupt-map = <
434 /* IDSEL 0x0 */
435 0000 0 0 1 &mpic 4 1
436 0000 0 0 2 &mpic 5 1
437 0000 0 0 3 &mpic 6 1
438 0000 0 0 4 &mpic 7 1
439 >;
66 pcie@0 { 440 pcie@0 {
441 reg = <0 0 0 0 0>;
442 #size-cells = <2>;
443 #address-cells = <3>;
444 device_type = "pci";
67 ranges = <0x02000000 0 0x98000000 445 ranges = <0x02000000 0 0x98000000
68 0x02000000 0 0x98000000 446 0x02000000 0 0x98000000
69 0 0x08000000 447 0 0x08000000
@@ -75,10 +453,31 @@
75 }; 453 };
76 454
77 pci2: pcie@ffe0a000 { 455 pci2: pcie@ffe0a000 {
456 compatible = "fsl,mpc8548-pcie";
457 device_type = "pci";
458 #interrupt-cells = <1>;
459 #size-cells = <2>;
460 #address-cells = <3>;
78 reg = <0 0xffe0a000 0 0x1000>; 461 reg = <0 0xffe0a000 0 0x1000>;
462 bus-range = <0 0xff>;
79 ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000 463 ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
80 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>; 464 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
465 clock-frequency = <33333333>;
466 interrupt-parent = <&mpic>;
467 interrupts = <26 0x2>;
468 interrupt-map-mask = <0xf800 0 0 7>;
469 interrupt-map = <
470 /* IDSEL 0x0 */
471 0000 0 0 1 &mpic 0 1
472 0000 0 0 2 &mpic 1 1
473 0000 0 0 3 &mpic 2 1
474 0000 0 0 4 &mpic 3 1
475 >;
81 pcie@0 { 476 pcie@0 {
477 reg = <0 0 0 0 0>;
478 #size-cells = <2>;
479 #address-cells = <3>;
480 device_type = "pci";
82 ranges = <0x02000000 0 0x90000000 481 ranges = <0x02000000 0 0x90000000
83 0x02000000 0 0x90000000 482 0x02000000 0 0x90000000
84 0 0x08000000 483 0 0x08000000
@@ -90,10 +489,32 @@
90 }; 489 };
91 490
92 pci3: pcie@ffe0b000 { 491 pci3: pcie@ffe0b000 {
492 compatible = "fsl,mpc8548-pcie";
493 device_type = "pci";
494 #interrupt-cells = <1>;
495 #size-cells = <2>;
496 #address-cells = <3>;
93 reg = <0 0xffe0b000 0 0x1000>; 497 reg = <0 0xffe0b000 0 0x1000>;
498 bus-range = <0 0xff>;
94 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 499 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
95 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>; 500 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
501 clock-frequency = <33333333>;
502 interrupt-parent = <&mpic>;
503 interrupts = <27 0x2>;
504 interrupt-map-mask = <0xf800 0 0 7>;
505 interrupt-map = <
506 /* IDSEL 0x0 */
507 0000 0 0 1 &mpic 8 1
508 0000 0 0 2 &mpic 9 1
509 0000 0 0 3 &mpic 10 1
510 0000 0 0 4 &mpic 11 1
511 >;
512
96 pcie@0 { 513 pcie@0 {
514 reg = <0 0 0 0 0>;
515 #size-cells = <2>;
516 #address-cells = <3>;
517 device_type = "pci";
97 ranges = <0x02000000 0 0xa0000000 518 ranges = <0x02000000 0 0xa0000000
98 0x02000000 0 0xa0000000 519 0x02000000 0 0xa0000000
99 0 0x20000000 520 0 0x20000000
@@ -104,6 +525,3 @@
104 }; 525 };
105 }; 526 };
106}; 527};
107
108/include/ "fsl/mpc8536si-post.dtsi"
109/include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi
deleted file mode 100644
index 7c3dde84d19..00000000000
--- a/arch/powerpc/boot/dts/mpc8536ds.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
1/*
2 * MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
47 };
48
49 partition@3000000 {
50 reg = <0x03000000 0x00e00000>;
51 label = "diagnostic-nor";
52 read-only;
53 };
54
55 partition@3e00000 {
56 reg = <0x03e00000 0x00200000>;
57 label = "dink-nor";
58 read-only;
59 };
60
61 partition@4000000 {
62 reg = <0x04000000 0x00400000>;
63 label = "kernel-nor";
64 };
65
66 partition@4400000 {
67 reg = <0x04400000 0x03b00000>;
68 label = "fs-nor";
69 };
70
71 partition@7f00000 {
72 reg = <0x07f00000 0x00080000>;
73 label = "dtb-nor";
74 };
75
76 partition@7f80000 {
77 reg = <0x07f80000 0x00080000>;
78 label = "u-boot-nor";
79 read-only;
80 };
81 };
82
83 nand@2,0 {
84 #address-cells = <1>;
85 #size-cells = <1>;
86 compatible = "fsl,mpc8536-fcm-nand",
87 "fsl,elbc-fcm-nand";
88 reg = <0x2 0x0 0x40000>;
89
90 partition@0 {
91 reg = <0x0 0x02000000>;
92 label = "u-boot-nand";
93 read-only;
94 };
95
96 partition@2000000 {
97 reg = <0x02000000 0x10000000>;
98 label = "fs-nand";
99 };
100
101 partition@12000000 {
102 reg = <0x12000000 0x08000000>;
103 label = "ramdisk-nand";
104 };
105
106 partition@1a000000 {
107 reg = <0x1a000000 0x04000000>;
108 label = "kernel-nand";
109 };
110
111 partition@1e000000 {
112 reg = <0x1e000000 0x01000000>;
113 label = "dtb-nand";
114 };
115
116 partition@1f000000 {
117 reg = <0x1f000000 0x21000000>;
118 label = "empty-nand";
119 };
120 };
121
122 board-control@3,0 {
123 compatible = "fsl,mpc8536ds-fpga-pixis";
124 reg = <0x3 0x0 0x8000>;
125 };
126};
127
128&board_soc {
129 i2c@3100 {
130 rtc@68 {
131 compatible = "dallas,ds3232";
132 reg = <0x68>;
133 interrupts = <0 0x1 0 0>;
134 };
135 adt7461@4c {
136 compatible = "adi,adt7461";
137 reg = <0x4c>;
138 };
139 };
140
141 spi@7000 {
142 flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "spansion,s25sl12801";
146 reg = <0>;
147 spi-max-frequency = <40000000>;
148 partition@u-boot {
149 label = "u-boot";
150 reg = <0x00000000 0x00100000>;
151 read-only;
152 };
153 partition@kernel {
154 label = "kernel";
155 reg = <0x00100000 0x00500000>;
156 read-only;
157 };
158 partition@dtb {
159 label = "dtb";
160 reg = <0x00600000 0x00100000>;
161 read-only;
162 };
163 partition@fs {
164 label = "file system";
165 reg = <0x00700000 0x00900000>;
166 };
167 };
168 flash@1 {
169 compatible = "spansion,s25sl12801";
170 reg = <1>;
171 spi-max-frequency = <40000000>;
172 };
173 flash@2 {
174 compatible = "spansion,s25sl12801";
175 reg = <2>;
176 spi-max-frequency = <40000000>;
177 };
178 flash@3 {
179 compatible = "spansion,s25sl12801";
180 reg = <3>;
181 spi-max-frequency = <40000000>;
182 };
183 };
184
185 usb@22000 {
186 phy_type = "ulpi";
187 };
188
189 usb@23000 {
190 phy_type = "ulpi";
191 };
192
193 enet0: ethernet@24000 {
194 tbi-handle = <&tbi0>;
195 phy-handle = <&phy1>;
196 phy-connection-type = "rgmii-id";
197 };
198
199 mdio@24520 {
200 phy0: ethernet-phy@0 {
201 interrupts = <10 0x1 0 0>;
202 reg = <0>;
203 device_type = "ethernet-phy";
204 };
205 phy1: ethernet-phy@1 {
206 interrupts = <10 0x1 0 0>;
207 reg = <1>;
208 device_type = "ethernet-phy";
209 };
210 sgmii_phy0: sgmii-phy@0 {
211 interrupts = <6 1 0 0>;
212 reg = <0x1d>;
213 };
214 sgmii_phy1: sgmii-phy@1 {
215 interrupts = <6 1 0 0>;
216 reg = <0x1c>;
217 };
218 tbi0: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
223
224 enet2: ethernet@26000 {
225 tbi-handle = <&tbi1>;
226 phy-handle = <&phy0>;
227 phy-connection-type = "rgmii-id";
228 };
229
230 mdio@26520 {
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "fsl,gianfar-tbi";
234 reg = <0x26520 0x20>;
235
236 tbi1: tbi-phy@11 {
237 reg = <0x11>;
238 device_type = "tbi-phy";
239 };
240 };
241
242 usb@2b000 {
243 dr_mode = "peripheral";
244 phy_type = "ulpi";
245 };
246};
diff --git a/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
index f8a3b341317..d95b26021e6 100644
--- a/arch/powerpc/boot/dts/mpc8536ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8536DS Device Tree Source (36-bit address map) 2 * MPC8536 DS Device Tree Source
3 * 3 *
4 * Copyright 2008-2009, 2011 Freescale Semiconductor, Inc. 4 * Copyright 2008-2009 Freescale Semiconductor, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,11 +9,24 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8536si-pre.dtsi" 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "fsl,mpc8536ds"; 15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds"; 16 compatible = "fsl,mpc8536ds";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 pci3 = &pci3;
29 };
17 30
18 cpus { 31 cpus {
19 #cpus = <1>; 32 #cpus = <1>;
@@ -32,38 +45,351 @@
32 reg = <0 0 0 0>; // Filled by U-Boot 45 reg = <0 0 0 0>; // Filled by U-Boot
33 }; 46 };
34 47
35 lbc: localbus@ffe05000 { 48 soc@fffe00000 {
36 reg = <0xf 0xffe05000 0 0x1000>; 49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
52 compatible = "simple-bus";
53 ranges = <0x0 0xf 0xffe00000 0x100000>;
54 bus-frequency = <0>; // Filled out by uboot.
37 55
38 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 56 ecm-law@0 {
39 0x2 0x0 0xf 0xffa00000 0x00040000 57 compatible = "fsl,ecm-law";
40 0x3 0x0 0xf 0xffdf0000 0x00008000>; 58 reg = <0x0 0x1000>;
41 }; 59 fsl,num-laws = <12>;
60 };
42 61
43 board_soc: soc: soc@fffe00000 { 62 ecm@1000 {
44 ranges = <0x0 0xf 0xffe00000 0x100000>; 63 compatible = "fsl,mpc8536-ecm", "fsl,ecm";
64 reg = <0x1000 0x1000>;
65 interrupts = <17 2>;
66 interrupt-parent = <&mpic>;
67 };
68
69 memory-controller@2000 {
70 compatible = "fsl,mpc8536-memory-controller";
71 reg = <0x2000 0x1000>;
72 interrupt-parent = <&mpic>;
73 interrupts = <18 0x2>;
74 };
75
76 L2: l2-cache-controller@20000 {
77 compatible = "fsl,mpc8536-l2-cache-controller";
78 reg = <0x20000 0x1000>;
79 interrupt-parent = <&mpic>;
80 interrupts = <16 0x2>;
81 };
82
83 i2c@3000 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 cell-index = <0>;
87 compatible = "fsl-i2c";
88 reg = <0x3000 0x100>;
89 interrupts = <43 0x2>;
90 interrupt-parent = <&mpic>;
91 dfsrr;
92 };
93
94 i2c@3100 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 cell-index = <1>;
98 compatible = "fsl-i2c";
99 reg = <0x3100 0x100>;
100 interrupts = <43 0x2>;
101 interrupt-parent = <&mpic>;
102 dfsrr;
103 rtc@68 {
104 compatible = "dallas,ds3232";
105 reg = <0x68>;
106 interrupts = <0 0x1>;
107 interrupt-parent = <&mpic>;
108 };
109 };
110
111 dma@21300 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
115 reg = <0x21300 4>;
116 ranges = <0 0x21100 0x200>;
117 cell-index = <0>;
118 dma-channel@0 {
119 compatible = "fsl,mpc8536-dma-channel",
120 "fsl,eloplus-dma-channel";
121 reg = <0x0 0x80>;
122 cell-index = <0>;
123 interrupt-parent = <&mpic>;
124 interrupts = <20 2>;
125 };
126 dma-channel@80 {
127 compatible = "fsl,mpc8536-dma-channel",
128 "fsl,eloplus-dma-channel";
129 reg = <0x80 0x80>;
130 cell-index = <1>;
131 interrupt-parent = <&mpic>;
132 interrupts = <21 2>;
133 };
134 dma-channel@100 {
135 compatible = "fsl,mpc8536-dma-channel",
136 "fsl,eloplus-dma-channel";
137 reg = <0x100 0x80>;
138 cell-index = <2>;
139 interrupt-parent = <&mpic>;
140 interrupts = <22 2>;
141 };
142 dma-channel@180 {
143 compatible = "fsl,mpc8536-dma-channel",
144 "fsl,eloplus-dma-channel";
145 reg = <0x180 0x80>;
146 cell-index = <3>;
147 interrupt-parent = <&mpic>;
148 interrupts = <23 2>;
149 };
150 };
151
152 usb@22000 {
153 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
154 reg = <0x22000 0x1000>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 interrupt-parent = <&mpic>;
158 interrupts = <28 0x2>;
159 phy_type = "ulpi";
160 };
161
162 usb@23000 {
163 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
164 reg = <0x23000 0x1000>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 interrupt-parent = <&mpic>;
168 interrupts = <46 0x2>;
169 phy_type = "ulpi";
170 };
171
172 enet0: ethernet@24000 {
173 #address-cells = <1>;
174 #size-cells = <1>;
175 cell-index = <0>;
176 device_type = "network";
177 model = "eTSEC";
178 compatible = "gianfar";
179 reg = <0x24000 0x1000>;
180 ranges = <0x0 0x24000 0x1000>;
181 local-mac-address = [ 00 00 00 00 00 00 ];
182 interrupts = <29 2 30 2 34 2>;
183 interrupt-parent = <&mpic>;
184 tbi-handle = <&tbi0>;
185 phy-handle = <&phy1>;
186 phy-connection-type = "rgmii-id";
187
188 mdio@520 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,gianfar-mdio";
192 reg = <0x520 0x20>;
193
194 phy0: ethernet-phy@0 {
195 interrupt-parent = <&mpic>;
196 interrupts = <10 0x1>;
197 reg = <0>;
198 device_type = "ethernet-phy";
199 };
200 phy1: ethernet-phy@1 {
201 interrupt-parent = <&mpic>;
202 interrupts = <10 0x1>;
203 reg = <1>;
204 device_type = "ethernet-phy";
205 };
206 tbi0: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211 };
212
213 enet1: ethernet@26000 {
214 #address-cells = <1>;
215 #size-cells = <1>;
216 cell-index = <1>;
217 device_type = "network";
218 model = "eTSEC";
219 compatible = "gianfar";
220 reg = <0x26000 0x1000>;
221 ranges = <0x0 0x26000 0x1000>;
222 local-mac-address = [ 00 00 00 00 00 00 ];
223 interrupts = <31 2 32 2 33 2>;
224 interrupt-parent = <&mpic>;
225 tbi-handle = <&tbi1>;
226 phy-handle = <&phy0>;
227 phy-connection-type = "rgmii-id";
228
229 mdio@520 {
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,gianfar-tbi";
233 reg = <0x520 0x20>;
234
235 tbi1: tbi-phy@11 {
236 reg = <0x11>;
237 device_type = "tbi-phy";
238 };
239 };
240 };
241
242 usb@2b000 {
243 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
244 reg = <0x2b000 0x1000>;
245 #address-cells = <1>;
246 #size-cells = <0>;
247 interrupt-parent = <&mpic>;
248 interrupts = <60 0x2>;
249 dr_mode = "peripheral";
250 phy_type = "ulpi";
251 };
252
253 sdhci@2e000 {
254 compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
255 reg = <0x2e000 0x1000>;
256 interrupts = <72 0x2>;
257 interrupt-parent = <&mpic>;
258 clock-frequency = <250000000>;
259 };
260
261 serial0: serial@4500 {
262 cell-index = <0>;
263 device_type = "serial";
264 compatible = "ns16550";
265 reg = <0x4500 0x100>;
266 clock-frequency = <0>;
267 interrupts = <42 0x2>;
268 interrupt-parent = <&mpic>;
269 };
270
271 serial1: serial@4600 {
272 cell-index = <1>;
273 device_type = "serial";
274 compatible = "ns16550";
275 reg = <0x4600 0x100>;
276 clock-frequency = <0>;
277 interrupts = <42 0x2>;
278 interrupt-parent = <&mpic>;
279 };
280
281 crypto@30000 {
282 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
283 "fsl,sec2.1", "fsl,sec2.0";
284 reg = <0x30000 0x10000>;
285 interrupts = <45 2 58 2>;
286 interrupt-parent = <&mpic>;
287 fsl,num-channels = <4>;
288 fsl,channel-fifo-len = <24>;
289 fsl,exec-units-mask = <0x9fe>;
290 fsl,descriptor-types-mask = <0x3ab0ebf>;
291 };
292
293 sata@18000 {
294 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
295 reg = <0x18000 0x1000>;
296 cell-index = <1>;
297 interrupts = <74 0x2>;
298 interrupt-parent = <&mpic>;
299 };
300
301 sata@19000 {
302 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
303 reg = <0x19000 0x1000>;
304 cell-index = <2>;
305 interrupts = <41 0x2>;
306 interrupt-parent = <&mpic>;
307 };
308
309 global-utilities@e0000 { //global utilities block
310 compatible = "fsl,mpc8548-guts";
311 reg = <0xe0000 0x1000>;
312 fsl,has-rstcr;
313 };
314
315 mpic: pic@40000 {
316 clock-frequency = <0>;
317 interrupt-controller;
318 #address-cells = <0>;
319 #interrupt-cells = <2>;
320 reg = <0x40000 0x40000>;
321 compatible = "chrp,open-pic";
322 device_type = "open-pic";
323 big-endian;
324 };
325
326 msi@41600 {
327 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
328 reg = <0x41600 0x80>;
329 msi-available-ranges = <0 0x100>;
330 interrupts = <
331 0xe0 0
332 0xe1 0
333 0xe2 0
334 0xe3 0
335 0xe4 0
336 0xe5 0
337 0xe6 0
338 0xe7 0>;
339 interrupt-parent = <&mpic>;
340 };
45 }; 341 };
46 342
47 pci0: pci@ffe08000 { 343 pci0: pci@fffe08000 {
48 reg = <0xf 0xffe08000 0 0x1000>; 344 compatible = "fsl,mpc8540-pci";
49 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000 345 device_type = "pci";
50 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
51 clock-frequency = <66666666>;
52 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 346 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
53 interrupt-map = < 347 interrupt-map = <
54 348
55 /* IDSEL 0x11 J17 Slot 1 */ 349 /* IDSEL 0x11 J17 Slot 1 */
56 0x8800 0 0 1 &mpic 1 1 0 0 350 0x8800 0 0 1 &mpic 1 1
57 0x8800 0 0 2 &mpic 2 1 0 0 351 0x8800 0 0 2 &mpic 2 1
58 0x8800 0 0 3 &mpic 3 1 0 0 352 0x8800 0 0 3 &mpic 3 1
59 0x8800 0 0 4 &mpic 4 1 0 0>; 353 0x8800 0 0 4 &mpic 4 1>;
354
355 interrupt-parent = <&mpic>;
356 interrupts = <24 0x2>;
357 bus-range = <0 0xff>;
358 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
359 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
360 clock-frequency = <66666666>;
361 #interrupt-cells = <1>;
362 #size-cells = <2>;
363 #address-cells = <3>;
364 reg = <0xf 0xffe08000 0 0x1000>;
60 }; 365 };
61 366
62 pci1: pcie@ffe09000 { 367 pci1: pcie@fffe09000 {
368 compatible = "fsl,mpc8548-pcie";
369 device_type = "pci";
370 #interrupt-cells = <1>;
371 #size-cells = <2>;
372 #address-cells = <3>;
63 reg = <0xf 0xffe09000 0 0x1000>; 373 reg = <0xf 0xffe09000 0 0x1000>;
374 bus-range = <0 0xff>;
64 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000 375 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
65 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>; 376 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
377 clock-frequency = <33333333>;
378 interrupt-parent = <&mpic>;
379 interrupts = <25 0x2>;
380 interrupt-map-mask = <0xf800 0 0 7>;
381 interrupt-map = <
382 /* IDSEL 0x0 */
383 0000 0 0 1 &mpic 4 1
384 0000 0 0 2 &mpic 5 1
385 0000 0 0 3 &mpic 6 1
386 0000 0 0 4 &mpic 7 1
387 >;
66 pcie@0 { 388 pcie@0 {
389 reg = <0 0 0 0 0>;
390 #size-cells = <2>;
391 #address-cells = <3>;
392 device_type = "pci";
67 ranges = <0x02000000 0 0xf8000000 393 ranges = <0x02000000 0 0xf8000000
68 0x02000000 0 0xf8000000 394 0x02000000 0 0xf8000000
69 0 0x08000000 395 0 0x08000000
@@ -75,10 +401,31 @@
75 }; 401 };
76 402
77 pci2: pcie@fffe0a000 { 403 pci2: pcie@fffe0a000 {
404 compatible = "fsl,mpc8548-pcie";
405 device_type = "pci";
406 #interrupt-cells = <1>;
407 #size-cells = <2>;
408 #address-cells = <3>;
78 reg = <0xf 0xffe0a000 0 0x1000>; 409 reg = <0xf 0xffe0a000 0 0x1000>;
410 bus-range = <0 0xff>;
79 ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000 411 ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
80 0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>; 412 0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
413 clock-frequency = <33333333>;
414 interrupt-parent = <&mpic>;
415 interrupts = <26 0x2>;
416 interrupt-map-mask = <0xf800 0 0 7>;
417 interrupt-map = <
418 /* IDSEL 0x0 */
419 0000 0 0 1 &mpic 0 1
420 0000 0 0 2 &mpic 1 1
421 0000 0 0 3 &mpic 2 1
422 0000 0 0 4 &mpic 3 1
423 >;
81 pcie@0 { 424 pcie@0 {
425 reg = <0 0 0 0 0>;
426 #size-cells = <2>;
427 #address-cells = <3>;
428 device_type = "pci";
82 ranges = <0x02000000 0 0xf8000000 429 ranges = <0x02000000 0 0xf8000000
83 0x02000000 0 0xf8000000 430 0x02000000 0 0xf8000000
84 0 0x08000000 431 0 0x08000000
@@ -90,10 +437,32 @@
90 }; 437 };
91 438
92 pci3: pcie@fffe0b000 { 439 pci3: pcie@fffe0b000 {
440 compatible = "fsl,mpc8548-pcie";
441 device_type = "pci";
442 #interrupt-cells = <1>;
443 #size-cells = <2>;
444 #address-cells = <3>;
93 reg = <0xf 0xffe0b000 0 0x1000>; 445 reg = <0xf 0xffe0b000 0 0x1000>;
446 bus-range = <0 0xff>;
94 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000 447 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
95 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>; 448 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
449 clock-frequency = <33333333>;
450 interrupt-parent = <&mpic>;
451 interrupts = <27 0x2>;
452 interrupt-map-mask = <0xf800 0 0 7>;
453 interrupt-map = <
454 /* IDSEL 0x0 */
455 0000 0 0 1 &mpic 8 1
456 0000 0 0 2 &mpic 9 1
457 0000 0 0 3 &mpic 10 1
458 0000 0 0 4 &mpic 11 1
459 >;
460
96 pcie@0 { 461 pcie@0 {
462 reg = <0 0 0 0 0>;
463 #size-cells = <2>;
464 #address-cells = <3>;
465 device_type = "pci";
97 ranges = <0x02000000 0 0xe0000000 466 ranges = <0x02000000 0 0xe0000000
98 0x02000000 0 0xe0000000 467 0x02000000 0 0xe0000000
99 0 0x20000000 468 0 0x20000000
@@ -104,6 +473,3 @@
104 }; 473 };
105 }; 474 };
106}; 475};
107
108/include/ "fsl/mpc8536si-post.dtsi"
109/include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 2d31863accf..8d1bf0fd926 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -11,8 +11,6 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
16/ { 14/ {
17 model = "MPC8540ADS"; 15 model = "MPC8540ADS";
18 compatible = "MPC8540ADS", "MPC85xxADS"; 16 compatible = "MPC8540ADS", "MPC85xxADS";
@@ -245,7 +243,7 @@
245 serial0: serial@4500 { 243 serial0: serial@4500 {
246 cell-index = <0>; 244 cell-index = <0>;
247 device_type = "serial"; 245 device_type = "serial";
248 compatible = "fsl,ns16550", "ns16550"; 246 compatible = "ns16550";
249 reg = <0x4500 0x100>; // reg base, size 247 reg = <0x4500 0x100>; // reg base, size
250 clock-frequency = <0>; // should we fill in in uboot? 248 clock-frequency = <0>; // should we fill in in uboot?
251 interrupts = <42 2>; 249 interrupts = <42 2>;
@@ -255,7 +253,7 @@
255 serial1: serial@4600 { 253 serial1: serial@4600 {
256 cell-index = <1>; 254 cell-index = <1>;
257 device_type = "serial"; 255 device_type = "serial";
258 compatible = "fsl,ns16550", "ns16550"; 256 compatible = "ns16550";
259 reg = <0x4600 0x100>; // reg base, size 257 reg = <0x4600 0x100>; // reg base, size
260 clock-frequency = <0>; // should we fill in in uboot? 258 clock-frequency = <0>; // should we fill in in uboot?
261 interrupts = <42 2>; 259 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 1c03c266737..87ff96549fa 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -11,8 +11,6 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
16/ { 14/ {
17 model = "MPC8541CDS"; 15 model = "MPC8541CDS";
18 compatible = "MPC8541CDS", "MPC85xxCDS"; 16 compatible = "MPC8541CDS", "MPC85xxCDS";
@@ -211,7 +209,7 @@
211 serial0: serial@4500 { 209 serial0: serial@4500 {
212 cell-index = <0>; 210 cell-index = <0>;
213 device_type = "serial"; 211 device_type = "serial";
214 compatible = "fsl,ns16550", "ns16550"; 212 compatible = "ns16550";
215 reg = <0x4500 0x100>; // reg base, size 213 reg = <0x4500 0x100>; // reg base, size
216 clock-frequency = <0>; // should we fill in in uboot? 214 clock-frequency = <0>; // should we fill in in uboot?
217 interrupts = <42 2>; 215 interrupts = <42 2>;
@@ -221,7 +219,7 @@
221 serial1: serial@4600 { 219 serial1: serial@4600 {
222 cell-index = <1>; 220 cell-index = <1>;
223 device_type = "serial"; 221 device_type = "serial";
224 compatible = "fsl,ns16550", "ns16550"; 222 compatible = "ns16550";
225 reg = <0x4600 0x100>; // reg base, size 223 reg = <0x4600 0x100>; // reg base, size
226 clock-frequency = <0>; // should we fill in in uboot? 224 clock-frequency = <0>; // should we fill in in uboot?
227 interrupts = <42 2>; 225 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index ed38874c3a3..d793968743c 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -9,54 +9,339 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8544si-pre.dtsi" 12/dts-v1/;
13
14/ { 13/ {
15 model = "MPC8544DS"; 14 model = "MPC8544DS";
16 compatible = "MPC8544DS", "MPC85xxDS"; 15 compatible = "MPC8544DS", "MPC85xxDS";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
27 pci3 = &pci3;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 PowerPC,8544@0 {
35 device_type = "cpu";
36 reg = <0x0>;
37 d-cache-line-size = <32>; // 32 bytes
38 i-cache-line-size = <32>; // 32 bytes
39 d-cache-size = <0x8000>; // L1, 32K
40 i-cache-size = <0x8000>; // L1, 32K
41 timebase-frequency = <0>;
42 bus-frequency = <0>;
43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
45 };
46 };
17 47
18 memory { 48 memory {
19 device_type = "memory"; 49 device_type = "memory";
20 reg = <0 0 0 0>; // Filled by U-Boot 50 reg = <0x0 0x0>; // Filled by U-Boot
21 }; 51 };
22 52
23 board_lbc: lbc: localbus@e0005000 { 53 soc8544@e0000000 {
24 reg = <0 0xe0005000 0 0x1000>; 54 #address-cells = <1>;
55 #size-cells = <1>;
56 device_type = "soc";
57 compatible = "simple-bus";
25 58
26 ranges = <0x0 0x0 0x0 0xff800000 0x800000>; 59 ranges = <0x0 0xe0000000 0x100000>;
27 }; 60 bus-frequency = <0>; // Filled out by uboot.
61
62 ecm-law@0 {
63 compatible = "fsl,ecm-law";
64 reg = <0x0 0x1000>;
65 fsl,num-laws = <10>;
66 };
67
68 ecm@1000 {
69 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
70 reg = <0x1000 0x1000>;
71 interrupts = <17 2>;
72 interrupt-parent = <&mpic>;
73 };
74
75 memory-controller@2000 {
76 compatible = "fsl,mpc8544-memory-controller";
77 reg = <0x2000 0x1000>;
78 interrupt-parent = <&mpic>;
79 interrupts = <18 2>;
80 };
81
82 L2: l2-cache-controller@20000 {
83 compatible = "fsl,mpc8544-l2-cache-controller";
84 reg = <0x20000 0x1000>;
85 cache-line-size = <32>; // 32 bytes
86 cache-size = <0x40000>; // L2, 256K
87 interrupt-parent = <&mpic>;
88 interrupts = <16 2>;
89 };
90
91 i2c@3000 {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 cell-index = <0>;
95 compatible = "fsl-i2c";
96 reg = <0x3000 0x100>;
97 interrupts = <43 2>;
98 interrupt-parent = <&mpic>;
99 dfsrr;
100 };
101
102 i2c@3100 {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 cell-index = <1>;
106 compatible = "fsl-i2c";
107 reg = <0x3100 0x100>;
108 interrupts = <43 2>;
109 interrupt-parent = <&mpic>;
110 dfsrr;
111 };
112
113 dma@21300 {
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma";
117 reg = <0x21300 0x4>;
118 ranges = <0x0 0x21100 0x200>;
119 cell-index = <0>;
120 dma-channel@0 {
121 compatible = "fsl,mpc8544-dma-channel",
122 "fsl,eloplus-dma-channel";
123 reg = <0x0 0x80>;
124 cell-index = <0>;
125 interrupt-parent = <&mpic>;
126 interrupts = <20 2>;
127 };
128 dma-channel@80 {
129 compatible = "fsl,mpc8544-dma-channel",
130 "fsl,eloplus-dma-channel";
131 reg = <0x80 0x80>;
132 cell-index = <1>;
133 interrupt-parent = <&mpic>;
134 interrupts = <21 2>;
135 };
136 dma-channel@100 {
137 compatible = "fsl,mpc8544-dma-channel",
138 "fsl,eloplus-dma-channel";
139 reg = <0x100 0x80>;
140 cell-index = <2>;
141 interrupt-parent = <&mpic>;
142 interrupts = <22 2>;
143 };
144 dma-channel@180 {
145 compatible = "fsl,mpc8544-dma-channel",
146 "fsl,eloplus-dma-channel";
147 reg = <0x180 0x80>;
148 cell-index = <3>;
149 interrupt-parent = <&mpic>;
150 interrupts = <23 2>;
151 };
152 };
153
154 enet0: ethernet@24000 {
155 #address-cells = <1>;
156 #size-cells = <1>;
157 cell-index = <0>;
158 device_type = "network";
159 model = "TSEC";
160 compatible = "gianfar";
161 reg = <0x24000 0x1000>;
162 ranges = <0x0 0x24000 0x1000>;
163 local-mac-address = [ 00 00 00 00 00 00 ];
164 interrupts = <29 2 30 2 34 2>;
165 interrupt-parent = <&mpic>;
166 phy-handle = <&phy0>;
167 tbi-handle = <&tbi0>;
168 phy-connection-type = "rgmii-id";
169
170 mdio@520 {
171 #address-cells = <1>;
172 #size-cells = <0>;
173 compatible = "fsl,gianfar-mdio";
174 reg = <0x520 0x20>;
175
176 phy0: ethernet-phy@0 {
177 interrupt-parent = <&mpic>;
178 interrupts = <10 1>;
179 reg = <0x0>;
180 device_type = "ethernet-phy";
181 };
182 phy1: ethernet-phy@1 {
183 interrupt-parent = <&mpic>;
184 interrupts = <10 1>;
185 reg = <0x1>;
186 device_type = "ethernet-phy";
187 };
188
189 tbi0: tbi-phy@11 {
190 reg = <0x11>;
191 device_type = "tbi-phy";
192 };
193 };
194 };
195
196 enet1: ethernet@26000 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 cell-index = <1>;
200 device_type = "network";
201 model = "TSEC";
202 compatible = "gianfar";
203 reg = <0x26000 0x1000>;
204 ranges = <0x0 0x26000 0x1000>;
205 local-mac-address = [ 00 00 00 00 00 00 ];
206 interrupts = <31 2 32 2 33 2>;
207 interrupt-parent = <&mpic>;
208 phy-handle = <&phy1>;
209 tbi-handle = <&tbi1>;
210 phy-connection-type = "rgmii-id";
211
212 mdio@520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-tbi";
216 reg = <0x520 0x20>;
217
218 tbi1: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
223 };
224
225 serial0: serial@4500 {
226 cell-index = <0>;
227 device_type = "serial";
228 compatible = "ns16550";
229 reg = <0x4500 0x100>;
230 clock-frequency = <0>;
231 interrupts = <42 2>;
232 interrupt-parent = <&mpic>;
233 };
28 234
29 board_soc: soc: soc8544@e0000000 { 235 serial1: serial@4600 {
30 ranges = <0x0 0x0 0xe0000000 0x100000>; 236 cell-index = <1>;
237 device_type = "serial";
238 compatible = "ns16550";
239 reg = <0x4600 0x100>;
240 clock-frequency = <0>;
241 interrupts = <42 2>;
242 interrupt-parent = <&mpic>;
243 };
244
245 global-utilities@e0000 { //global utilities block
246 compatible = "fsl,mpc8548-guts";
247 reg = <0xe0000 0x1000>;
248 fsl,has-rstcr;
249 };
250
251 crypto@30000 {
252 compatible = "fsl,sec2.1", "fsl,sec2.0";
253 reg = <0x30000 0x10000>;
254 interrupts = <45 2>;
255 interrupt-parent = <&mpic>;
256 fsl,num-channels = <4>;
257 fsl,channel-fifo-len = <24>;
258 fsl,exec-units-mask = <0xfe>;
259 fsl,descriptor-types-mask = <0x12b0ebf>;
260 };
261
262 mpic: pic@40000 {
263 interrupt-controller;
264 #address-cells = <0>;
265 #interrupt-cells = <2>;
266 reg = <0x40000 0x40000>;
267 compatible = "chrp,open-pic";
268 device_type = "open-pic";
269 };
270
271 msi@41600 {
272 compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
273 reg = <0x41600 0x80>;
274 msi-available-ranges = <0 0x100>;
275 interrupts = <
276 0xe0 0
277 0xe1 0
278 0xe2 0
279 0xe3 0
280 0xe4 0
281 0xe5 0
282 0xe6 0
283 0xe7 0>;
284 interrupt-parent = <&mpic>;
285 };
31 }; 286 };
32 287
33 pci0: pci@e0008000 { 288 pci0: pci@e0008000 {
34 reg = <0 0xe0008000 0 0x1000>; 289 compatible = "fsl,mpc8540-pci";
35 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 290 device_type = "pci";
36 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
37 clock-frequency = <66666666>;
38 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 291 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
39 interrupt-map = < 292 interrupt-map = <
40 293
41 /* IDSEL 0x11 J17 Slot 1 */ 294 /* IDSEL 0x11 J17 Slot 1 */
42 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 295 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
43 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 296 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
44 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 297 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
45 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 298 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
46 299
47 /* IDSEL 0x12 J16 Slot 2 */ 300 /* IDSEL 0x12 J16 Slot 2 */
48 301
49 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 302 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
50 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 303 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
51 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 304 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
52 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>; 305 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
306
307 interrupt-parent = <&mpic>;
308 interrupts = <24 2>;
309 bus-range = <0 255>;
310 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
311 0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
312 clock-frequency = <66666666>;
313 #interrupt-cells = <1>;
314 #size-cells = <2>;
315 #address-cells = <3>;
316 reg = <0xe0008000 0x1000>;
53 }; 317 };
54 318
55 pci1: pcie@e0009000 { 319 pci1: pcie@e0009000 {
56 reg = <0x0 0xe0009000 0x0 0x1000>; 320 compatible = "fsl,mpc8548-pcie";
57 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 321 device_type = "pci";
58 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>; 322 #interrupt-cells = <1>;
323 #size-cells = <2>;
324 #address-cells = <3>;
325 reg = <0xe0009000 0x1000>;
326 bus-range = <0 255>;
327 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
328 0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
329 clock-frequency = <33333333>;
330 interrupt-parent = <&mpic>;
331 interrupts = <25 2>;
332 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
333 interrupt-map = <
334 /* IDSEL 0x0 */
335 0000 0x0 0x0 0x1 &mpic 0x4 0x1
336 0000 0x0 0x0 0x2 &mpic 0x5 0x1
337 0000 0x0 0x0 0x3 &mpic 0x6 0x1
338 0000 0x0 0x0 0x4 &mpic 0x7 0x1
339 >;
59 pcie@0 { 340 pcie@0 {
341 reg = <0x0 0x0 0x0 0x0 0x0>;
342 #size-cells = <2>;
343 #address-cells = <3>;
344 device_type = "pci";
60 ranges = <0x2000000 0x0 0x80000000 345 ranges = <0x2000000 0x0 0x80000000
61 0x2000000 0x0 0x80000000 346 0x2000000 0x0 0x80000000
62 0x0 0x20000000 347 0x0 0x20000000
@@ -68,10 +353,31 @@
68 }; 353 };
69 354
70 pci2: pcie@e000a000 { 355 pci2: pcie@e000a000 {
71 reg = <0x0 0xe000a000 0x0 0x1000>; 356 compatible = "fsl,mpc8548-pcie";
72 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 357 device_type = "pci";
73 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>; 358 #interrupt-cells = <1>;
359 #size-cells = <2>;
360 #address-cells = <3>;
361 reg = <0xe000a000 0x1000>;
362 bus-range = <0 255>;
363 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
364 0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
365 clock-frequency = <33333333>;
366 interrupt-parent = <&mpic>;
367 interrupts = <26 2>;
368 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
369 interrupt-map = <
370 /* IDSEL 0x0 */
371 0000 0x0 0x0 0x1 &mpic 0x0 0x1
372 0000 0x0 0x0 0x2 &mpic 0x1 0x1
373 0000 0x0 0x0 0x3 &mpic 0x2 0x1
374 0000 0x0 0x0 0x4 &mpic 0x3 0x1
375 >;
74 pcie@0 { 376 pcie@0 {
377 reg = <0x0 0x0 0x0 0x0 0x0>;
378 #size-cells = <2>;
379 #address-cells = <3>;
380 device_type = "pci";
75 ranges = <0x2000000 0x0 0xa0000000 381 ranges = <0x2000000 0x0 0xa0000000
76 0x2000000 0x0 0xa0000000 382 0x2000000 0x0 0xa0000000
77 0x0 0x10000000 383 0x0 0x10000000
@@ -82,11 +388,44 @@
82 }; 388 };
83 }; 389 };
84 390
85 board_pci3: pci3: pcie@e000b000 { 391 pci3: pcie@e000b000 {
86 reg = <0x0 0xe000b000 0x0 0x1000>; 392 compatible = "fsl,mpc8548-pcie";
87 ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000 393 device_type = "pci";
88 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>; 394 #interrupt-cells = <1>;
395 #size-cells = <2>;
396 #address-cells = <3>;
397 reg = <0xe000b000 0x1000>;
398 bus-range = <0 255>;
399 ranges = <0x2000000 0x0 0xb0000000 0xb0000000 0x0 0x100000
400 0x1000000 0x0 0x0 0xb0100000 0x0 0x100000>;
401 clock-frequency = <33333333>;
402 interrupt-parent = <&mpic>;
403 interrupts = <27 2>;
404 interrupt-map-mask = <0xff00 0x0 0x0 0x1>;
405 interrupt-map = <
406 // IDSEL 0x1c USB
407 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
408 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
409 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
410 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
411
412 // IDSEL 0x1d Audio
413 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
414
415 // IDSEL 0x1e Legacy
416 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
417 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
418
419 // IDSEL 0x1f IDE/SATA
420 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
421 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
422 >;
423
89 pcie@0 { 424 pcie@0 {
425 reg = <0x0 0x0 0x0 0x0 0x0>;
426 #size-cells = <2>;
427 #address-cells = <3>;
428 device_type = "pci";
90 ranges = <0x2000000 0x0 0xb0000000 429 ranges = <0x2000000 0x0 0xb0000000
91 0x2000000 0x0 0xb0000000 430 0x2000000 0x0 0xb0000000
92 0x0 0x100000 431 0x0 0x100000
@@ -94,14 +433,70 @@
94 0x1000000 0x0 0x0 433 0x1000000 0x0 0x0
95 0x1000000 0x0 0x0 434 0x1000000 0x0 0x0
96 0x0 0x100000>; 435 0x0 0x100000>;
436
437 uli1575@0 {
438 reg = <0x0 0x0 0x0 0x0 0x0>;
439 #size-cells = <2>;
440 #address-cells = <3>;
441 ranges = <0x2000000 0x0 0xb0000000
442 0x2000000 0x0 0xb0000000
443 0x0 0x100000
444
445 0x1000000 0x0 0x0
446 0x1000000 0x0 0x0
447 0x0 0x100000>;
448 isa@1e {
449 device_type = "isa";
450 #interrupt-cells = <2>;
451 #size-cells = <1>;
452 #address-cells = <2>;
453 reg = <0xf000 0x0 0x0 0x0 0x0>;
454 ranges = <0x1 0x0
455 0x1000000 0x0 0x0
456 0x1000>;
457 interrupt-parent = <&i8259>;
458
459 i8259: interrupt-controller@20 {
460 reg = <0x1 0x20 0x2
461 0x1 0xa0 0x2
462 0x1 0x4d0 0x2>;
463 interrupt-controller;
464 device_type = "interrupt-controller";
465 #address-cells = <0>;
466 #interrupt-cells = <2>;
467 compatible = "chrp,iic";
468 interrupts = <9 2>;
469 interrupt-parent = <&mpic>;
470 };
471
472 i8042@60 {
473 #size-cells = <0>;
474 #address-cells = <1>;
475 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
476 interrupts = <1 3 12 3>;
477 interrupt-parent = <&i8259>;
478
479 keyboard@0 {
480 reg = <0x0>;
481 compatible = "pnpPNP,303";
482 };
483
484 mouse@1 {
485 reg = <0x1>;
486 compatible = "pnpPNP,f03";
487 };
488 };
489
490 rtc@70 {
491 compatible = "pnpPNP,b00";
492 reg = <0x1 0x70 0x2>;
493 };
494
495 gpio@400 {
496 reg = <0x1 0x400 0x80>;
497 };
498 };
499 };
97 }; 500 };
98 }; 501 };
99}; 502};
100
101/*
102 * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
103 * for interrupt-map & interrupt-map-mask
104 */
105
106/include/ "fsl/mpc8544si-post.dtsi"
107/include/ "mpc8544ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
deleted file mode 100644
index b219d035d79..00000000000
--- a/arch/powerpc/boot/dts/mpc8544ds.dtsi
+++ /dev/null
@@ -1,209 +0,0 @@
1/*
2 * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x800000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 reg = <0x0 0x10000>;
46 label = "dtb-nor";
47 };
48
49 partition@20000 {
50 reg = <0x20000 0x30000>;
51 label = "diagnostic-nor";
52 read-only;
53 };
54
55 partition@200000 {
56 reg = <0x200000 0x200000>;
57 label = "dink-nor";
58 read-only;
59 };
60
61 partition@400000 {
62 reg = <0x400000 0x380000>;
63 label = "kernel-nor";
64 };
65
66 partition@780000 {
67 reg = <0x780000 0x80000>;
68 label = "u-boot-nor";
69 read-only;
70 };
71 };
72};
73
74&board_soc {
75 enet0: ethernet@24000 {
76 phy-handle = <&phy0>;
77 tbi-handle = <&tbi0>;
78 phy-connection-type = "rgmii-id";
79 };
80
81 mdio@24520 {
82 phy0: ethernet-phy@0 {
83 interrupts = <10 1 0 0>;
84 reg = <0x0>;
85 device_type = "ethernet-phy";
86 };
87 phy1: ethernet-phy@1 {
88 interrupts = <10 1 0 0>;
89 reg = <0x1>;
90 device_type = "ethernet-phy";
91 };
92
93 sgmii_phy0: sgmii-phy@0 {
94 interrupts = <6 1 0 0>;
95 reg = <0x1c>;
96 };
97 sgmii_phy1: sgmii-phy@1 {
98 interrupts = <6 1 0 0>;
99 reg = <0x1d>;
100 };
101
102 tbi0: tbi-phy@11 {
103 reg = <0x11>;
104 device_type = "tbi-phy";
105 };
106 };
107
108 enet2: ethernet@26000 {
109 phy-handle = <&phy1>;
110 tbi-handle = <&tbi1>;
111 phy-connection-type = "rgmii-id";
112 };
113
114 mdio@26520 {
115 tbi1: tbi-phy@11 {
116 reg = <0x11>;
117 device_type = "tbi-phy";
118 };
119 };
120};
121
122&board_pci3 {
123 pcie@0 {
124 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
125 interrupt-map = <
126 // IDSEL 0x1c USB
127 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
128 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
129 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
130 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
131
132 // IDSEL 0x1d Audio
133 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
134
135 // IDSEL 0x1e Legacy
136 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
137 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
138
139 // IDSEL 0x1f IDE/SATA
140 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
141 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
142 >;
143
144
145 uli1575@0 {
146 reg = <0x0 0x0 0x0 0x0 0x0>;
147 #size-cells = <2>;
148 #address-cells = <3>;
149 ranges = <0x2000000 0x0 0xb0000000
150 0x2000000 0x0 0xb0000000
151 0x0 0x100000
152
153 0x1000000 0x0 0x0
154 0x1000000 0x0 0x0
155 0x0 0x100000>;
156 isa@1e {
157 device_type = "isa";
158 #interrupt-cells = <2>;
159 #size-cells = <1>;
160 #address-cells = <2>;
161 reg = <0xf000 0x0 0x0 0x0 0x0>;
162 ranges = <0x1 0x0 0x1000000 0x0 0x0
163 0x1000>;
164 interrupt-parent = <&i8259>;
165
166 i8259: interrupt-controller@20 {
167 reg = <0x1 0x20 0x2
168 0x1 0xa0 0x2
169 0x1 0x4d0 0x2>;
170 interrupt-controller;
171 device_type = "interrupt-controller";
172 #address-cells = <0>;
173 #interrupt-cells = <2>;
174 compatible = "chrp,iic";
175 interrupts = <9 2 0 0>;
176 interrupt-parent = <&mpic>;
177 };
178
179 i8042@60 {
180 #size-cells = <0>;
181 #address-cells = <1>;
182 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
183 interrupts = <1 3 12 3>;
184 interrupt-parent =
185 <&i8259>;
186
187 keyboard@0 {
188 reg = <0x0>;
189 compatible = "pnpPNP,303";
190 };
191
192 mouse@1 {
193 reg = <0x1>;
194 compatible = "pnpPNP,f03";
195 };
196 };
197
198 rtc@70 {
199 compatible = "pnpPNP,b00";
200 reg = <0x1 0x70 0x2>;
201 };
202
203 gpio@400 {
204 reg = <0x1 0x400 0x80>;
205 };
206 };
207 };
208 };
209};
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dtsi b/arch/powerpc/boot/dts/mpc8548cds.dtsi
deleted file mode 100644
index c61f525e474..00000000000
--- a/arch/powerpc/boot/dts/mpc8548cds.dtsi
+++ /dev/null
@@ -1,306 +0,0 @@
1/*
2 * MPC8548CDS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x01000000>;
41 bank-width = <2>;
42 device-width = <2>;
43
44 partition@0 {
45 reg = <0x0 0x0b00000>;
46 label = "ramdisk-nor";
47 };
48
49 partition@300000 {
50 reg = <0x0b00000 0x0400000>;
51 label = "kernel-nor";
52 };
53
54 partition@700000 {
55 reg = <0x0f00000 0x060000>;
56 label = "dtb-nor";
57 };
58
59 partition@760000 {
60 reg = <0x0f60000 0x020000>;
61 label = "env-nor";
62 read-only;
63 };
64
65 partition@780000 {
66 reg = <0x0f80000 0x080000>;
67 label = "u-boot-nor";
68 read-only;
69 };
70 };
71
72 board-control@1,0 {
73 compatible = "fsl,mpc8548cds-fpga";
74 reg = <0x1 0x0 0x1000>;
75 };
76};
77
78&board_soc {
79 i2c@3000 {
80 eeprom@50 {
81 compatible = "atmel,24c64";
82 reg = <0x50>;
83 };
84
85 eeprom@56 {
86 compatible = "atmel,24c64";
87 reg = <0x56>;
88 };
89
90 eeprom@57 {
91 compatible = "atmel,24c64";
92 reg = <0x57>;
93 };
94 };
95
96 i2c@3100 {
97 eeprom@50 {
98 compatible = "atmel,24c64";
99 reg = <0x50>;
100 };
101 };
102
103 enet0: ethernet@24000 {
104 tbi-handle = <&tbi0>;
105 phy-handle = <&phy0>;
106 };
107
108 mdio@24520 {
109 phy0: ethernet-phy@0 {
110 interrupts = <5 1 0 0>;
111 reg = <0x0>;
112 device_type = "ethernet-phy";
113 };
114 phy1: ethernet-phy@1 {
115 interrupts = <5 1 0 0>;
116 reg = <0x1>;
117 device_type = "ethernet-phy";
118 };
119 phy2: ethernet-phy@2 {
120 interrupts = <5 1 0 0>;
121 reg = <0x2>;
122 device_type = "ethernet-phy";
123 };
124 phy3: ethernet-phy@3 {
125 interrupts = <5 1 0 0>;
126 reg = <0x3>;
127 device_type = "ethernet-phy";
128 };
129 tbi0: tbi-phy@11 {
130 reg = <0x11>;
131 device_type = "tbi-phy";
132 };
133 };
134
135 enet1: ethernet@25000 {
136 tbi-handle = <&tbi1>;
137 phy-handle = <&phy1>;
138 };
139
140 mdio@25520 {
141 tbi1: tbi-phy@11 {
142 reg = <0x11>;
143 device_type = "tbi-phy";
144 };
145 };
146
147 enet2: ethernet@26000 {
148 tbi-handle = <&tbi2>;
149 phy-handle = <&phy2>;
150 };
151
152 mdio@26520 {
153 tbi2: tbi-phy@11 {
154 reg = <0x11>;
155 device_type = "tbi-phy";
156 };
157 };
158
159 enet3: ethernet@27000 {
160 tbi-handle = <&tbi3>;
161 phy-handle = <&phy3>;
162 };
163
164 mdio@27520 {
165 tbi3: tbi-phy@11 {
166 reg = <0x11>;
167 device_type = "tbi-phy";
168 };
169 };
170};
171
172&board_pci0 {
173 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
174 interrupt-map = <
175 /* IDSEL 0x4 (PCIX Slot 2) */
176 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
177 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
178 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
179 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
180
181 /* IDSEL 0x5 (PCIX Slot 3) */
182 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
183 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
184 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
185 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
186
187 /* IDSEL 0x6 (PCIX Slot 4) */
188 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
189 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
190 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
191 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
192
193 /* IDSEL 0x8 (PCIX Slot 5) */
194 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
195 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
196 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
197 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
198
199 /* IDSEL 0xC (Tsi310 bridge) */
200 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
201 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
202 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
203 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
204
205 /* IDSEL 0x14 (Slot 2) */
206 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
207 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
208 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
209 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
210
211 /* IDSEL 0x15 (Slot 3) */
212 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
213 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
214 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
215 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
216
217 /* IDSEL 0x16 (Slot 4) */
218 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
219 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
220 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
221 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
222
223 /* IDSEL 0x18 (Slot 5) */
224 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
225 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
226 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
227 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
228
229 /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
230 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
231 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
232 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
233 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
234
235 pci_bridge@1c {
236 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
237 interrupt-map = <
238
239 /* IDSEL 0x00 (PrPMC Site) */
240 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
241 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
242 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
243 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
244
245 /* IDSEL 0x04 (VIA chip) */
246 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
247 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
248 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
249 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
250
251 /* IDSEL 0x05 (8139) */
252 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
253
254 /* IDSEL 0x06 (Slot 6) */
255 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
256 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
257 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
258 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
259
260 /* IDESL 0x07 (Slot 7) */
261 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
262 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
263 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
264 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
265
266 reg = <0xe000 0x0 0x0 0x0 0x0>;
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 ranges = <0x2000000 0x0 0x80000000
271 0x2000000 0x0 0x80000000
272 0x0 0x20000000
273 0x1000000 0x0 0x0
274 0x1000000 0x0 0x0
275 0x0 0x80000>;
276 clock-frequency = <33333333>;
277
278 isa@4 {
279 device_type = "isa";
280 #interrupt-cells = <2>;
281 #size-cells = <1>;
282 #address-cells = <2>;
283 reg = <0x2000 0x0 0x0 0x0 0x0>;
284 ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>;
285 interrupt-parent = <&i8259>;
286
287 i8259: interrupt-controller@20 {
288 interrupt-controller;
289 device_type = "interrupt-controller";
290 reg = <0x1 0x20 0x2
291 0x1 0xa0 0x2
292 0x1 0x4d0 0x2>;
293 #address-cells = <0>;
294 #interrupt-cells = <2>;
295 compatible = "chrp,iic";
296 interrupts = <0 1 0 0>;
297 interrupt-parent = <&mpic>;
298 };
299
300 rtc@70 {
301 compatible = "pnpPNP,b00";
302 reg = <0x1 0x70 0x2>;
303 };
304 };
305 };
306};
diff --git a/arch/powerpc/boot/dts/mpc8548cds_32b.dts b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
deleted file mode 100644
index 6fd63163fc6..00000000000
--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * MPC8548 CDS Device Tree Source (32-bit address map)
3 *
4 * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/mpc8548si-pre.dtsi"
13
14/ {
15 model = "MPC8548CDS";
16 compatible = "MPC8548CDS", "MPC85xxCDS";
17
18 memory {
19 device_type = "memory";
20 reg = <0 0 0x0 0x8000000>; // 128M at 0x0
21 };
22
23 board_lbc: lbc: localbus@e0005000 {
24 reg = <0 0xe0005000 0 0x1000>;
25
26 ranges = <0x0 0x0 0x0 0xff000000 0x01000000
27 0x1 0x0 0x0 0xf8004000 0x00001000>;
28
29 };
30
31 board_soc: soc: soc8548@e0000000 {
32 ranges = <0 0x0 0xe0000000 0x100000>;
33 };
34
35 board_pci0: pci0: pci@e0008000 {
36 reg = <0 0xe0008000 0 0x1000>;
37 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
38 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
39 clock-frequency = <66666666>;
40 };
41
42 pci1: pci@e0009000 {
43 reg = <0 0xe0009000 0 0x1000>;
44 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
45 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
46 clock-frequency = <66666666>;
47 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
48 interrupt-map = <
49
50 /* IDSEL 0x15 */
51 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
52 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
53 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
54 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
55 };
56
57 pci2: pcie@e000a000 {
58 reg = <0 0xe000a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 rio: rapidio@e00c0000 {
73 reg = <0x0 0xe00c0000 0x0 0x20000>;
74 port1 {
75 ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
76 };
77 };
78};
79
80/*
81 * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
82 * for interrupt-map & interrupt-map-mask.
83 */
84
85/include/ "fsl/mpc8548si-post.dtsi"
86/include/ "mpc8548cds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8548cds_36b.dts b/arch/powerpc/boot/dts/mpc8548cds_36b.dts
deleted file mode 100644
index 10e551b11bd..00000000000
--- a/arch/powerpc/boot/dts/mpc8548cds_36b.dts
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * MPC8548 CDS Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/mpc8548si-pre.dtsi"
13
14/ {
15 model = "MPC8548CDS";
16 compatible = "MPC8548CDS", "MPC85xxCDS";
17
18 memory {
19 device_type = "memory";
20 reg = <0 0 0x0 0x8000000>; // 128M at 0x0
21 };
22
23 board_lbc: lbc: localbus@fe0005000 {
24 reg = <0xf 0xe0005000 0 0x1000>;
25
26 ranges = <0x0 0x0 0xf 0xff000000 0x01000000
27 0x1 0x0 0xf 0xf8004000 0x00001000>;
28
29 };
30
31 board_soc: soc: soc8548@fe0000000 {
32 ranges = <0 0xf 0xe0000000 0x100000>;
33 };
34
35 board_pci0: pci0: pci@fe0008000 {
36 reg = <0xf 0xe0008000 0 0x1000>;
37 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
38 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
39 clock-frequency = <66666666>;
40 };
41
42 pci1: pci@fe0009000 {
43 reg = <0xf 0xe0009000 0 0x1000>;
44 ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
45 0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
46 clock-frequency = <66666666>;
47 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
48 interrupt-map = <
49
50 /* IDSEL 0x15 */
51 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
52 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
53 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
54 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
55 };
56
57 pci2: pcie@fe000a000 {
58 reg = <0xf 0xe000a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 rio: rapidio@fe00c0000 {
73 reg = <0xf 0xe00c0000 0x0 0x20000>;
74 port1 {
75 ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
76 };
77 };
78};
79
80/*
81 * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
82 * for interrupt-map & interrupt-map-mask.
83 */
84
85/include/ "fsl/mpc8548si-post.dtsi"
86/include/ "mpc8548cds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 36a7ea138c2..5c5614f9eb1 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -11,8 +11,6 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
16/ { 14/ {
17 model = "MPC8555CDS"; 15 model = "MPC8555CDS";
18 compatible = "MPC8555CDS", "MPC85xxCDS"; 16 compatible = "MPC8555CDS", "MPC85xxCDS";
@@ -211,7 +209,7 @@
211 serial0: serial@4500 { 209 serial0: serial@4500 {
212 cell-index = <0>; 210 cell-index = <0>;
213 device_type = "serial"; 211 device_type = "serial";
214 compatible = "fsl,ns16550", "ns16550"; 212 compatible = "ns16550";
215 reg = <0x4500 0x100>; // reg base, size 213 reg = <0x4500 0x100>; // reg base, size
216 clock-frequency = <0>; // should we fill in in uboot? 214 clock-frequency = <0>; // should we fill in in uboot?
217 interrupts = <42 2>; 215 interrupts = <42 2>;
@@ -221,7 +219,7 @@
221 serial1: serial@4600 { 219 serial1: serial@4600 {
222 cell-index = <1>; 220 cell-index = <1>;
223 device_type = "serial"; 221 device_type = "serial";
224 compatible = "fsl,ns16550", "ns16550"; 222 compatible = "ns16550";
225 reg = <0x4600 0x100>; // reg base, size 223 reg = <0x4600 0x100>; // reg base, size
226 clock-frequency = <0>; // should we fill in in uboot? 224 clock-frequency = <0>; // should we fill in in uboot?
227 interrupts = <42 2>; 225 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 1a43f5a968f..6e85e1ba085 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -11,8 +11,6 @@
11 11
12/dts-v1/; 12/dts-v1/;
13 13
14/include/ "fsl/e500v2_power_isa.dtsi"
15
16/ { 14/ {
17 model = "MPC8560ADS"; 15 model = "MPC8560ADS";
18 compatible = "MPC8560ADS", "MPC85xxADS"; 16 compatible = "MPC8560ADS", "MPC85xxADS";
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 09598bb5d44..647daf8e729 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -9,25 +9,60 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8568si-pre.dtsi" 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "MPC8568EMDS"; 15 model = "MPC8568EMDS";
16 compatible = "MPC8568EMDS", "MPC85xxMDS"; 16 compatible = "MPC8568EMDS", "MPC85xxMDS";
17 #address-cells = <1>;
18 #size-cells = <1>;
17 19
18 aliases { 20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 ethernet3 = &enet3;
25 serial0 = &serial0;
26 serial1 = &serial1;
19 pci0 = &pci0; 27 pci0 = &pci0;
20 pci1 = &pci1; 28 pci1 = &pci1;
21 rapidio0 = &rio; 29 rapidio0 = &rio0;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8568@0 {
37 device_type = "cpu";
38 reg = <0x0>;
39 d-cache-line-size = <32>; // 32 bytes
40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 sleep = <&pmc 0x00008000 // core
44 &pmc 0x00004000>; // timebase
45 timebase-frequency = <0>;
46 bus-frequency = <0>;
47 clock-frequency = <0>;
48 next-level-cache = <&L2>;
49 };
22 }; 50 };
23 51
24 memory { 52 memory {
25 device_type = "memory"; 53 device_type = "memory";
26 reg = <0x0 0x0 0x0 0x0>; 54 reg = <0x0 0x10000000>;
27 }; 55 };
28 56
29 lbc: localbus@e0005000 { 57 localbus@e0005000 {
30 reg = <0x0 0xe0005000 0x0 0x1000>; 58 #address-cells = <2>;
59 #size-cells = <1>;
60 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus",
61 "simple-bus";
62 reg = <0xe0005000 0x1000>;
63 interrupt-parent = <&mpic>;
64 interrupts = <19 2>;
65
31 ranges = <0x0 0x0 0xfe000000 0x02000000 66 ranges = <0x0 0x0 0xfe000000 0x02000000
32 0x1 0x0 0xf8000000 0x00008000 67 0x1 0x0 0xf8000000 0x00008000
33 0x2 0x0 0xf0000000 0x04000000 68 0x2 0x0 0xf0000000 0x04000000
@@ -69,65 +104,288 @@
69 }; 104 };
70 }; 105 };
71 106
72 soc: soc8568@e0000000 { 107 soc8568@e0000000 {
73 ranges = <0x0 0x0 0xe0000000 0x100000>; 108 #address-cells = <1>;
109 #size-cells = <1>;
110 device_type = "soc";
111 compatible = "simple-bus";
112 ranges = <0x0 0xe0000000 0x100000>;
113 bus-frequency = <0>;
114
115 ecm-law@0 {
116 compatible = "fsl,ecm-law";
117 reg = <0x0 0x1000>;
118 fsl,num-laws = <10>;
119 };
120
121 ecm@1000 {
122 compatible = "fsl,mpc8568-ecm", "fsl,ecm";
123 reg = <0x1000 0x1000>;
124 interrupts = <17 2>;
125 interrupt-parent = <&mpic>;
126 };
127
128 memory-controller@2000 {
129 compatible = "fsl,mpc8568-memory-controller";
130 reg = <0x2000 0x1000>;
131 interrupt-parent = <&mpic>;
132 interrupts = <18 2>;
133 };
134
135 L2: l2-cache-controller@20000 {
136 compatible = "fsl,mpc8568-l2-cache-controller";
137 reg = <0x20000 0x1000>;
138 cache-line-size = <32>; // 32 bytes
139 cache-size = <0x80000>; // L2, 512K
140 interrupt-parent = <&mpic>;
141 interrupts = <16 2>;
142 };
74 143
75 i2c-sleep-nexus { 144 i2c-sleep-nexus {
145 #address-cells = <1>;
146 #size-cells = <1>;
147 compatible = "simple-bus";
148 sleep = <&pmc 0x00000004>;
149 ranges;
150
76 i2c@3000 { 151 i2c@3000 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 cell-index = <0>;
155 compatible = "fsl-i2c";
156 reg = <0x3000 0x100>;
157 interrupts = <43 2>;
158 interrupt-parent = <&mpic>;
159 dfsrr;
160
77 rtc@68 { 161 rtc@68 {
78 compatible = "dallas,ds1374"; 162 compatible = "dallas,ds1374";
79 reg = <0x68>; 163 reg = <0x68>;
80 interrupts = <3 1 0 0>; 164 interrupts = <3 1>;
165 interrupt-parent = <&mpic>;
81 }; 166 };
82 }; 167 };
83 };
84 168
85 enet0: ethernet@24000 { 169 i2c@3100 {
86 tbi-handle = <&tbi0>; 170 #address-cells = <1>;
87 phy-handle = <&phy2>; 171 #size-cells = <0>;
172 cell-index = <1>;
173 compatible = "fsl-i2c";
174 reg = <0x3100 0x100>;
175 interrupts = <43 2>;
176 interrupt-parent = <&mpic>;
177 dfsrr;
178 };
88 }; 179 };
89 180
90 mdio@24520 { 181 dma@21300 {
91 phy0: ethernet-phy@7 { 182 #address-cells = <1>;
92 interrupts = <1 1 0 0>; 183 #size-cells = <1>;
93 reg = <0x7>; 184 compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
94 device_type = "ethernet-phy"; 185 reg = <0x21300 0x4>;
186 ranges = <0x0 0x21100 0x200>;
187 cell-index = <0>;
188 sleep = <&pmc 0x00000400>;
189
190 dma-channel@0 {
191 compatible = "fsl,mpc8568-dma-channel",
192 "fsl,eloplus-dma-channel";
193 reg = <0x0 0x80>;
194 cell-index = <0>;
195 interrupt-parent = <&mpic>;
196 interrupts = <20 2>;
95 }; 197 };
96 phy1: ethernet-phy@1 { 198 dma-channel@80 {
97 interrupts = <2 1 0 0>; 199 compatible = "fsl,mpc8568-dma-channel",
98 reg = <0x1>; 200 "fsl,eloplus-dma-channel";
99 device_type = "ethernet-phy"; 201 reg = <0x80 0x80>;
202 cell-index = <1>;
203 interrupt-parent = <&mpic>;
204 interrupts = <21 2>;
100 }; 205 };
101 phy2: ethernet-phy@2 { 206 dma-channel@100 {
102 interrupts = <1 1 0 0>; 207 compatible = "fsl,mpc8568-dma-channel",
103 reg = <0x2>; 208 "fsl,eloplus-dma-channel";
104 device_type = "ethernet-phy"; 209 reg = <0x100 0x80>;
210 cell-index = <2>;
211 interrupt-parent = <&mpic>;
212 interrupts = <22 2>;
105 }; 213 };
106 phy3: ethernet-phy@3 { 214 dma-channel@180 {
107 interrupts = <2 1 0 0>; 215 compatible = "fsl,mpc8568-dma-channel",
108 reg = <0x3>; 216 "fsl,eloplus-dma-channel";
109 device_type = "ethernet-phy"; 217 reg = <0x180 0x80>;
218 cell-index = <3>;
219 interrupt-parent = <&mpic>;
220 interrupts = <23 2>;
110 }; 221 };
111 tbi0: tbi-phy@11 { 222 };
112 reg = <0x11>; 223
113 device_type = "tbi-phy"; 224 enet0: ethernet@24000 {
225 #address-cells = <1>;
226 #size-cells = <1>;
227 cell-index = <0>;
228 device_type = "network";
229 model = "eTSEC";
230 compatible = "gianfar";
231 reg = <0x24000 0x1000>;
232 ranges = <0x0 0x24000 0x1000>;
233 local-mac-address = [ 00 00 00 00 00 00 ];
234 interrupts = <29 2 30 2 34 2>;
235 interrupt-parent = <&mpic>;
236 tbi-handle = <&tbi0>;
237 phy-handle = <&phy2>;
238 sleep = <&pmc 0x00000080>;
239
240 mdio@520 {
241 #address-cells = <1>;
242 #size-cells = <0>;
243 compatible = "fsl,gianfar-mdio";
244 reg = <0x520 0x20>;
245
246 phy0: ethernet-phy@7 {
247 interrupt-parent = <&mpic>;
248 interrupts = <1 1>;
249 reg = <0x7>;
250 device_type = "ethernet-phy";
251 };
252 phy1: ethernet-phy@1 {
253 interrupt-parent = <&mpic>;
254 interrupts = <2 1>;
255 reg = <0x1>;
256 device_type = "ethernet-phy";
257 };
258 phy2: ethernet-phy@2 {
259 interrupt-parent = <&mpic>;
260 interrupts = <1 1>;
261 reg = <0x2>;
262 device_type = "ethernet-phy";
263 };
264 phy3: ethernet-phy@3 {
265 interrupt-parent = <&mpic>;
266 interrupts = <2 1>;
267 reg = <0x3>;
268 device_type = "ethernet-phy";
269 };
270 tbi0: tbi-phy@11 {
271 reg = <0x11>;
272 device_type = "tbi-phy";
273 };
114 }; 274 };
115 }; 275 };
116 276
117 enet1: ethernet@25000 { 277 enet1: ethernet@25000 {
278 #address-cells = <1>;
279 #size-cells = <1>;
280 cell-index = <1>;
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x25000 0x1000>;
285 ranges = <0x0 0x25000 0x1000>;
286 local-mac-address = [ 00 00 00 00 00 00 ];
287 interrupts = <35 2 36 2 40 2>;
288 interrupt-parent = <&mpic>;
118 tbi-handle = <&tbi1>; 289 tbi-handle = <&tbi1>;
119 phy-handle = <&phy3>; 290 phy-handle = <&phy3>;
120 sleep = <&pmc 0x00000040>; 291 sleep = <&pmc 0x00000040>;
292
293 mdio@520 {
294 #address-cells = <1>;
295 #size-cells = <0>;
296 compatible = "fsl,gianfar-tbi";
297 reg = <0x520 0x20>;
298
299 tbi1: tbi-phy@11 {
300 reg = <0x11>;
301 device_type = "tbi-phy";
302 };
303 };
121 }; 304 };
122 305
123 mdio@25520 { 306 duart-sleep-nexus {
124 tbi1: tbi-phy@11 { 307 #address-cells = <1>;
125 reg = <0x11>; 308 #size-cells = <1>;
126 device_type = "tbi-phy"; 309 compatible = "simple-bus";
310 sleep = <&pmc 0x00000002>;
311 ranges;
312
313 serial0: serial@4500 {
314 cell-index = <0>;
315 device_type = "serial";
316 compatible = "ns16550";
317 reg = <0x4500 0x100>;
318 clock-frequency = <0>;
319 interrupts = <42 2>;
320 interrupt-parent = <&mpic>;
321 };
322
323 serial1: serial@4600 {
324 cell-index = <1>;
325 device_type = "serial";
326 compatible = "ns16550";
327 reg = <0x4600 0x100>;
328 clock-frequency = <0>;
329 interrupts = <42 2>;
330 interrupt-parent = <&mpic>;
127 }; 331 };
128 }; 332 };
129 333
334 global-utilities@e0000 {
335 #address-cells = <1>;
336 #size-cells = <1>;
337 compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
338 reg = <0xe0000 0x1000>;
339 ranges = <0 0xe0000 0x1000>;
340 fsl,has-rstcr;
341
342 pmc: power@70 {
343 compatible = "fsl,mpc8568-pmc",
344 "fsl,mpc8548-pmc";
345 reg = <0x70 0x20>;
346 };
347 };
348
349 crypto@30000 {
350 compatible = "fsl,sec2.1", "fsl,sec2.0";
351 reg = <0x30000 0x10000>;
352 interrupts = <45 2>;
353 interrupt-parent = <&mpic>;
354 fsl,num-channels = <4>;
355 fsl,channel-fifo-len = <24>;
356 fsl,exec-units-mask = <0xfe>;
357 fsl,descriptor-types-mask = <0x12b0ebf>;
358 sleep = <&pmc 0x01000000>;
359 };
360
361 mpic: pic@40000 {
362 interrupt-controller;
363 #address-cells = <0>;
364 #interrupt-cells = <2>;
365 reg = <0x40000 0x40000>;
366 compatible = "chrp,open-pic";
367 device_type = "open-pic";
368 };
369
370 msi@41600 {
371 compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
372 reg = <0x41600 0x80>;
373 msi-available-ranges = <0 0x100>;
374 interrupts = <
375 0xe0 0
376 0xe1 0
377 0xe2 0
378 0xe3 0
379 0xe4 0
380 0xe5 0
381 0xe6 0
382 0xe7 0>;
383 interrupt-parent = <&mpic>;
384 };
385
130 par_io@e0100 { 386 par_io@e0100 {
387 reg = <0xe0100 0x100>;
388 device_type = "par_io";
131 num-ports = <7>; 389 num-ports = <7>;
132 390
133 pio1: ucc_pin@01 { 391 pio1: ucc_pin@01 {
@@ -190,21 +448,57 @@
190 }; 448 };
191 }; 449 };
192 450
193 qe: qe@e0080000 { 451 qe@e0080000 {
194 ranges = <0x0 0x0 0xe0080000 0x40000>; 452 #address-cells = <1>;
195 reg = <0x0 0xe0080000 0x0 0x480>; 453 #size-cells = <1>;
454 device_type = "qe";
455 compatible = "fsl,qe";
456 ranges = <0x0 0xe0080000 0x40000>;
457 reg = <0xe0080000 0x480>;
458 sleep = <&pmc 0x00000800>;
459 brg-frequency = <0>;
460 bus-frequency = <396000000>;
461 fsl,qe-num-riscs = <2>;
462 fsl,qe-num-snums = <28>;
463
464 muram@10000 {
465 #address-cells = <1>;
466 #size-cells = <1>;
467 compatible = "fsl,qe-muram", "fsl,cpm-muram";
468 ranges = <0x0 0x10000 0x10000>;
469
470 data-only@0 {
471 compatible = "fsl,qe-muram-data",
472 "fsl,cpm-muram-data";
473 reg = <0x0 0x10000>;
474 };
475 };
196 476
197 spi@4c0 { 477 spi@4c0 {
478 cell-index = <0>;
479 compatible = "fsl,spi";
480 reg = <0x4c0 0x40>;
481 interrupts = <2>;
482 interrupt-parent = <&qeic>;
198 mode = "cpu"; 483 mode = "cpu";
199 }; 484 };
200 485
201 spi@500 { 486 spi@500 {
487 cell-index = <1>;
488 compatible = "fsl,spi";
489 reg = <0x500 0x40>;
490 interrupts = <1>;
491 interrupt-parent = <&qeic>;
202 mode = "cpu"; 492 mode = "cpu";
203 }; 493 };
204 494
205 enet2: ucc@2000 { 495 enet2: ucc@2000 {
206 device_type = "network"; 496 device_type = "network";
207 compatible = "ucc_geth"; 497 compatible = "ucc_geth";
498 cell-index = <1>;
499 reg = <0x2000 0x200>;
500 interrupts = <32>;
501 interrupt-parent = <&qeic>;
208 local-mac-address = [ 00 00 00 00 00 00 ]; 502 local-mac-address = [ 00 00 00 00 00 00 ];
209 rx-clock-name = "none"; 503 rx-clock-name = "none";
210 tx-clock-name = "clk16"; 504 tx-clock-name = "clk16";
@@ -216,6 +510,10 @@
216 enet3: ucc@3000 { 510 enet3: ucc@3000 {
217 device_type = "network"; 511 device_type = "network";
218 compatible = "ucc_geth"; 512 compatible = "ucc_geth";
513 cell-index = <2>;
514 reg = <0x3000 0x200>;
515 interrupts = <33>;
516 interrupt-parent = <&qeic>;
219 local-mac-address = [ 00 00 00 00 00 00 ]; 517 local-mac-address = [ 00 00 00 00 00 00 ];
220 rx-clock-name = "none"; 518 rx-clock-name = "none";
221 tx-clock-name = "clk16"; 519 tx-clock-name = "clk16";
@@ -234,57 +532,102 @@
234 * gianfar's MDIO bus */ 532 * gianfar's MDIO bus */
235 qe_phy0: ethernet-phy@07 { 533 qe_phy0: ethernet-phy@07 {
236 interrupt-parent = <&mpic>; 534 interrupt-parent = <&mpic>;
237 interrupts = <1 1 0 0>; 535 interrupts = <1 1>;
238 reg = <0x7>; 536 reg = <0x7>;
239 device_type = "ethernet-phy"; 537 device_type = "ethernet-phy";
240 }; 538 };
241 qe_phy1: ethernet-phy@01 { 539 qe_phy1: ethernet-phy@01 {
242 interrupt-parent = <&mpic>; 540 interrupt-parent = <&mpic>;
243 interrupts = <2 1 0 0>; 541 interrupts = <2 1>;
244 reg = <0x1>; 542 reg = <0x1>;
245 device_type = "ethernet-phy"; 543 device_type = "ethernet-phy";
246 }; 544 };
247 qe_phy2: ethernet-phy@02 { 545 qe_phy2: ethernet-phy@02 {
248 interrupt-parent = <&mpic>; 546 interrupt-parent = <&mpic>;
249 interrupts = <1 1 0 0>; 547 interrupts = <1 1>;
250 reg = <0x2>; 548 reg = <0x2>;
251 device_type = "ethernet-phy"; 549 device_type = "ethernet-phy";
252 }; 550 };
253 qe_phy3: ethernet-phy@03 { 551 qe_phy3: ethernet-phy@03 {
254 interrupt-parent = <&mpic>; 552 interrupt-parent = <&mpic>;
255 interrupts = <2 1 0 0>; 553 interrupts = <2 1>;
256 reg = <0x3>; 554 reg = <0x3>;
257 device_type = "ethernet-phy"; 555 device_type = "ethernet-phy";
258 }; 556 };
259 }; 557 };
558
559 qeic: interrupt-controller@80 {
560 interrupt-controller;
561 compatible = "fsl,qe-ic";
562 #address-cells = <0>;
563 #interrupt-cells = <1>;
564 reg = <0x80 0x80>;
565 big-endian;
566 interrupts = <46 2 46 2>; //high:30 low:30
567 interrupt-parent = <&mpic>;
568 };
569
260 }; 570 };
261 571
262 pci0: pci@e0008000 { 572 pci0: pci@e0008000 {
263 reg = <0x0 0xe0008000 0x0 0x1000>;
264 ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
265 0x1000000 0x0 0x00000000 0x0 0xe2000000 0x0 0x800000>;
266 clock-frequency = <66666666>;
267 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 573 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
268 interrupt-map = < 574 interrupt-map = <
269 /* IDSEL 0x12 AD18 */ 575 /* IDSEL 0x12 AD18 */
270 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0 576 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1
271 0x9000 0x0 0x0 0x2 &mpic 0x6 0x1 0 0 577 0x9000 0x0 0x0 0x2 &mpic 0x6 0x1
272 0x9000 0x0 0x0 0x3 &mpic 0x7 0x1 0 0 578 0x9000 0x0 0x0 0x3 &mpic 0x7 0x1
273 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 0 0 579 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
274 580
275 /* IDSEL 0x13 AD19 */ 581 /* IDSEL 0x13 AD19 */
276 0x9800 0x0 0x0 0x1 &mpic 0x6 0x1 0 0 582 0x9800 0x0 0x0 0x1 &mpic 0x6 0x1
277 0x9800 0x0 0x0 0x2 &mpic 0x7 0x1 0 0 583 0x9800 0x0 0x0 0x2 &mpic 0x7 0x1
278 0x9800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 584 0x9800 0x0 0x0 0x3 &mpic 0x4 0x1
279 0x9800 0x0 0x0 0x4 &mpic 0x5 0x1 0 0>; 585 0x9800 0x0 0x0 0x4 &mpic 0x5 0x1>;
586
587 interrupt-parent = <&mpic>;
588 interrupts = <24 2>;
589 bus-range = <0 255>;
590 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
591 0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
592 sleep = <&pmc 0x80000000>;
593 clock-frequency = <66666666>;
594 #interrupt-cells = <1>;
595 #size-cells = <2>;
596 #address-cells = <3>;
597 reg = <0xe0008000 0x1000>;
598 compatible = "fsl,mpc8540-pci";
599 device_type = "pci";
280 }; 600 };
281 601
282 /* PCI Express */ 602 /* PCI Express */
283 pci1: pcie@e000a000 { 603 pci1: pcie@e000a000 {
284 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x10000000 604 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
285 0x1000000 0x0 0x00000000 0x0 0xe2800000 0x0 0x800000>; 605 interrupt-map = <
286 reg = <0x0 0xe000a000 0x0 0x1000>; 606
607 /* IDSEL 0x0 (PEX) */
608 00000 0x0 0x0 0x1 &mpic 0x0 0x1
609 00000 0x0 0x0 0x2 &mpic 0x1 0x1
610 00000 0x0 0x0 0x3 &mpic 0x2 0x1
611 00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
612
613 interrupt-parent = <&mpic>;
614 interrupts = <26 2>;
615 bus-range = <0 255>;
616 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
617 0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
618 sleep = <&pmc 0x20000000>;
619 clock-frequency = <33333333>;
620 #interrupt-cells = <1>;
621 #size-cells = <2>;
622 #address-cells = <3>;
623 reg = <0xe000a000 0x1000>;
624 compatible = "fsl,mpc8548-pcie";
625 device_type = "pci";
287 pcie@0 { 626 pcie@0 {
627 reg = <0x0 0x0 0x0 0x0 0x0>;
628 #size-cells = <2>;
629 #address-cells = <3>;
630 device_type = "pci";
288 ranges = <0x2000000 0x0 0xa0000000 631 ranges = <0x2000000 0x0 0xa0000000
289 0x2000000 0x0 0xa0000000 632 0x2000000 0x0 0xa0000000
290 0x0 0x10000000 633 0x0 0x10000000
@@ -295,11 +638,22 @@
295 }; 638 };
296 }; 639 };
297 640
298 rio: rapidio@e00c00000 { 641 rio0: rapidio@e00c00000 {
299 reg = <0x0 0xe00c0000 0x0 0x20000>; 642 #address-cells = <2>;
300 port1 { 643 #size-cells = <2>;
301 ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; 644 compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
302 }; 645 reg = <0xe00c0000 0x20000>;
646 ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
647 interrupts = <48 2 /* error */
648 49 2 /* bell_outb */
649 50 2 /* bell_inb */
650 53 2 /* msg1_tx */
651 54 2 /* msg1_rx */
652 55 2 /* msg2_tx */
653 56 2 /* msg2_rx */>;
654 interrupt-parent = <&mpic>;
655 sleep = <&pmc 0x00080000 /* controller */
656 &pmc 0x00040000>; /* message unit */
303 }; 657 };
304 658
305 leds { 659 leds {
@@ -318,5 +672,3 @@
318 }; 672 };
319 }; 673 };
320}; 674};
321
322/include/ "fsl/mpc8568si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index fe0d60935e9..8b72eaff5b0 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -9,36 +9,66 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8569si-pre.dtsi" 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "MPC8569EMDS"; 15 model = "MPC8569EMDS";
16 compatible = "fsl,MPC8569EMDS"; 16 compatible = "fsl,MPC8569EMDS";
17 #address-cells = <2>; 17 #address-cells = <1>;
18 #size-cells = <2>; 18 #size-cells = <1>;
19 interrupt-parent = <&mpic>;
20 19
21 aliases { 20 aliases {
21 serial0 = &serial0;
22 serial1 = &serial1;
23 ethernet0 = &enet0;
24 ethernet1 = &enet1;
22 ethernet2 = &enet2; 25 ethernet2 = &enet2;
23 ethernet3 = &enet3; 26 ethernet3 = &enet3;
24 ethernet5 = &enet5; 27 ethernet5 = &enet5;
25 ethernet7 = &enet7; 28 ethernet7 = &enet7;
26 rapidio0 = &rio; 29 pci1 = &pci1;
30 rapidio0 = &rio0;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 PowerPC,8569@0 {
38 device_type = "cpu";
39 reg = <0x0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
44 sleep = <&pmc 0x00008000 // core
45 &pmc 0x00004000>; // timebase
46 timebase-frequency = <0>;
47 bus-frequency = <0>;
48 clock-frequency = <0>;
49 next-level-cache = <&L2>;
50 };
27 }; 51 };
28 52
29 memory { 53 memory {
30 device_type = "memory"; 54 device_type = "memory";
31 }; 55 };
32 56
33 lbc: localbus@e0005000 { 57 localbus@e0005000 {
34 reg = <0x0 0xe0005000 0x0 0x1000>; 58 #address-cells = <2>;
35 59 #size-cells = <1>;
36 ranges = <0x0 0x0 0x0 0xfe000000 0x02000000 60 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
37 0x1 0x0 0x0 0xf8000000 0x00008000 61 reg = <0xe0005000 0x1000>;
38 0x2 0x0 0x0 0xf0000000 0x04000000 62 interrupts = <19 2>;
39 0x3 0x0 0x0 0xfc000000 0x00008000 63 interrupt-parent = <&mpic>;
40 0x4 0x0 0x0 0xf8008000 0x00008000 64 sleep = <&pmc 0x08000000>;
41 0x5 0x0 0x0 0xf8010000 0x00008000>; 65
66 ranges = <0x0 0x0 0xfe000000 0x02000000
67 0x1 0x0 0xf8000000 0x00008000
68 0x2 0x0 0xf0000000 0x04000000
69 0x3 0x0 0xfc000000 0x00008000
70 0x4 0x0 0xf8008000 0x00008000
71 0x5 0x0 0xf8010000 0x00008000>;
42 72
43 nor@0,0 { 73 nor@0,0 {
44 #address-cells = <1>; 74 #address-cells = <1>;
@@ -103,26 +133,220 @@
103 }; 133 };
104 }; 134 };
105 135
106 soc: soc@e0000000 { 136 soc@e0000000 {
107 ranges = <0x0 0x0 0xe0000000 0x100000>; 137 #address-cells = <1>;
138 #size-cells = <1>;
139 device_type = "soc";
140 compatible = "fsl,mpc8569-immr", "simple-bus";
141 ranges = <0x0 0xe0000000 0x100000>;
142 bus-frequency = <0>;
143
144 ecm-law@0 {
145 compatible = "fsl,ecm-law";
146 reg = <0x0 0x1000>;
147 fsl,num-laws = <10>;
148 };
149
150 ecm@1000 {
151 compatible = "fsl,mpc8569-ecm", "fsl,ecm";
152 reg = <0x1000 0x1000>;
153 interrupts = <17 2>;
154 interrupt-parent = <&mpic>;
155 };
156
157 memory-controller@2000 {
158 compatible = "fsl,mpc8569-memory-controller";
159 reg = <0x2000 0x1000>;
160 interrupt-parent = <&mpic>;
161 interrupts = <18 2>;
162 };
108 163
109 i2c-sleep-nexus { 164 i2c-sleep-nexus {
165 #address-cells = <1>;
166 #size-cells = <1>;
167 compatible = "simple-bus";
168 sleep = <&pmc 0x00000004>;
169 ranges;
170
110 i2c@3000 { 171 i2c@3000 {
172 #address-cells = <1>;
173 #size-cells = <0>;
174 cell-index = <0>;
175 compatible = "fsl-i2c";
176 reg = <0x3000 0x100>;
177 interrupts = <43 2>;
178 interrupt-parent = <&mpic>;
179 dfsrr;
180
111 rtc@68 { 181 rtc@68 {
112 compatible = "dallas,ds1374"; 182 compatible = "dallas,ds1374";
113 reg = <0x68>; 183 reg = <0x68>;
114 interrupts = <3 1 0 0>; 184 interrupts = <3 1>;
185 interrupt-parent = <&mpic>;
115 }; 186 };
116 }; 187 };
188
189 i2c@3100 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 cell-index = <1>;
193 compatible = "fsl-i2c";
194 reg = <0x3100 0x100>;
195 interrupts = <43 2>;
196 interrupt-parent = <&mpic>;
197 dfsrr;
198 };
199 };
200
201 duart-sleep-nexus {
202 #address-cells = <1>;
203 #size-cells = <1>;
204 compatible = "simple-bus";
205 sleep = <&pmc 0x00000002>;
206 ranges;
207
208 serial0: serial@4500 {
209 cell-index = <0>;
210 device_type = "serial";
211 compatible = "ns16550";
212 reg = <0x4500 0x100>;
213 clock-frequency = <0>;
214 interrupts = <42 2>;
215 interrupt-parent = <&mpic>;
216 };
217
218 serial1: serial@4600 {
219 cell-index = <1>;
220 device_type = "serial";
221 compatible = "ns16550";
222 reg = <0x4600 0x100>;
223 clock-frequency = <0>;
224 interrupts = <42 2>;
225 interrupt-parent = <&mpic>;
226 };
227 };
228
229 L2: l2-cache-controller@20000 {
230 compatible = "fsl,mpc8569-l2-cache-controller";
231 reg = <0x20000 0x1000>;
232 cache-line-size = <32>; // 32 bytes
233 cache-size = <0x80000>; // L2, 512K
234 interrupt-parent = <&mpic>;
235 interrupts = <16 2>;
117 }; 236 };
118 237
119 sdhc@2e000 { 238 dma@21300 {
239 #address-cells = <1>;
240 #size-cells = <1>;
241 compatible = "fsl,mpc8569-dma", "fsl,eloplus-dma";
242 reg = <0x21300 0x4>;
243 ranges = <0x0 0x21100 0x200>;
244 cell-index = <0>;
245 dma-channel@0 {
246 compatible = "fsl,mpc8569-dma-channel",
247 "fsl,eloplus-dma-channel";
248 reg = <0x0 0x80>;
249 cell-index = <0>;
250 interrupt-parent = <&mpic>;
251 interrupts = <20 2>;
252 };
253 dma-channel@80 {
254 compatible = "fsl,mpc8569-dma-channel",
255 "fsl,eloplus-dma-channel";
256 reg = <0x80 0x80>;
257 cell-index = <1>;
258 interrupt-parent = <&mpic>;
259 interrupts = <21 2>;
260 };
261 dma-channel@100 {
262 compatible = "fsl,mpc8569-dma-channel",
263 "fsl,eloplus-dma-channel";
264 reg = <0x100 0x80>;
265 cell-index = <2>;
266 interrupt-parent = <&mpic>;
267 interrupts = <22 2>;
268 };
269 dma-channel@180 {
270 compatible = "fsl,mpc8569-dma-channel",
271 "fsl,eloplus-dma-channel";
272 reg = <0x180 0x80>;
273 cell-index = <3>;
274 interrupt-parent = <&mpic>;
275 interrupts = <23 2>;
276 };
277 };
278
279 sdhci@2e000 {
280 compatible = "fsl,mpc8569-esdhc", "fsl,esdhc";
281 reg = <0x2e000 0x1000>;
282 interrupts = <72 0x8>;
283 interrupt-parent = <&mpic>;
284 sleep = <&pmc 0x00200000>;
285 /* Filled in by U-Boot */
286 clock-frequency = <0>;
120 status = "disabled"; 287 status = "disabled";
121 sdhci,1-bit-only; 288 sdhci,1-bit-only;
122 bus-width = <1>; 289 };
290
291 crypto@30000 {
292 compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
293 "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
294 reg = <0x30000 0x10000>;
295 interrupts = <45 2 58 2>;
296 interrupt-parent = <&mpic>;
297 fsl,num-channels = <4>;
298 fsl,channel-fifo-len = <24>;
299 fsl,exec-units-mask = <0xbfe>;
300 fsl,descriptor-types-mask = <0x3ab0ebf>;
301 sleep = <&pmc 0x01000000>;
302 };
303
304 mpic: pic@40000 {
305 interrupt-controller;
306 #address-cells = <0>;
307 #interrupt-cells = <2>;
308 reg = <0x40000 0x40000>;
309 compatible = "chrp,open-pic";
310 device_type = "open-pic";
311 };
312
313 msi@41600 {
314 compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
315 reg = <0x41600 0x80>;
316 msi-available-ranges = <0 0x100>;
317 interrupts = <
318 0xe0 0
319 0xe1 0
320 0xe2 0
321 0xe3 0
322 0xe4 0
323 0xe5 0
324 0xe6 0
325 0xe7 0>;
326 interrupt-parent = <&mpic>;
327 };
328
329 global-utilities@e0000 {
330 #address-cells = <1>;
331 #size-cells = <1>;
332 compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
333 reg = <0xe0000 0x1000>;
334 ranges = <0 0xe0000 0x1000>;
335 fsl,has-rstcr;
336
337 pmc: power@70 {
338 compatible = "fsl,mpc8569-pmc",
339 "fsl,mpc8548-pmc";
340 reg = <0x70 0x20>;
341 };
123 }; 342 };
124 343
125 par_io@e0100 { 344 par_io@e0100 {
345 #address-cells = <1>;
346 #size-cells = <1>;
347 reg = <0xe0100 0x100>;
348 ranges = <0x0 0xe0100 0x100>;
349 device_type = "par_io";
126 num-ports = <7>; 350 num-ports = <7>;
127 351
128 qe_pio_e: gpio-controller@80 { 352 qe_pio_e: gpio-controller@80 {
@@ -223,11 +447,47 @@
223 }; 447 };
224 }; 448 };
225 449
226 qe: qe@e0080000 { 450 qe@e0080000 {
227 ranges = <0x0 0x0 0xe0080000 0x40000>; 451 #address-cells = <1>;
228 reg = <0x0 0xe0080000 0x0 0x480>; 452 #size-cells = <1>;
453 device_type = "qe";
454 compatible = "fsl,qe";
455 ranges = <0x0 0xe0080000 0x40000>;
456 reg = <0xe0080000 0x480>;
457 sleep = <&pmc 0x00000800>;
458 brg-frequency = <0>;
459 bus-frequency = <0>;
460 fsl,qe-num-riscs = <4>;
461 fsl,qe-num-snums = <46>;
462
463 qeic: interrupt-controller@80 {
464 interrupt-controller;
465 compatible = "fsl,qe-ic";
466 #address-cells = <0>;
467 #interrupt-cells = <1>;
468 reg = <0x80 0x80>;
469 interrupts = <46 2 46 2>; //high:30 low:30
470 interrupt-parent = <&mpic>;
471 };
472
473 timer@440 {
474 compatible = "fsl,mpc8569-qe-gtm",
475 "fsl,qe-gtm", "fsl,gtm";
476 reg = <0x440 0x40>;
477 interrupts = <12 13 14 15>;
478 interrupt-parent = <&qeic>;
479 /* Filled in by U-Boot */
480 clock-frequency = <0>;
481 };
229 482
230 spi@4c0 { 483 spi@4c0 {
484 #address-cells = <1>;
485 #size-cells = <0>;
486 compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
487 reg = <0x4c0 0x40>;
488 cell-index = <0>;
489 interrupts = <2>;
490 interrupt-parent = <&qeic>;
231 gpios = <&qe_pio_e 30 0>; 491 gpios = <&qe_pio_e 30 0>;
232 mode = "cpu-qe"; 492 mode = "cpu-qe";
233 493
@@ -239,10 +499,20 @@
239 }; 499 };
240 500
241 spi@500 { 501 spi@500 {
502 cell-index = <1>;
503 compatible = "fsl,spi";
504 reg = <0x500 0x40>;
505 interrupts = <1>;
506 interrupt-parent = <&qeic>;
242 mode = "cpu"; 507 mode = "cpu";
243 }; 508 };
244 509
245 usb@6c0 { 510 usb@6c0 {
511 compatible = "fsl,mpc8569-qe-usb",
512 "fsl,mpc8323-qe-usb";
513 reg = <0x6c0 0x40 0x8b00 0x100>;
514 interrupts = <11>;
515 interrupt-parent = <&qeic>;
246 fsl,fullspeed-clock = "clk5"; 516 fsl,fullspeed-clock = "clk5";
247 fsl,lowspeed-clock = "brg10"; 517 fsl,lowspeed-clock = "brg10";
248 gpios = <&qe_pio_f 3 0 /* USBOE */ 518 gpios = <&qe_pio_f 3 0 /* USBOE */
@@ -257,6 +527,10 @@
257 enet0: ucc@2000 { 527 enet0: ucc@2000 {
258 device_type = "network"; 528 device_type = "network";
259 compatible = "ucc_geth"; 529 compatible = "ucc_geth";
530 cell-index = <1>;
531 reg = <0x2000 0x200>;
532 interrupts = <32>;
533 interrupt-parent = <&qeic>;
260 local-mac-address = [ 00 00 00 00 00 00 ]; 534 local-mac-address = [ 00 00 00 00 00 00 ];
261 rx-clock-name = "none"; 535 rx-clock-name = "none";
262 tx-clock-name = "clk12"; 536 tx-clock-name = "clk12";
@@ -274,33 +548,35 @@
274 548
275 qe_phy0: ethernet-phy@07 { 549 qe_phy0: ethernet-phy@07 {
276 interrupt-parent = <&mpic>; 550 interrupt-parent = <&mpic>;
277 interrupts = <1 1 0 0>; 551 interrupts = <1 1>;
278 reg = <0x7>; 552 reg = <0x7>;
279 device_type = "ethernet-phy"; 553 device_type = "ethernet-phy";
280 }; 554 };
281 qe_phy1: ethernet-phy@01 { 555 qe_phy1: ethernet-phy@01 {
282 interrupt-parent = <&mpic>; 556 interrupt-parent = <&mpic>;
283 interrupts = <2 1 0 0>; 557 interrupts = <2 1>;
284 reg = <0x1>; 558 reg = <0x1>;
285 device_type = "ethernet-phy"; 559 device_type = "ethernet-phy";
286 }; 560 };
287 qe_phy2: ethernet-phy@02 { 561 qe_phy2: ethernet-phy@02 {
288 interrupt-parent = <&mpic>; 562 interrupt-parent = <&mpic>;
289 interrupts = <3 1 0 0>; 563 interrupts = <3 1>;
290 reg = <0x2>; 564 reg = <0x2>;
291 device_type = "ethernet-phy"; 565 device_type = "ethernet-phy";
292 }; 566 };
293 qe_phy3: ethernet-phy@03 { 567 qe_phy3: ethernet-phy@03 {
294 interrupt-parent = <&mpic>; 568 interrupt-parent = <&mpic>;
295 interrupts = <4 1 0 0>; 569 interrupts = <4 1>;
296 reg = <0x3>; 570 reg = <0x3>;
297 device_type = "ethernet-phy"; 571 device_type = "ethernet-phy";
298 }; 572 };
299 qe_phy5: ethernet-phy@04 { 573 qe_phy5: ethernet-phy@04 {
574 interrupt-parent = <&mpic>;
300 reg = <0x04>; 575 reg = <0x04>;
301 device_type = "ethernet-phy"; 576 device_type = "ethernet-phy";
302 }; 577 };
303 qe_phy7: ethernet-phy@06 { 578 qe_phy7: ethernet-phy@06 {
579 interrupt-parent = <&mpic>;
304 reg = <0x6>; 580 reg = <0x6>;
305 device_type = "ethernet-phy"; 581 device_type = "ethernet-phy";
306 }; 582 };
@@ -334,6 +610,10 @@
334 enet2: ucc@2200 { 610 enet2: ucc@2200 {
335 device_type = "network"; 611 device_type = "network";
336 compatible = "ucc_geth"; 612 compatible = "ucc_geth";
613 cell-index = <3>;
614 reg = <0x2200 0x200>;
615 interrupts = <34>;
616 interrupt-parent = <&qeic>;
337 local-mac-address = [ 00 00 00 00 00 00 ]; 617 local-mac-address = [ 00 00 00 00 00 00 ];
338 rx-clock-name = "none"; 618 rx-clock-name = "none";
339 tx-clock-name = "clk12"; 619 tx-clock-name = "clk12";
@@ -357,6 +637,10 @@
357 enet1: ucc@3000 { 637 enet1: ucc@3000 {
358 device_type = "network"; 638 device_type = "network";
359 compatible = "ucc_geth"; 639 compatible = "ucc_geth";
640 cell-index = <2>;
641 reg = <0x3000 0x200>;
642 interrupts = <33>;
643 interrupt-parent = <&qeic>;
360 local-mac-address = [ 00 00 00 00 00 00 ]; 644 local-mac-address = [ 00 00 00 00 00 00 ];
361 rx-clock-name = "none"; 645 rx-clock-name = "none";
362 tx-clock-name = "clk17"; 646 tx-clock-name = "clk17";
@@ -380,6 +664,10 @@
380 enet3: ucc@3200 { 664 enet3: ucc@3200 {
381 device_type = "network"; 665 device_type = "network";
382 compatible = "ucc_geth"; 666 compatible = "ucc_geth";
667 cell-index = <4>;
668 reg = <0x3200 0x200>;
669 interrupts = <35>;
670 interrupt-parent = <&qeic>;
383 local-mac-address = [ 00 00 00 00 00 00 ]; 671 local-mac-address = [ 00 00 00 00 00 00 ];
384 rx-clock-name = "none"; 672 rx-clock-name = "none";
385 tx-clock-name = "clk17"; 673 tx-clock-name = "clk17";
@@ -403,6 +691,10 @@
403 enet5: ucc@3400 { 691 enet5: ucc@3400 {
404 device_type = "network"; 692 device_type = "network";
405 compatible = "ucc_geth"; 693 compatible = "ucc_geth";
694 cell-index = <6>;
695 reg = <0x3400 0x200>;
696 interrupts = <41>;
697 interrupt-parent = <&qeic>;
406 local-mac-address = [ 00 00 00 00 00 00 ]; 698 local-mac-address = [ 00 00 00 00 00 00 ];
407 rx-clock-name = "none"; 699 rx-clock-name = "none";
408 tx-clock-name = "none"; 700 tx-clock-name = "none";
@@ -414,6 +706,10 @@
414 enet7: ucc@3600 { 706 enet7: ucc@3600 {
415 device_type = "network"; 707 device_type = "network";
416 compatible = "ucc_geth"; 708 compatible = "ucc_geth";
709 cell-index = <8>;
710 reg = <0x3600 0x200>;
711 interrupts = <43>;
712 interrupt-parent = <&qeic>;
417 local-mac-address = [ 00 00 00 00 00 00 ]; 713 local-mac-address = [ 00 00 00 00 00 00 ];
418 rx-clock-name = "none"; 714 rx-clock-name = "none";
419 tx-clock-name = "none"; 715 tx-clock-name = "none";
@@ -421,14 +717,50 @@
421 phy-handle = <&qe_phy7>; 717 phy-handle = <&qe_phy7>;
422 phy-connection-type = "sgmii"; 718 phy-connection-type = "sgmii";
423 }; 719 };
720
721 muram@10000 {
722 #address-cells = <1>;
723 #size-cells = <1>;
724 compatible = "fsl,qe-muram", "fsl,cpm-muram";
725 ranges = <0x0 0x10000 0x20000>;
726
727 data-only@0 {
728 compatible = "fsl,qe-muram-data",
729 "fsl,cpm-muram-data";
730 reg = <0x0 0x20000>;
731 };
732 };
733
424 }; 734 };
425 735
426 /* PCI Express */ 736 /* PCI Express */
427 pci1: pcie@e000a000 { 737 pci1: pcie@e000a000 {
428 reg = <0x0 0xe000a000 0x0 0x1000>; 738 compatible = "fsl,mpc8548-pcie";
429 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 739 device_type = "pci";
430 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x00800000>; 740 #interrupt-cells = <1>;
741 #size-cells = <2>;
742 #address-cells = <3>;
743 reg = <0xe000a000 0x1000>;
744 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
745 interrupt-map = <
746 /* IDSEL 0x0 (PEX) */
747 00000 0x0 0x0 0x1 &mpic 0x0 0x1
748 00000 0x0 0x0 0x2 &mpic 0x1 0x1
749 00000 0x0 0x0 0x3 &mpic 0x2 0x1
750 00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
751
752 interrupt-parent = <&mpic>;
753 interrupts = <26 2>;
754 bus-range = <0 255>;
755 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
756 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>;
757 sleep = <&pmc 0x20000000>;
758 clock-frequency = <33333333>;
431 pcie@0 { 759 pcie@0 {
760 reg = <0x0 0x0 0x0 0x0 0x0>;
761 #size-cells = <2>;
762 #address-cells = <3>;
763 device_type = "pci";
432 ranges = <0x2000000 0x0 0xa0000000 764 ranges = <0x2000000 0x0 0xa0000000
433 0x2000000 0x0 0xa0000000 765 0x2000000 0x0 0xa0000000
434 0x0 0x10000000 766 0x0 0x10000000
@@ -439,15 +771,20 @@
439 }; 771 };
440 }; 772 };
441 773
442 rio: rapidio@e00c00000 { 774 rio0: rapidio@e00c00000 {
443 reg = <0x0 0xe00c0000 0x0 0x20000>; 775 #address-cells = <2>;
444 port1 { 776 #size-cells = <2>;
445 ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; 777 compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta";
446 }; 778 reg = <0xe00c0000 0x20000>;
447 port2 { 779 ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
448 status = "disabled"; 780 interrupts = <48 2 /* error */
449 }; 781 49 2 /* bell_outb */
782 50 2 /* bell_inb */
783 53 2 /* msg1_tx */
784 54 2 /* msg1_rx */
785 55 2 /* msg2_tx */
786 56 2 /* msg2_rx */>;
787 interrupt-parent = <&mpic>;
788 sleep = <&pmc 0x00080000>;
450 }; 789 };
451}; 790};
452
453/include/ "fsl/mpc8569si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 0c9f2955deb..f6c04d25e91 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -9,18 +9,67 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8572si-pre.dtsi" 12/dts-v1/;
13
14/ { 13/ {
15 model = "fsl,MPC8572DS"; 14 model = "fsl,MPC8572DS";
16 compatible = "fsl,MPC8572DS"; 15 compatible = "fsl,MPC8572DS";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 ethernet3 = &enet3;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 pci1 = &pci1;
28 pci2 = &pci2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 PowerPC,8572@0 {
36 device_type = "cpu";
37 reg = <0x0>;
38 d-cache-line-size = <32>; // 32 bytes
39 i-cache-line-size = <32>; // 32 bytes
40 d-cache-size = <0x8000>; // L1, 32K
41 i-cache-size = <0x8000>; // L1, 32K
42 timebase-frequency = <0>;
43 bus-frequency = <0>;
44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
46 };
47
48 PowerPC,8572@1 {
49 device_type = "cpu";
50 reg = <0x1>;
51 d-cache-line-size = <32>; // 32 bytes
52 i-cache-line-size = <32>; // 32 bytes
53 d-cache-size = <0x8000>; // L1, 32K
54 i-cache-size = <0x8000>; // L1, 32K
55 timebase-frequency = <0>;
56 bus-frequency = <0>;
57 clock-frequency = <0>;
58 next-level-cache = <&L2>;
59 };
60 };
17 61
18 memory { 62 memory {
19 device_type = "memory"; 63 device_type = "memory";
20 }; 64 };
21 65
22 board_lbc: lbc: localbus@ffe05000 { 66 localbus@ffe05000 {
67 #address-cells = <2>;
68 #size-cells = <1>;
69 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
23 reg = <0 0xffe05000 0 0x1000>; 70 reg = <0 0xffe05000 0 0x1000>;
71 interrupts = <19 2>;
72 interrupt-parent = <&mpic>;
24 73
25 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 74 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
26 0x1 0x0 0x0 0xe0000000 0x08000000 75 0x1 0x0 0x0 0xe0000000 0x08000000
@@ -29,17 +78,601 @@
29 0x4 0x0 0x0 0xffa40000 0x00040000 78 0x4 0x0 0x0 0xffa40000 0x00040000
30 0x5 0x0 0x0 0xffa80000 0x00040000 79 0x5 0x0 0x0 0xffa80000 0x00040000
31 0x6 0x0 0x0 0xffac0000 0x00040000>; 80 0x6 0x0 0x0 0xffac0000 0x00040000>;
81
82 nor@0,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x8000000>;
87 bank-width = <2>;
88 device-width = <1>;
89
90 ramdisk@0 {
91 reg = <0x0 0x03000000>;
92 read-only;
93 };
94
95 diagnostic@3000000 {
96 reg = <0x03000000 0x00e00000>;
97 read-only;
98 };
99
100 dink@3e00000 {
101 reg = <0x03e00000 0x00200000>;
102 read-only;
103 };
104
105 kernel@4000000 {
106 reg = <0x04000000 0x00400000>;
107 read-only;
108 };
109
110 jffs2@4400000 {
111 reg = <0x04400000 0x03b00000>;
112 };
113
114 dtb@7f00000 {
115 reg = <0x07f00000 0x00080000>;
116 read-only;
117 };
118
119 u-boot@7f80000 {
120 reg = <0x07f80000 0x00080000>;
121 read-only;
122 };
123 };
124
125 nand@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8572-fcm-nand",
129 "fsl,elbc-fcm-nand";
130 reg = <0x2 0x0 0x40000>;
131
132 u-boot@0 {
133 reg = <0x0 0x02000000>;
134 read-only;
135 };
136
137 jffs2@2000000 {
138 reg = <0x02000000 0x10000000>;
139 };
140
141 ramdisk@12000000 {
142 reg = <0x12000000 0x08000000>;
143 read-only;
144 };
145
146 kernel@1a000000 {
147 reg = <0x1a000000 0x04000000>;
148 };
149
150 dtb@1e000000 {
151 reg = <0x1e000000 0x01000000>;
152 read-only;
153 };
154
155 empty@1f000000 {
156 reg = <0x1f000000 0x21000000>;
157 };
158 };
159
160 nand@4,0 {
161 compatible = "fsl,mpc8572-fcm-nand",
162 "fsl,elbc-fcm-nand";
163 reg = <0x4 0x0 0x40000>;
164 };
165
166 nand@5,0 {
167 compatible = "fsl,mpc8572-fcm-nand",
168 "fsl,elbc-fcm-nand";
169 reg = <0x5 0x0 0x40000>;
170 };
171
172 nand@6,0 {
173 compatible = "fsl,mpc8572-fcm-nand",
174 "fsl,elbc-fcm-nand";
175 reg = <0x6 0x0 0x40000>;
176 };
32 }; 177 };
33 178
34 board_soc: soc: soc8572@ffe00000 { 179 soc8572@ffe00000 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 device_type = "soc";
183 compatible = "simple-bus";
35 ranges = <0x0 0 0xffe00000 0x100000>; 184 ranges = <0x0 0 0xffe00000 0x100000>;
185 bus-frequency = <0>; // Filled out by uboot.
186
187 ecm-law@0 {
188 compatible = "fsl,ecm-law";
189 reg = <0x0 0x1000>;
190 fsl,num-laws = <12>;
191 };
192
193 ecm@1000 {
194 compatible = "fsl,mpc8572-ecm", "fsl,ecm";
195 reg = <0x1000 0x1000>;
196 interrupts = <17 2>;
197 interrupt-parent = <&mpic>;
198 };
199
200 memory-controller@2000 {
201 compatible = "fsl,mpc8572-memory-controller";
202 reg = <0x2000 0x1000>;
203 interrupt-parent = <&mpic>;
204 interrupts = <18 2>;
205 };
206
207 memory-controller@6000 {
208 compatible = "fsl,mpc8572-memory-controller";
209 reg = <0x6000 0x1000>;
210 interrupt-parent = <&mpic>;
211 interrupts = <18 2>;
212 };
213
214 L2: l2-cache-controller@20000 {
215 compatible = "fsl,mpc8572-l2-cache-controller";
216 reg = <0x20000 0x1000>;
217 cache-line-size = <32>; // 32 bytes
218 cache-size = <0x100000>; // L2, 1M
219 interrupt-parent = <&mpic>;
220 interrupts = <16 2>;
221 };
222
223 i2c@3000 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 cell-index = <0>;
227 compatible = "fsl-i2c";
228 reg = <0x3000 0x100>;
229 interrupts = <43 2>;
230 interrupt-parent = <&mpic>;
231 dfsrr;
232 };
233
234 i2c@3100 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 cell-index = <1>;
238 compatible = "fsl-i2c";
239 reg = <0x3100 0x100>;
240 interrupts = <43 2>;
241 interrupt-parent = <&mpic>;
242 dfsrr;
243 };
244
245 dma@c300 {
246 #address-cells = <1>;
247 #size-cells = <1>;
248 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
249 reg = <0xc300 0x4>;
250 ranges = <0x0 0xc100 0x200>;
251 cell-index = <1>;
252 dma-channel@0 {
253 compatible = "fsl,mpc8572-dma-channel",
254 "fsl,eloplus-dma-channel";
255 reg = <0x0 0x80>;
256 cell-index = <0>;
257 interrupt-parent = <&mpic>;
258 interrupts = <76 2>;
259 };
260 dma-channel@80 {
261 compatible = "fsl,mpc8572-dma-channel",
262 "fsl,eloplus-dma-channel";
263 reg = <0x80 0x80>;
264 cell-index = <1>;
265 interrupt-parent = <&mpic>;
266 interrupts = <77 2>;
267 };
268 dma-channel@100 {
269 compatible = "fsl,mpc8572-dma-channel",
270 "fsl,eloplus-dma-channel";
271 reg = <0x100 0x80>;
272 cell-index = <2>;
273 interrupt-parent = <&mpic>;
274 interrupts = <78 2>;
275 };
276 dma-channel@180 {
277 compatible = "fsl,mpc8572-dma-channel",
278 "fsl,eloplus-dma-channel";
279 reg = <0x180 0x80>;
280 cell-index = <3>;
281 interrupt-parent = <&mpic>;
282 interrupts = <79 2>;
283 };
284 };
285
286 dma@21300 {
287 #address-cells = <1>;
288 #size-cells = <1>;
289 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
290 reg = <0x21300 0x4>;
291 ranges = <0x0 0x21100 0x200>;
292 cell-index = <0>;
293 dma-channel@0 {
294 compatible = "fsl,mpc8572-dma-channel",
295 "fsl,eloplus-dma-channel";
296 reg = <0x0 0x80>;
297 cell-index = <0>;
298 interrupt-parent = <&mpic>;
299 interrupts = <20 2>;
300 };
301 dma-channel@80 {
302 compatible = "fsl,mpc8572-dma-channel",
303 "fsl,eloplus-dma-channel";
304 reg = <0x80 0x80>;
305 cell-index = <1>;
306 interrupt-parent = <&mpic>;
307 interrupts = <21 2>;
308 };
309 dma-channel@100 {
310 compatible = "fsl,mpc8572-dma-channel",
311 "fsl,eloplus-dma-channel";
312 reg = <0x100 0x80>;
313 cell-index = <2>;
314 interrupt-parent = <&mpic>;
315 interrupts = <22 2>;
316 };
317 dma-channel@180 {
318 compatible = "fsl,mpc8572-dma-channel",
319 "fsl,eloplus-dma-channel";
320 reg = <0x180 0x80>;
321 cell-index = <3>;
322 interrupt-parent = <&mpic>;
323 interrupts = <23 2>;
324 };
325 };
326
327 ptp_clock@24E00 {
328 compatible = "fsl,etsec-ptp";
329 reg = <0x24E00 0xB0>;
330 interrupts = <68 2 69 2 70 2 71 2>;
331 interrupt-parent = < &mpic >;
332 fsl,tclk-period = <5>;
333 fsl,tmr-prsc = <200>;
334 fsl,tmr-add = <0xAAAAAAAB>;
335 fsl,tmr-fiper1 = <0x3B9AC9FB>;
336 fsl,tmr-fiper2 = <0x3B9AC9FB>;
337 fsl,max-adj = <499999999>;
338 };
339
340 enet0: ethernet@24000 {
341 #address-cells = <1>;
342 #size-cells = <1>;
343 cell-index = <0>;
344 device_type = "network";
345 model = "eTSEC";
346 compatible = "gianfar";
347 reg = <0x24000 0x1000>;
348 ranges = <0x0 0x24000 0x1000>;
349 local-mac-address = [ 00 00 00 00 00 00 ];
350 interrupts = <29 2 30 2 34 2>;
351 interrupt-parent = <&mpic>;
352 tbi-handle = <&tbi0>;
353 phy-handle = <&phy0>;
354 phy-connection-type = "rgmii-id";
355
356 mdio@520 {
357 #address-cells = <1>;
358 #size-cells = <0>;
359 compatible = "fsl,gianfar-mdio";
360 reg = <0x520 0x20>;
361
362 phy0: ethernet-phy@0 {
363 interrupt-parent = <&mpic>;
364 interrupts = <10 1>;
365 reg = <0x0>;
366 };
367 phy1: ethernet-phy@1 {
368 interrupt-parent = <&mpic>;
369 interrupts = <10 1>;
370 reg = <0x1>;
371 };
372 phy2: ethernet-phy@2 {
373 interrupt-parent = <&mpic>;
374 interrupts = <10 1>;
375 reg = <0x2>;
376 };
377 phy3: ethernet-phy@3 {
378 interrupt-parent = <&mpic>;
379 interrupts = <10 1>;
380 reg = <0x3>;
381 };
382
383 tbi0: tbi-phy@11 {
384 reg = <0x11>;
385 device_type = "tbi-phy";
386 };
387 };
388 };
389
390 enet1: ethernet@25000 {
391 #address-cells = <1>;
392 #size-cells = <1>;
393 cell-index = <1>;
394 device_type = "network";
395 model = "eTSEC";
396 compatible = "gianfar";
397 reg = <0x25000 0x1000>;
398 ranges = <0x0 0x25000 0x1000>;
399 local-mac-address = [ 00 00 00 00 00 00 ];
400 interrupts = <35 2 36 2 40 2>;
401 interrupt-parent = <&mpic>;
402 tbi-handle = <&tbi1>;
403 phy-handle = <&phy1>;
404 phy-connection-type = "rgmii-id";
405
406 mdio@520 {
407 #address-cells = <1>;
408 #size-cells = <0>;
409 compatible = "fsl,gianfar-tbi";
410 reg = <0x520 0x20>;
411
412 tbi1: tbi-phy@11 {
413 reg = <0x11>;
414 device_type = "tbi-phy";
415 };
416 };
417 };
418
419 enet2: ethernet@26000 {
420 #address-cells = <1>;
421 #size-cells = <1>;
422 cell-index = <2>;
423 device_type = "network";
424 model = "eTSEC";
425 compatible = "gianfar";
426 reg = <0x26000 0x1000>;
427 ranges = <0x0 0x26000 0x1000>;
428 local-mac-address = [ 00 00 00 00 00 00 ];
429 interrupts = <31 2 32 2 33 2>;
430 interrupt-parent = <&mpic>;
431 tbi-handle = <&tbi2>;
432 phy-handle = <&phy2>;
433 phy-connection-type = "rgmii-id";
434
435 mdio@520 {
436 #address-cells = <1>;
437 #size-cells = <0>;
438 compatible = "fsl,gianfar-tbi";
439 reg = <0x520 0x20>;
440
441 tbi2: tbi-phy@11 {
442 reg = <0x11>;
443 device_type = "tbi-phy";
444 };
445 };
446 };
447
448 enet3: ethernet@27000 {
449 #address-cells = <1>;
450 #size-cells = <1>;
451 cell-index = <3>;
452 device_type = "network";
453 model = "eTSEC";
454 compatible = "gianfar";
455 reg = <0x27000 0x1000>;
456 ranges = <0x0 0x27000 0x1000>;
457 local-mac-address = [ 00 00 00 00 00 00 ];
458 interrupts = <37 2 38 2 39 2>;
459 interrupt-parent = <&mpic>;
460 tbi-handle = <&tbi3>;
461 phy-handle = <&phy3>;
462 phy-connection-type = "rgmii-id";
463
464 mdio@520 {
465 #address-cells = <1>;
466 #size-cells = <0>;
467 compatible = "fsl,gianfar-tbi";
468 reg = <0x520 0x20>;
469
470 tbi3: tbi-phy@11 {
471 reg = <0x11>;
472 device_type = "tbi-phy";
473 };
474 };
475 };
476
477 serial0: serial@4500 {
478 cell-index = <0>;
479 device_type = "serial";
480 compatible = "ns16550";
481 reg = <0x4500 0x100>;
482 clock-frequency = <0>;
483 interrupts = <42 2>;
484 interrupt-parent = <&mpic>;
485 };
486
487 serial1: serial@4600 {
488 cell-index = <1>;
489 device_type = "serial";
490 compatible = "ns16550";
491 reg = <0x4600 0x100>;
492 clock-frequency = <0>;
493 interrupts = <42 2>;
494 interrupt-parent = <&mpic>;
495 };
496
497 global-utilities@e0000 { //global utilities block
498 compatible = "fsl,mpc8572-guts";
499 reg = <0xe0000 0x1000>;
500 fsl,has-rstcr;
501 };
502
503 msi@41600 {
504 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
505 reg = <0x41600 0x80>;
506 msi-available-ranges = <0 0x100>;
507 interrupts = <
508 0xe0 0
509 0xe1 0
510 0xe2 0
511 0xe3 0
512 0xe4 0
513 0xe5 0
514 0xe6 0
515 0xe7 0>;
516 interrupt-parent = <&mpic>;
517 };
518
519 crypto@30000 {
520 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
521 "fsl,sec2.1", "fsl,sec2.0";
522 reg = <0x30000 0x10000>;
523 interrupts = <45 2 58 2>;
524 interrupt-parent = <&mpic>;
525 fsl,num-channels = <4>;
526 fsl,channel-fifo-len = <24>;
527 fsl,exec-units-mask = <0x9fe>;
528 fsl,descriptor-types-mask = <0x3ab0ebf>;
529 };
530
531 mpic: pic@40000 {
532 interrupt-controller;
533 #address-cells = <0>;
534 #interrupt-cells = <2>;
535 reg = <0x40000 0x40000>;
536 compatible = "chrp,open-pic";
537 device_type = "open-pic";
538 };
36 }; 539 };
37 540
38 board_pci0: pci0: pcie@ffe08000 { 541 pci0: pcie@ffe08000 {
542 compatible = "fsl,mpc8548-pcie";
543 device_type = "pci";
544 #interrupt-cells = <1>;
545 #size-cells = <2>;
546 #address-cells = <3>;
39 reg = <0 0xffe08000 0 0x1000>; 547 reg = <0 0xffe08000 0 0x1000>;
548 bus-range = <0 255>;
40 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 549 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
41 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; 550 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
551 clock-frequency = <33333333>;
552 interrupt-parent = <&mpic>;
553 interrupts = <24 2>;
554 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
555 interrupt-map = <
556 /* IDSEL 0x11 func 0 - PCI slot 1 */
557 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
558 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
559 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
560 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
561
562 /* IDSEL 0x11 func 1 - PCI slot 1 */
563 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
564 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
565 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
566 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
567
568 /* IDSEL 0x11 func 2 - PCI slot 1 */
569 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
570 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
571 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
572 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
573
574 /* IDSEL 0x11 func 3 - PCI slot 1 */
575 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
576 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
577 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
578 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
579
580 /* IDSEL 0x11 func 4 - PCI slot 1 */
581 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
582 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
583 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
584 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
585
586 /* IDSEL 0x11 func 5 - PCI slot 1 */
587 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
588 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
589 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
590 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
591
592 /* IDSEL 0x11 func 6 - PCI slot 1 */
593 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
594 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
595 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
596 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
597
598 /* IDSEL 0x11 func 7 - PCI slot 1 */
599 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
600 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
601 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
602 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
603
604 /* IDSEL 0x12 func 0 - PCI slot 2 */
605 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
606 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
607 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
608 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
609
610 /* IDSEL 0x12 func 1 - PCI slot 2 */
611 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
612 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
613 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
614 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
615
616 /* IDSEL 0x12 func 2 - PCI slot 2 */
617 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
618 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
619 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
620 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
621
622 /* IDSEL 0x12 func 3 - PCI slot 2 */
623 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
624 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
625 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
626 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
627
628 /* IDSEL 0x12 func 4 - PCI slot 2 */
629 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
630 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
631 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
632 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
633
634 /* IDSEL 0x12 func 5 - PCI slot 2 */
635 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
636 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
637 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
638 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
639
640 /* IDSEL 0x12 func 6 - PCI slot 2 */
641 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
642 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
643 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
644 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
645
646 /* IDSEL 0x12 func 7 - PCI slot 2 */
647 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
648 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
649 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
650 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
651
652 // IDSEL 0x1c USB
653 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
654 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
655 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
656 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
657
658 // IDSEL 0x1d Audio
659 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
660
661 // IDSEL 0x1e Legacy
662 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
663 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
664
665 // IDSEL 0x1f IDE/SATA
666 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
667 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
668
669 >;
670
42 pcie@0 { 671 pcie@0 {
672 reg = <0x0 0x0 0x0 0x0 0x0>;
673 #size-cells = <2>;
674 #address-cells = <3>;
675 device_type = "pci";
43 ranges = <0x2000000 0x0 0x80000000 676 ranges = <0x2000000 0x0 0x80000000
44 0x2000000 0x0 0x80000000 677 0x2000000 0x0 0x80000000
45 0x0 0x20000000 678 0x0 0x20000000
@@ -47,14 +680,99 @@
47 0x1000000 0x0 0x0 680 0x1000000 0x0 0x0
48 0x1000000 0x0 0x0 681 0x1000000 0x0 0x0
49 0x0 0x10000>; 682 0x0 0x10000>;
683 uli1575@0 {
684 reg = <0x0 0x0 0x0 0x0 0x0>;
685 #size-cells = <2>;
686 #address-cells = <3>;
687 ranges = <0x2000000 0x0 0x80000000
688 0x2000000 0x0 0x80000000
689 0x0 0x20000000
690
691 0x1000000 0x0 0x0
692 0x1000000 0x0 0x0
693 0x0 0x10000>;
694 isa@1e {
695 device_type = "isa";
696 #interrupt-cells = <2>;
697 #size-cells = <1>;
698 #address-cells = <2>;
699 reg = <0xf000 0x0 0x0 0x0 0x0>;
700 ranges = <0x1 0x0 0x1000000 0x0 0x0
701 0x1000>;
702 interrupt-parent = <&i8259>;
703
704 i8259: interrupt-controller@20 {
705 reg = <0x1 0x20 0x2
706 0x1 0xa0 0x2
707 0x1 0x4d0 0x2>;
708 interrupt-controller;
709 device_type = "interrupt-controller";
710 #address-cells = <0>;
711 #interrupt-cells = <2>;
712 compatible = "chrp,iic";
713 interrupts = <9 2>;
714 interrupt-parent = <&mpic>;
715 };
716
717 i8042@60 {
718 #size-cells = <0>;
719 #address-cells = <1>;
720 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
721 interrupts = <1 3 12 3>;
722 interrupt-parent =
723 <&i8259>;
724
725 keyboard@0 {
726 reg = <0x0>;
727 compatible = "pnpPNP,303";
728 };
729
730 mouse@1 {
731 reg = <0x1>;
732 compatible = "pnpPNP,f03";
733 };
734 };
735
736 rtc@70 {
737 compatible = "pnpPNP,b00";
738 reg = <0x1 0x70 0x2>;
739 };
740
741 gpio@400 {
742 reg = <0x1 0x400 0x80>;
743 };
744 };
745 };
50 }; 746 };
747
51 }; 748 };
52 749
53 pci1: pcie@ffe09000 { 750 pci1: pcie@ffe09000 {
751 compatible = "fsl,mpc8548-pcie";
752 device_type = "pci";
753 #interrupt-cells = <1>;
754 #size-cells = <2>;
755 #address-cells = <3>;
54 reg = <0 0xffe09000 0 0x1000>; 756 reg = <0 0xffe09000 0 0x1000>;
757 bus-range = <0 255>;
55 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 758 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
56 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; 759 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
760 clock-frequency = <33333333>;
761 interrupt-parent = <&mpic>;
762 interrupts = <25 2>;
763 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
764 interrupt-map = <
765 /* IDSEL 0x0 */
766 0000 0x0 0x0 0x1 &mpic 0x4 0x1
767 0000 0x0 0x0 0x2 &mpic 0x5 0x1
768 0000 0x0 0x0 0x3 &mpic 0x6 0x1
769 0000 0x0 0x0 0x4 &mpic 0x7 0x1
770 >;
57 pcie@0 { 771 pcie@0 {
772 reg = <0x0 0x0 0x0 0x0 0x0>;
773 #size-cells = <2>;
774 #address-cells = <3>;
775 device_type = "pci";
58 ranges = <0x2000000 0x0 0xa0000000 776 ranges = <0x2000000 0x0 0xa0000000
59 0x2000000 0x0 0xa0000000 777 0x2000000 0x0 0xa0000000
60 0x0 0x20000000 778 0x0 0x20000000
@@ -66,10 +784,31 @@
66 }; 784 };
67 785
68 pci2: pcie@ffe0a000 { 786 pci2: pcie@ffe0a000 {
787 compatible = "fsl,mpc8548-pcie";
788 device_type = "pci";
789 #interrupt-cells = <1>;
790 #size-cells = <2>;
791 #address-cells = <3>;
69 reg = <0 0xffe0a000 0 0x1000>; 792 reg = <0 0xffe0a000 0 0x1000>;
793 bus-range = <0 255>;
70 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 794 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
71 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; 795 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
796 clock-frequency = <33333333>;
797 interrupt-parent = <&mpic>;
798 interrupts = <26 2>;
799 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
800 interrupt-map = <
801 /* IDSEL 0x0 */
802 0000 0x0 0x0 0x1 &mpic 0x0 0x1
803 0000 0x0 0x0 0x2 &mpic 0x1 0x1
804 0000 0x0 0x0 0x3 &mpic 0x2 0x1
805 0000 0x0 0x0 0x4 &mpic 0x3 0x1
806 >;
72 pcie@0 { 807 pcie@0 {
808 reg = <0x0 0x0 0x0 0x0 0x0>;
809 #size-cells = <2>;
810 #address-cells = <3>;
811 device_type = "pci";
73 ranges = <0x2000000 0x0 0xc0000000 812 ranges = <0x2000000 0x0 0xc0000000
74 0x2000000 0x0 0xc0000000 813 0x2000000 0x0 0xc0000000
75 0x0 0x20000000 814 0x0 0x20000000
@@ -80,11 +819,3 @@
80 }; 819 };
81 }; 820 };
82}; 821};
83
84/*
85 * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
86 * for interrupt-map & interrupt-map-mask
87 */
88
89/include/ "fsl/mpc8572si-post.dtsi"
90/include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/mpc8572ds.dtsi
deleted file mode 100644
index 357490bb84d..00000000000
--- a/arch/powerpc/boot/dts/mpc8572ds.dtsi
+++ /dev/null
@@ -1,428 +0,0 @@
1/*
2 * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
47 };
48
49 partition@3000000 {
50 reg = <0x03000000 0x00e00000>;
51 label = "diagnostic-nor";
52 read-only;
53 };
54
55 partition@3e00000 {
56 reg = <0x03e00000 0x00200000>;
57 label = "dink-nor";
58 read-only;
59 };
60
61 partition@4000000 {
62 reg = <0x04000000 0x00400000>;
63 label = "kernel-nor";
64 };
65
66 partition@4400000 {
67 reg = <0x04400000 0x03b00000>;
68 label = "fs-nor";
69 };
70
71 partition@7f00000 {
72 reg = <0x07f00000 0x00060000>;
73 label = "dtb-nor";
74 };
75
76 partition@7f60000 {
77 reg = <0x07f60000 0x00020000>;
78 label = "env-nor";
79 read-only;
80 };
81
82 partition@7f80000 {
83 reg = <0x07f80000 0x00080000>;
84 label = "u-boot-nor";
85 read-only;
86 };
87 };
88
89 nand@2,0 {
90 #address-cells = <1>;
91 #size-cells = <1>;
92 compatible = "fsl,mpc8572-fcm-nand",
93 "fsl,elbc-fcm-nand";
94 reg = <0x2 0x0 0x40000>;
95
96 partition@0 {
97 reg = <0x0 0x02000000>;
98 label = "u-boot-nand";
99 read-only;
100 };
101
102 partition@2000000 {
103 reg = <0x02000000 0x10000000>;
104 label = "fs-nand";
105 };
106
107 partition@12000000 {
108 reg = <0x12000000 0x08000000>;
109 label = "ramdisk-nand";
110 };
111
112 partition@1a000000 {
113 reg = <0x1a000000 0x04000000>;
114 label = "kernel-nand";
115 };
116
117 partition@1e000000 {
118 reg = <0x1e000000 0x01000000>;
119 label = "dtb-nand";
120 };
121
122 partition@1f000000 {
123 reg = <0x1f000000 0x21000000>;
124 label = "empty-nand";
125 };
126 };
127
128 nand@4,0 {
129 compatible = "fsl,mpc8572-fcm-nand",
130 "fsl,elbc-fcm-nand";
131 reg = <0x4 0x0 0x40000>;
132 };
133
134 nand@5,0 {
135 compatible = "fsl,mpc8572-fcm-nand",
136 "fsl,elbc-fcm-nand";
137 reg = <0x5 0x0 0x40000>;
138 };
139
140 nand@6,0 {
141 compatible = "fsl,mpc8572-fcm-nand",
142 "fsl,elbc-fcm-nand";
143 reg = <0x6 0x0 0x40000>;
144 };
145};
146
147&board_soc {
148 enet0: ethernet@24000 {
149 tbi-handle = <&tbi0>;
150 phy-handle = <&phy0>;
151 phy-connection-type = "rgmii-id";
152 };
153
154 mdio@24520 {
155 phy0: ethernet-phy@0 {
156 interrupts = <10 1 0 0>;
157 reg = <0x0>;
158 };
159 phy1: ethernet-phy@1 {
160 interrupts = <10 1 0 0>;
161 reg = <0x1>;
162 };
163 phy2: ethernet-phy@2 {
164 interrupts = <10 1 0 0>;
165 reg = <0x2>;
166 };
167 phy3: ethernet-phy@3 {
168 interrupts = <10 1 0 0>;
169 reg = <0x3>;
170 };
171
172 sgmii_phy0: sgmii-phy@0 {
173 interrupts = <6 1 0 0>;
174 reg = <0x1c>;
175 };
176 sgmii_phy1: sgmii-phy@1 {
177 interrupts = <6 1 0 0>;
178 reg = <0x1d>;
179 };
180 sgmii_phy2: sgmii-phy@2 {
181 interrupts = <7 1 0 0>;
182 reg = <0x1e>;
183 };
184 sgmii_phy3: sgmii-phy@3 {
185 interrupts = <7 1 0 0>;
186 reg = <0x1f>;
187 };
188
189 tbi0: tbi-phy@11 {
190 reg = <0x11>;
191 device_type = "tbi-phy";
192 };
193 };
194
195 ptp_clock@24e00 {
196 fsl,tclk-period = <5>;
197 fsl,tmr-prsc = <200>;
198 fsl,tmr-add = <0xAAAAAAAB>;
199 fsl,tmr-fiper1 = <0x3B9AC9FB>;
200 fsl,tmr-fiper2 = <0x3B9AC9FB>;
201 fsl,max-adj = <499999999>;
202 };
203
204 enet1: ethernet@25000 {
205 tbi-handle = <&tbi1>;
206 phy-handle = <&phy1>;
207 phy-connection-type = "rgmii-id";
208
209 };
210
211 mdio@25520 {
212 tbi1: tbi-phy@11 {
213 reg = <0x11>;
214 device_type = "tbi-phy";
215 };
216 };
217
218 enet2: ethernet@26000 {
219 tbi-handle = <&tbi2>;
220 phy-handle = <&phy2>;
221 phy-connection-type = "rgmii-id";
222
223 };
224 mdio@26520 {
225 tbi2: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231 enet3: ethernet@27000 {
232 tbi-handle = <&tbi3>;
233 phy-handle = <&phy3>;
234 phy-connection-type = "rgmii-id";
235 };
236
237 mdio@27520 {
238 tbi3: tbi-phy@11 {
239 reg = <0x11>;
240 device_type = "tbi-phy";
241 };
242 };
243};
244
245&board_pci0 {
246 pcie@0 {
247 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
248 interrupt-map = <
249 /* IDSEL 0x11 func 0 - PCI slot 1 */
250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
252 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
253 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
254
255 /* IDSEL 0x11 func 1 - PCI slot 1 */
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
258 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
259 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
260
261 /* IDSEL 0x11 func 2 - PCI slot 1 */
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
263 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
264 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
265 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
266
267 /* IDSEL 0x11 func 3 - PCI slot 1 */
268 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
269 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
270 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
271 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
272
273 /* IDSEL 0x11 func 4 - PCI slot 1 */
274 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
275 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
276 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
277 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
278
279 /* IDSEL 0x11 func 5 - PCI slot 1 */
280 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
281 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
282 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
283 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
284
285 /* IDSEL 0x11 func 6 - PCI slot 1 */
286 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
287 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
288 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
289 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
290
291 /* IDSEL 0x11 func 7 - PCI slot 1 */
292 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
293 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
294 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
295 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
296
297 /* IDSEL 0x12 func 0 - PCI slot 2 */
298 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
299 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
300 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
301 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
302
303 /* IDSEL 0x12 func 1 - PCI slot 2 */
304 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
305 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
306 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
307 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
308
309 /* IDSEL 0x12 func 2 - PCI slot 2 */
310 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
311 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
312 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
313 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
314
315 /* IDSEL 0x12 func 3 - PCI slot 2 */
316 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
317 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
318 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
319 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
320
321 /* IDSEL 0x12 func 4 - PCI slot 2 */
322 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
323 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
324 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
325 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
326
327 /* IDSEL 0x12 func 5 - PCI slot 2 */
328 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
329 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
330 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
331 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
332
333 /* IDSEL 0x12 func 6 - PCI slot 2 */
334 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
335 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
336 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
337 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
338
339 /* IDSEL 0x12 func 7 - PCI slot 2 */
340 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
341 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
342 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
343 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
344
345 // IDSEL 0x1c USB
346 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
347 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
348 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
349 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
350
351 // IDSEL 0x1d Audio
352 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
353
354 // IDSEL 0x1e Legacy
355 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
356 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
357
358 // IDSEL 0x1f IDE/SATA
359 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
360 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
361 >;
362
363
364 uli1575@0 {
365 reg = <0x0 0x0 0x0 0x0 0x0>;
366 #size-cells = <2>;
367 #address-cells = <3>;
368 ranges = <0x2000000 0x0 0x80000000
369 0x2000000 0x0 0x80000000
370 0x0 0x20000000
371
372 0x1000000 0x0 0x0
373 0x1000000 0x0 0x0
374 0x0 0x10000>;
375 isa@1e {
376 device_type = "isa";
377 #interrupt-cells = <2>;
378 #size-cells = <1>;
379 #address-cells = <2>;
380 reg = <0xf000 0x0 0x0 0x0 0x0>;
381 ranges = <0x1 0x0 0x1000000 0x0 0x0
382 0x1000>;
383 interrupt-parent = <&i8259>;
384
385 i8259: interrupt-controller@20 {
386 reg = <0x1 0x20 0x2
387 0x1 0xa0 0x2
388 0x1 0x4d0 0x2>;
389 interrupt-controller;
390 device_type = "interrupt-controller";
391 #address-cells = <0>;
392 #interrupt-cells = <2>;
393 compatible = "chrp,iic";
394 interrupts = <9 2 0 0>;
395 interrupt-parent = <&mpic>;
396 };
397
398 i8042@60 {
399 #size-cells = <0>;
400 #address-cells = <1>;
401 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
402 interrupts = <1 3 12 3>;
403 interrupt-parent =
404 <&i8259>;
405
406 keyboard@0 {
407 reg = <0x0>;
408 compatible = "pnpPNP,303";
409 };
410
411 mouse@1 {
412 reg = <0x1>;
413 compatible = "pnpPNP,f03";
414 };
415 };
416
417 rtc@70 {
418 compatible = "pnpPNP,b00";
419 reg = <0x1 0x70 0x2>;
420 };
421
422 gpio@400 {
423 reg = <0x1 0x400 0x80>;
424 };
425 };
426 };
427 };
428};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
index 6c3d0b305e1..f6365db3b97 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * MPC8572DS Device Tree Source (36-bit address map) 2 * MPC8572 DS Device Tree Source
3 * 3 *
4 * Copyright 2007-2009 Freescale Semiconductor Inc. 4 * Copyright 2007-2009 Freescale Semiconductor Inc.
5 * 5 *
@@ -9,18 +9,67 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/mpc8572si-pre.dtsi" 12/dts-v1/;
13
14/ { 13/ {
15 model = "fsl,MPC8572DS"; 14 model = "fsl,MPC8572DS";
16 compatible = "fsl,MPC8572DS"; 15 compatible = "fsl,MPC8572DS";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 ethernet3 = &enet3;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 pci1 = &pci1;
28 pci2 = &pci2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 PowerPC,8572@0 {
36 device_type = "cpu";
37 reg = <0x0>;
38 d-cache-line-size = <32>; // 32 bytes
39 i-cache-line-size = <32>; // 32 bytes
40 d-cache-size = <0x8000>; // L1, 32K
41 i-cache-size = <0x8000>; // L1, 32K
42 timebase-frequency = <0>;
43 bus-frequency = <0>;
44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
46 };
47
48 PowerPC,8572@1 {
49 device_type = "cpu";
50 reg = <0x1>;
51 d-cache-line-size = <32>; // 32 bytes
52 i-cache-line-size = <32>; // 32 bytes
53 d-cache-size = <0x8000>; // L1, 32K
54 i-cache-size = <0x8000>; // L1, 32K
55 timebase-frequency = <0>;
56 bus-frequency = <0>;
57 clock-frequency = <0>;
58 next-level-cache = <&L2>;
59 };
60 };
17 61
18 memory { 62 memory {
19 device_type = "memory"; 63 device_type = "memory";
20 }; 64 };
21 65
22 board_lbc: lbc: localbus@fffe05000 { 66 localbus@fffe05000 {
67 #address-cells = <2>;
68 #size-cells = <1>;
69 compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
23 reg = <0xf 0xffe05000 0 0x1000>; 70 reg = <0xf 0xffe05000 0 0x1000>;
71 interrupts = <19 2>;
72 interrupt-parent = <&mpic>;
24 73
25 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 74 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
26 0x1 0x0 0xf 0xe0000000 0x08000000 75 0x1 0x0 0xf 0xe0000000 0x08000000
@@ -29,17 +78,588 @@
29 0x4 0x0 0xf 0xffa40000 0x00040000 78 0x4 0x0 0xf 0xffa40000 0x00040000
30 0x5 0x0 0xf 0xffa80000 0x00040000 79 0x5 0x0 0xf 0xffa80000 0x00040000
31 0x6 0x0 0xf 0xffac0000 0x00040000>; 80 0x6 0x0 0xf 0xffac0000 0x00040000>;
81
82 nor@0,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "cfi-flash";
86 reg = <0x0 0x0 0x8000000>;
87 bank-width = <2>;
88 device-width = <1>;
89
90 ramdisk@0 {
91 reg = <0x0 0x03000000>;
92 read-only;
93 };
94
95 diagnostic@3000000 {
96 reg = <0x03000000 0x00e00000>;
97 read-only;
98 };
99
100 dink@3e00000 {
101 reg = <0x03e00000 0x00200000>;
102 read-only;
103 };
104
105 kernel@4000000 {
106 reg = <0x04000000 0x00400000>;
107 read-only;
108 };
109
110 jffs2@4400000 {
111 reg = <0x04400000 0x03b00000>;
112 };
113
114 dtb@7f00000 {
115 reg = <0x07f00000 0x00080000>;
116 read-only;
117 };
118
119 u-boot@7f80000 {
120 reg = <0x07f80000 0x00080000>;
121 read-only;
122 };
123 };
124
125 nand@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "fsl,mpc8572-fcm-nand",
129 "fsl,elbc-fcm-nand";
130 reg = <0x2 0x0 0x40000>;
131
132 u-boot@0 {
133 reg = <0x0 0x02000000>;
134 read-only;
135 };
136
137 jffs2@2000000 {
138 reg = <0x02000000 0x10000000>;
139 };
140
141 ramdisk@12000000 {
142 reg = <0x12000000 0x08000000>;
143 read-only;
144 };
145
146 kernel@1a000000 {
147 reg = <0x1a000000 0x04000000>;
148 };
149
150 dtb@1e000000 {
151 reg = <0x1e000000 0x01000000>;
152 read-only;
153 };
154
155 empty@1f000000 {
156 reg = <0x1f000000 0x21000000>;
157 };
158 };
159
160 nand@4,0 {
161 compatible = "fsl,mpc8572-fcm-nand",
162 "fsl,elbc-fcm-nand";
163 reg = <0x4 0x0 0x40000>;
164 };
165
166 nand@5,0 {
167 compatible = "fsl,mpc8572-fcm-nand",
168 "fsl,elbc-fcm-nand";
169 reg = <0x5 0x0 0x40000>;
170 };
171
172 nand@6,0 {
173 compatible = "fsl,mpc8572-fcm-nand",
174 "fsl,elbc-fcm-nand";
175 reg = <0x6 0x0 0x40000>;
176 };
32 }; 177 };
33 178
34 board_soc: soc: soc8572@fffe00000 { 179 soc8572@fffe00000 {
180 #address-cells = <1>;
181 #size-cells = <1>;
182 device_type = "soc";
183 compatible = "simple-bus";
35 ranges = <0x0 0xf 0xffe00000 0x100000>; 184 ranges = <0x0 0xf 0xffe00000 0x100000>;
185 bus-frequency = <0>; // Filled out by uboot.
186
187 ecm-law@0 {
188 compatible = "fsl,ecm-law";
189 reg = <0x0 0x1000>;
190 fsl,num-laws = <12>;
191 };
192
193 ecm@1000 {
194 compatible = "fsl,mpc8572-ecm", "fsl,ecm";
195 reg = <0x1000 0x1000>;
196 interrupts = <17 2>;
197 interrupt-parent = <&mpic>;
198 };
199
200 memory-controller@2000 {
201 compatible = "fsl,mpc8572-memory-controller";
202 reg = <0x2000 0x1000>;
203 interrupt-parent = <&mpic>;
204 interrupts = <18 2>;
205 };
206
207 memory-controller@6000 {
208 compatible = "fsl,mpc8572-memory-controller";
209 reg = <0x6000 0x1000>;
210 interrupt-parent = <&mpic>;
211 interrupts = <18 2>;
212 };
213
214 L2: l2-cache-controller@20000 {
215 compatible = "fsl,mpc8572-l2-cache-controller";
216 reg = <0x20000 0x1000>;
217 cache-line-size = <32>; // 32 bytes
218 cache-size = <0x100000>; // L2, 1M
219 interrupt-parent = <&mpic>;
220 interrupts = <16 2>;
221 };
222
223 i2c@3000 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 cell-index = <0>;
227 compatible = "fsl-i2c";
228 reg = <0x3000 0x100>;
229 interrupts = <43 2>;
230 interrupt-parent = <&mpic>;
231 dfsrr;
232 };
233
234 i2c@3100 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 cell-index = <1>;
238 compatible = "fsl-i2c";
239 reg = <0x3100 0x100>;
240 interrupts = <43 2>;
241 interrupt-parent = <&mpic>;
242 dfsrr;
243 };
244
245 dma@c300 {
246 #address-cells = <1>;
247 #size-cells = <1>;
248 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
249 reg = <0xc300 0x4>;
250 ranges = <0x0 0xc100 0x200>;
251 cell-index = <1>;
252 dma-channel@0 {
253 compatible = "fsl,mpc8572-dma-channel",
254 "fsl,eloplus-dma-channel";
255 reg = <0x0 0x80>;
256 cell-index = <0>;
257 interrupt-parent = <&mpic>;
258 interrupts = <76 2>;
259 };
260 dma-channel@80 {
261 compatible = "fsl,mpc8572-dma-channel",
262 "fsl,eloplus-dma-channel";
263 reg = <0x80 0x80>;
264 cell-index = <1>;
265 interrupt-parent = <&mpic>;
266 interrupts = <77 2>;
267 };
268 dma-channel@100 {
269 compatible = "fsl,mpc8572-dma-channel",
270 "fsl,eloplus-dma-channel";
271 reg = <0x100 0x80>;
272 cell-index = <2>;
273 interrupt-parent = <&mpic>;
274 interrupts = <78 2>;
275 };
276 dma-channel@180 {
277 compatible = "fsl,mpc8572-dma-channel",
278 "fsl,eloplus-dma-channel";
279 reg = <0x180 0x80>;
280 cell-index = <3>;
281 interrupt-parent = <&mpic>;
282 interrupts = <79 2>;
283 };
284 };
285
286 dma@21300 {
287 #address-cells = <1>;
288 #size-cells = <1>;
289 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
290 reg = <0x21300 0x4>;
291 ranges = <0x0 0x21100 0x200>;
292 cell-index = <0>;
293 dma-channel@0 {
294 compatible = "fsl,mpc8572-dma-channel",
295 "fsl,eloplus-dma-channel";
296 reg = <0x0 0x80>;
297 cell-index = <0>;
298 interrupt-parent = <&mpic>;
299 interrupts = <20 2>;
300 };
301 dma-channel@80 {
302 compatible = "fsl,mpc8572-dma-channel",
303 "fsl,eloplus-dma-channel";
304 reg = <0x80 0x80>;
305 cell-index = <1>;
306 interrupt-parent = <&mpic>;
307 interrupts = <21 2>;
308 };
309 dma-channel@100 {
310 compatible = "fsl,mpc8572-dma-channel",
311 "fsl,eloplus-dma-channel";
312 reg = <0x100 0x80>;
313 cell-index = <2>;
314 interrupt-parent = <&mpic>;
315 interrupts = <22 2>;
316 };
317 dma-channel@180 {
318 compatible = "fsl,mpc8572-dma-channel",
319 "fsl,eloplus-dma-channel";
320 reg = <0x180 0x80>;
321 cell-index = <3>;
322 interrupt-parent = <&mpic>;
323 interrupts = <23 2>;
324 };
325 };
326
327 enet0: ethernet@24000 {
328 #address-cells = <1>;
329 #size-cells = <1>;
330 cell-index = <0>;
331 device_type = "network";
332 model = "eTSEC";
333 compatible = "gianfar";
334 reg = <0x24000 0x1000>;
335 ranges = <0x0 0x24000 0x1000>;
336 local-mac-address = [ 00 00 00 00 00 00 ];
337 interrupts = <29 2 30 2 34 2>;
338 interrupt-parent = <&mpic>;
339 tbi-handle = <&tbi0>;
340 phy-handle = <&phy0>;
341 phy-connection-type = "rgmii-id";
342
343 mdio@520 {
344 #address-cells = <1>;
345 #size-cells = <0>;
346 compatible = "fsl,gianfar-mdio";
347 reg = <0x520 0x20>;
348
349 phy0: ethernet-phy@0 {
350 interrupt-parent = <&mpic>;
351 interrupts = <10 1>;
352 reg = <0x0>;
353 };
354 phy1: ethernet-phy@1 {
355 interrupt-parent = <&mpic>;
356 interrupts = <10 1>;
357 reg = <0x1>;
358 };
359 phy2: ethernet-phy@2 {
360 interrupt-parent = <&mpic>;
361 interrupts = <10 1>;
362 reg = <0x2>;
363 };
364 phy3: ethernet-phy@3 {
365 interrupt-parent = <&mpic>;
366 interrupts = <10 1>;
367 reg = <0x3>;
368 };
369
370 tbi0: tbi-phy@11 {
371 reg = <0x11>;
372 device_type = "tbi-phy";
373 };
374 };
375 };
376
377 enet1: ethernet@25000 {
378 #address-cells = <1>;
379 #size-cells = <1>;
380 cell-index = <1>;
381 device_type = "network";
382 model = "eTSEC";
383 compatible = "gianfar";
384 reg = <0x25000 0x1000>;
385 ranges = <0x0 0x25000 0x1000>;
386 local-mac-address = [ 00 00 00 00 00 00 ];
387 interrupts = <35 2 36 2 40 2>;
388 interrupt-parent = <&mpic>;
389 tbi-handle = <&tbi1>;
390 phy-handle = <&phy1>;
391 phy-connection-type = "rgmii-id";
392
393 mdio@520 {
394 #address-cells = <1>;
395 #size-cells = <0>;
396 compatible = "fsl,gianfar-tbi";
397 reg = <0x520 0x20>;
398
399 tbi1: tbi-phy@11 {
400 reg = <0x11>;
401 device_type = "tbi-phy";
402 };
403 };
404 };
405
406 enet2: ethernet@26000 {
407 #address-cells = <1>;
408 #size-cells = <1>;
409 cell-index = <2>;
410 device_type = "network";
411 model = "eTSEC";
412 compatible = "gianfar";
413 reg = <0x26000 0x1000>;
414 ranges = <0x0 0x26000 0x1000>;
415 local-mac-address = [ 00 00 00 00 00 00 ];
416 interrupts = <31 2 32 2 33 2>;
417 interrupt-parent = <&mpic>;
418 tbi-handle = <&tbi2>;
419 phy-handle = <&phy2>;
420 phy-connection-type = "rgmii-id";
421
422 mdio@520 {
423 #address-cells = <1>;
424 #size-cells = <0>;
425 compatible = "fsl,gianfar-tbi";
426 reg = <0x520 0x20>;
427
428 tbi2: tbi-phy@11 {
429 reg = <0x11>;
430 device_type = "tbi-phy";
431 };
432 };
433 };
434
435 enet3: ethernet@27000 {
436 #address-cells = <1>;
437 #size-cells = <1>;
438 cell-index = <3>;
439 device_type = "network";
440 model = "eTSEC";
441 compatible = "gianfar";
442 reg = <0x27000 0x1000>;
443 ranges = <0x0 0x27000 0x1000>;
444 local-mac-address = [ 00 00 00 00 00 00 ];
445 interrupts = <37 2 38 2 39 2>;
446 interrupt-parent = <&mpic>;
447 tbi-handle = <&tbi3>;
448 phy-handle = <&phy3>;
449 phy-connection-type = "rgmii-id";
450
451 mdio@520 {
452 #address-cells = <1>;
453 #size-cells = <0>;
454 compatible = "fsl,gianfar-tbi";
455 reg = <0x520 0x20>;
456
457 tbi3: tbi-phy@11 {
458 reg = <0x11>;
459 device_type = "tbi-phy";
460 };
461 };
462 };
463
464 serial0: serial@4500 {
465 cell-index = <0>;
466 device_type = "serial";
467 compatible = "ns16550";
468 reg = <0x4500 0x100>;
469 clock-frequency = <0>;
470 interrupts = <42 2>;
471 interrupt-parent = <&mpic>;
472 };
473
474 serial1: serial@4600 {
475 cell-index = <1>;
476 device_type = "serial";
477 compatible = "ns16550";
478 reg = <0x4600 0x100>;
479 clock-frequency = <0>;
480 interrupts = <42 2>;
481 interrupt-parent = <&mpic>;
482 };
483
484 global-utilities@e0000 { //global utilities block
485 compatible = "fsl,mpc8572-guts";
486 reg = <0xe0000 0x1000>;
487 fsl,has-rstcr;
488 };
489
490 msi@41600 {
491 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
492 reg = <0x41600 0x80>;
493 msi-available-ranges = <0 0x100>;
494 interrupts = <
495 0xe0 0
496 0xe1 0
497 0xe2 0
498 0xe3 0
499 0xe4 0
500 0xe5 0
501 0xe6 0
502 0xe7 0>;
503 interrupt-parent = <&mpic>;
504 };
505
506 crypto@30000 {
507 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
508 "fsl,sec2.1", "fsl,sec2.0";
509 reg = <0x30000 0x10000>;
510 interrupts = <45 2 58 2>;
511 interrupt-parent = <&mpic>;
512 fsl,num-channels = <4>;
513 fsl,channel-fifo-len = <24>;
514 fsl,exec-units-mask = <0x9fe>;
515 fsl,descriptor-types-mask = <0x3ab0ebf>;
516 };
517
518 mpic: pic@40000 {
519 interrupt-controller;
520 #address-cells = <0>;
521 #interrupt-cells = <2>;
522 reg = <0x40000 0x40000>;
523 compatible = "chrp,open-pic";
524 device_type = "open-pic";
525 };
36 }; 526 };
37 527
38 board_pci0: pci0: pcie@fffe08000 { 528 pci0: pcie@fffe08000 {
529 compatible = "fsl,mpc8548-pcie";
530 device_type = "pci";
531 #interrupt-cells = <1>;
532 #size-cells = <2>;
533 #address-cells = <3>;
39 reg = <0xf 0xffe08000 0 0x1000>; 534 reg = <0xf 0xffe08000 0 0x1000>;
535 bus-range = <0 255>;
40 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 536 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
41 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; 537 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
538 clock-frequency = <33333333>;
539 interrupt-parent = <&mpic>;
540 interrupts = <24 2>;
541 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
542 interrupt-map = <
543 /* IDSEL 0x11 func 0 - PCI slot 1 */
544 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
545 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
546 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
547 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
548
549 /* IDSEL 0x11 func 1 - PCI slot 1 */
550 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
551 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
552 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
553 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
554
555 /* IDSEL 0x11 func 2 - PCI slot 1 */
556 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
557 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
558 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
559 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
560
561 /* IDSEL 0x11 func 3 - PCI slot 1 */
562 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
563 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
564 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
565 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
566
567 /* IDSEL 0x11 func 4 - PCI slot 1 */
568 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
569 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
570 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
571 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
572
573 /* IDSEL 0x11 func 5 - PCI slot 1 */
574 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
575 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
576 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
577 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
578
579 /* IDSEL 0x11 func 6 - PCI slot 1 */
580 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
581 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
582 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
583 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
584
585 /* IDSEL 0x11 func 7 - PCI slot 1 */
586 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
587 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
588 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
589 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
590
591 /* IDSEL 0x12 func 0 - PCI slot 2 */
592 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
593 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
594 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
595 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
596
597 /* IDSEL 0x12 func 1 - PCI slot 2 */
598 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
599 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
600 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
601 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
602
603 /* IDSEL 0x12 func 2 - PCI slot 2 */
604 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
605 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
606 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
607 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
608
609 /* IDSEL 0x12 func 3 - PCI slot 2 */
610 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
611 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
612 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
613 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
614
615 /* IDSEL 0x12 func 4 - PCI slot 2 */
616 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
617 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
618 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
619 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
620
621 /* IDSEL 0x12 func 5 - PCI slot 2 */
622 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
623 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
624 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
625 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
626
627 /* IDSEL 0x12 func 6 - PCI slot 2 */
628 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
629 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
630 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
631 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
632
633 /* IDSEL 0x12 func 7 - PCI slot 2 */
634 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
635 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
636 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
637 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
638
639 // IDSEL 0x1c USB
640 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
641 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
642 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
643 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
644
645 // IDSEL 0x1d Audio
646 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
647
648 // IDSEL 0x1e Legacy
649 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
650 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
651
652 // IDSEL 0x1f IDE/SATA
653 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
654 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
655
656 >;
657
42 pcie@0 { 658 pcie@0 {
659 reg = <0x0 0x0 0x0 0x0 0x0>;
660 #size-cells = <2>;
661 #address-cells = <3>;
662 device_type = "pci";
43 ranges = <0x2000000 0x0 0xe0000000 663 ranges = <0x2000000 0x0 0xe0000000
44 0x2000000 0x0 0xe0000000 664 0x2000000 0x0 0xe0000000
45 0x0 0x20000000 665 0x0 0x20000000
@@ -47,14 +667,99 @@
47 0x1000000 0x0 0x0 667 0x1000000 0x0 0x0
48 0x1000000 0x0 0x0 668 0x1000000 0x0 0x0
49 0x0 0x10000>; 669 0x0 0x10000>;
670 uli1575@0 {
671 reg = <0x0 0x0 0x0 0x0 0x0>;
672 #size-cells = <2>;
673 #address-cells = <3>;
674 ranges = <0x2000000 0x0 0xe0000000
675 0x2000000 0x0 0xe0000000
676 0x0 0x20000000
677
678 0x1000000 0x0 0x0
679 0x1000000 0x0 0x0
680 0x0 0x10000>;
681 isa@1e {
682 device_type = "isa";
683 #interrupt-cells = <2>;
684 #size-cells = <1>;
685 #address-cells = <2>;
686 reg = <0xf000 0x0 0x0 0x0 0x0>;
687 ranges = <0x1 0x0 0x1000000 0x0 0x0
688 0x1000>;
689 interrupt-parent = <&i8259>;
690
691 i8259: interrupt-controller@20 {
692 reg = <0x1 0x20 0x2
693 0x1 0xa0 0x2
694 0x1 0x4d0 0x2>;
695 interrupt-controller;
696 device_type = "interrupt-controller";
697 #address-cells = <0>;
698 #interrupt-cells = <2>;
699 compatible = "chrp,iic";
700 interrupts = <9 2>;
701 interrupt-parent = <&mpic>;
702 };
703
704 i8042@60 {
705 #size-cells = <0>;
706 #address-cells = <1>;
707 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
708 interrupts = <1 3 12 3>;
709 interrupt-parent =
710 <&i8259>;
711
712 keyboard@0 {
713 reg = <0x0>;
714 compatible = "pnpPNP,303";
715 };
716
717 mouse@1 {
718 reg = <0x1>;
719 compatible = "pnpPNP,f03";
720 };
721 };
722
723 rtc@70 {
724 compatible = "pnpPNP,b00";
725 reg = <0x1 0x70 0x2>;
726 };
727
728 gpio@400 {
729 reg = <0x1 0x400 0x80>;
730 };
731 };
732 };
50 }; 733 };
734
51 }; 735 };
52 736
53 pci1: pcie@fffe09000 { 737 pci1: pcie@fffe09000 {
738 compatible = "fsl,mpc8548-pcie";
739 device_type = "pci";
740 #interrupt-cells = <1>;
741 #size-cells = <2>;
742 #address-cells = <3>;
54 reg = <0xf 0xffe09000 0 0x1000>; 743 reg = <0xf 0xffe09000 0 0x1000>;
744 bus-range = <0 255>;
55 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 745 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
56 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; 746 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
747 clock-frequency = <33333333>;
748 interrupt-parent = <&mpic>;
749 interrupts = <25 2>;
750 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
751 interrupt-map = <
752 /* IDSEL 0x0 */
753 0000 0x0 0x0 0x1 &mpic 0x4 0x1
754 0000 0x0 0x0 0x2 &mpic 0x5 0x1
755 0000 0x0 0x0 0x3 &mpic 0x6 0x1
756 0000 0x0 0x0 0x4 &mpic 0x7 0x1
757 >;
57 pcie@0 { 758 pcie@0 {
759 reg = <0x0 0x0 0x0 0x0 0x0>;
760 #size-cells = <2>;
761 #address-cells = <3>;
762 device_type = "pci";
58 ranges = <0x2000000 0x0 0xe0000000 763 ranges = <0x2000000 0x0 0xe0000000
59 0x2000000 0x0 0xe0000000 764 0x2000000 0x0 0xe0000000
60 0x0 0x20000000 765 0x0 0x20000000
@@ -66,10 +771,31 @@
66 }; 771 };
67 772
68 pci2: pcie@fffe0a000 { 773 pci2: pcie@fffe0a000 {
774 compatible = "fsl,mpc8548-pcie";
775 device_type = "pci";
776 #interrupt-cells = <1>;
777 #size-cells = <2>;
778 #address-cells = <3>;
69 reg = <0xf 0xffe0a000 0 0x1000>; 779 reg = <0xf 0xffe0a000 0 0x1000>;
780 bus-range = <0 255>;
70 ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 781 ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
71 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; 782 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
783 clock-frequency = <33333333>;
784 interrupt-parent = <&mpic>;
785 interrupts = <26 2>;
786 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
787 interrupt-map = <
788 /* IDSEL 0x0 */
789 0000 0x0 0x0 0x1 &mpic 0x0 0x1
790 0000 0x0 0x0 0x2 &mpic 0x1 0x1
791 0000 0x0 0x0 0x3 &mpic 0x2 0x1
792 0000 0x0 0x0 0x4 &mpic 0x3 0x1
793 >;
72 pcie@0 { 794 pcie@0 {
795 reg = <0x0 0x0 0x0 0x0 0x0>;
796 #size-cells = <2>;
797 #address-cells = <3>;
798 device_type = "pci";
73 ranges = <0x2000000 0x0 0xe0000000 799 ranges = <0x2000000 0x0 0xe0000000
74 0x2000000 0x0 0xe0000000 800 0x2000000 0x0 0xe0000000
75 0x0 0x20000000 801 0x0 0x20000000
@@ -80,11 +806,3 @@
80 }; 806 };
81 }; 807 };
82}; 808};
83
84/*
85 * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
86 * for interrupt-map & interrupt-map-mask
87 */
88
89/include/ "fsl/mpc8572si-post.dtsi"
90/include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index ef9ef56b3ee..3375c2ab0c3 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -14,69 +14,494 @@
14 * option) any later version. 14 * option) any later version.
15 */ 15 */
16 16
17/include/ "mpc8572ds.dts" 17/dts-v1/;
18
19/ { 18/ {
20 model = "fsl,MPC8572DS"; 19 model = "fsl,MPC8572DS";
21 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; 20 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 aliases {
25 ethernet0 = &enet0;
26 ethernet1 = &enet1;
27 serial0 = &serial0;
28 pci0 = &pci0;
29 pci1 = &pci1;
30 };
22 31
23 cpus { 32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
24 PowerPC,8572@0 { 36 PowerPC,8572@0 {
37 device_type = "cpu";
38 reg = <0x0>;
39 d-cache-line-size = <32>; // 32 bytes
40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>;
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
25 }; 47 };
26 PowerPC,8572@1 { 48
27 status = "disabled";
28 };
29 }; 49 };
30 50
31 localbus@ffe05000 { 51 memory {
32 status = "disabled"; 52 device_type = "memory";
53 reg = <0x0 0x0>; // Filled by U-Boot
33 }; 54 };
34 55
35 soc8572@ffe00000 { 56 soc8572@ffe00000 {
36 serial@4600 { 57 #address-cells = <1>;
37 status = "disabled"; 58 #size-cells = <1>;
59 device_type = "soc";
60 compatible = "simple-bus";
61 ranges = <0x0 0xffe00000 0x100000>;
62 bus-frequency = <0>; // Filled out by uboot.
63
64 ecm-law@0 {
65 compatible = "fsl,ecm-law";
66 reg = <0x0 0x1000>;
67 fsl,num-laws = <12>;
68 };
69
70 ecm@1000 {
71 compatible = "fsl,mpc8572-ecm", "fsl,ecm";
72 reg = <0x1000 0x1000>;
73 interrupts = <17 2>;
74 interrupt-parent = <&mpic>;
38 }; 75 };
39 dma@c300 { 76
40 status = "disabled"; 77 memory-controller@2000 {
78 compatible = "fsl,mpc8572-memory-controller";
79 reg = <0x2000 0x1000>;
80 interrupt-parent = <&mpic>;
81 interrupts = <18 2>;
41 }; 82 };
42 gpio-controller@f000 { 83
84 memory-controller@6000 {
85 compatible = "fsl,mpc8572-memory-controller";
86 reg = <0x6000 0x1000>;
87 interrupt-parent = <&mpic>;
88 interrupts = <18 2>;
43 }; 89 };
44 l2-cache-controller@20000 { 90
91 L2: l2-cache-controller@20000 {
92 compatible = "fsl,mpc8572-l2-cache-controller";
93 reg = <0x20000 0x1000>;
94 cache-line-size = <32>; // 32 bytes
45 cache-size = <0x80000>; // L2, 512K 95 cache-size = <0x80000>; // L2, 512K
96 interrupt-parent = <&mpic>;
97 interrupts = <16 2>;
98 };
99
100 i2c@3000 {
101 #address-cells = <1>;
102 #size-cells = <0>;
103 cell-index = <0>;
104 compatible = "fsl-i2c";
105 reg = <0x3000 0x100>;
106 interrupts = <43 2>;
107 interrupt-parent = <&mpic>;
108 dfsrr;
109 };
110
111 i2c@3100 {
112 #address-cells = <1>;
113 #size-cells = <0>;
114 cell-index = <1>;
115 compatible = "fsl-i2c";
116 reg = <0x3100 0x100>;
117 interrupts = <43 2>;
118 interrupt-parent = <&mpic>;
119 dfsrr;
120 };
121
122 dma@21300 {
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
126 reg = <0x21300 0x4>;
127 ranges = <0x0 0x21100 0x200>;
128 cell-index = <0>;
129 dma-channel@0 {
130 compatible = "fsl,mpc8572-dma-channel",
131 "fsl,eloplus-dma-channel";
132 reg = <0x0 0x80>;
133 cell-index = <0>;
134 interrupt-parent = <&mpic>;
135 interrupts = <20 2>;
136 };
137 dma-channel@80 {
138 compatible = "fsl,mpc8572-dma-channel",
139 "fsl,eloplus-dma-channel";
140 reg = <0x80 0x80>;
141 cell-index = <1>;
142 interrupt-parent = <&mpic>;
143 interrupts = <21 2>;
144 };
145 dma-channel@100 {
146 compatible = "fsl,mpc8572-dma-channel",
147 "fsl,eloplus-dma-channel";
148 reg = <0x100 0x80>;
149 cell-index = <2>;
150 interrupt-parent = <&mpic>;
151 interrupts = <22 2>;
152 };
153 dma-channel@180 {
154 compatible = "fsl,mpc8572-dma-channel",
155 "fsl,eloplus-dma-channel";
156 reg = <0x180 0x80>;
157 cell-index = <3>;
158 interrupt-parent = <&mpic>;
159 interrupts = <23 2>;
160 };
46 }; 161 };
47 ethernet@26000 { 162
48 status = "disabled"; 163 enet0: ethernet@24000 {
164 #address-cells = <1>;
165 #size-cells = <1>;
166 cell-index = <0>;
167 device_type = "network";
168 model = "eTSEC";
169 compatible = "gianfar";
170 reg = <0x24000 0x1000>;
171 ranges = <0x0 0x24000 0x1000>;
172 local-mac-address = [ 00 00 00 00 00 00 ];
173 interrupts = <29 2 30 2 34 2>;
174 interrupt-parent = <&mpic>;
175 phy-handle = <&phy0>;
176 phy-connection-type = "rgmii-id";
177
178 mdio@520 {
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "fsl,gianfar-mdio";
182 reg = <0x520 0x20>;
183
184 phy0: ethernet-phy@0 {
185 interrupt-parent = <&mpic>;
186 interrupts = <10 1>;
187 reg = <0x0>;
188 };
189 phy1: ethernet-phy@1 {
190 interrupt-parent = <&mpic>;
191 interrupts = <10 1>;
192 reg = <0x1>;
193 };
194 };
195 };
196
197 enet1: ethernet@25000 {
198 cell-index = <1>;
199 device_type = "network";
200 model = "eTSEC";
201 compatible = "gianfar";
202 reg = <0x25000 0x1000>;
203 local-mac-address = [ 00 00 00 00 00 00 ];
204 interrupts = <35 2 36 2 40 2>;
205 interrupt-parent = <&mpic>;
206 phy-handle = <&phy1>;
207 phy-connection-type = "rgmii-id";
49 }; 208 };
50 mdio@26520 { 209
51 status = "disabled"; 210 serial0: serial@4500 {
211 cell-index = <0>;
212 device_type = "serial";
213 compatible = "ns16550";
214 reg = <0x4500 0x100>;
215 clock-frequency = <0>;
216 };
217
218 msi@41600 {
219 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
220 reg = <0x41600 0x80>;
221 msi-available-ranges = <0 0x80>;
222 interrupts = <
223 0xe0 0
224 0xe1 0
225 0xe2 0
226 0xe3 0>;
227 interrupt-parent = <&mpic>;
52 }; 228 };
53 ethernet@27000 { 229
54 status = "disabled"; 230 global-utilities@e0000 { //global utilities block
231 compatible = "fsl,mpc8572-guts";
232 reg = <0xe0000 0x1000>;
233 fsl,has-rstcr;
55 }; 234 };
56 mdio@27520 { 235
57 status = "disabled"; 236 crypto@30000 {
237 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
238 "fsl,sec2.1", "fsl,sec2.0";
239 reg = <0x30000 0x10000>;
240 interrupts = <45 2 58 2>;
241 interrupt-parent = <&mpic>;
242 fsl,num-channels = <4>;
243 fsl,channel-fifo-len = <24>;
244 fsl,exec-units-mask = <0x9fe>;
245 fsl,descriptor-types-mask = <0x3ab0ebf>;
58 }; 246 };
59 pic@40000 { 247
248 mpic: pic@40000 {
249 interrupt-controller;
250 #address-cells = <0>;
251 #interrupt-cells = <2>;
252 reg = <0x40000 0x40000>;
253 compatible = "chrp,open-pic";
254 device_type = "open-pic";
60 protected-sources = < 255 protected-sources = <
61 31 32 33 37 38 39 /* enet2 enet3 */ 256 31 32 33 37 38 39 /* enet2 enet3 */
62 76 77 78 79 26 42 /* dma2 pci2 serial*/ 257 76 77 78 79 26 42 /* dma2 pci2 serial*/
63 0xe4 0xe5 0xe6 0xe7 /* msi */ 258 0xe4 0xe5 0xe6 0xe7 /* msi */
64 >; 259 >;
65 }; 260 };
261 };
66 262
67 msi@41600 { 263 pci0: pcie@ffe08000 {
68 msi-available-ranges = <0 0x80>; 264 compatible = "fsl,mpc8548-pcie";
69 interrupts = < 265 device_type = "pci";
70 0xe0 0 0 0 266 #interrupt-cells = <1>;
71 0xe1 0 0 0 267 #size-cells = <2>;
72 0xe2 0 0 0 268 #address-cells = <3>;
73 0xe3 0 0 0>; 269 reg = <0xffe08000 0x1000>;
74 }; 270 bus-range = <0 255>;
75 timer@42100 { 271 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
76 status = "disabled"; 272 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
273 clock-frequency = <33333333>;
274 interrupt-parent = <&mpic>;
275 interrupts = <24 2>;
276 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
277 interrupt-map = <
278 /* IDSEL 0x11 func 0 - PCI slot 1 */
279 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
280 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
281 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
282 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
283
284 /* IDSEL 0x11 func 1 - PCI slot 1 */
285 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
286 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
287 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
288 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
289
290 /* IDSEL 0x11 func 2 - PCI slot 1 */
291 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
292 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
293 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
294 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
295
296 /* IDSEL 0x11 func 3 - PCI slot 1 */
297 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
298 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
299 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
300 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
301
302 /* IDSEL 0x11 func 4 - PCI slot 1 */
303 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
304 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
305 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
306 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
307
308 /* IDSEL 0x11 func 5 - PCI slot 1 */
309 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
310 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
311 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
312 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
313
314 /* IDSEL 0x11 func 6 - PCI slot 1 */
315 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
316 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
317 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
318 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
319
320 /* IDSEL 0x11 func 7 - PCI slot 1 */
321 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
322 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
323 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
324 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
325
326 /* IDSEL 0x12 func 0 - PCI slot 2 */
327 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
328 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
329 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
330 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
331
332 /* IDSEL 0x12 func 1 - PCI slot 2 */
333 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
334 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
335 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
336 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
337
338 /* IDSEL 0x12 func 2 - PCI slot 2 */
339 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
340 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
341 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
342 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
343
344 /* IDSEL 0x12 func 3 - PCI slot 2 */
345 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
346 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
347 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
348 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
349
350 /* IDSEL 0x12 func 4 - PCI slot 2 */
351 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
352 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
353 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
354 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
355
356 /* IDSEL 0x12 func 5 - PCI slot 2 */
357 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
358 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
359 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
360 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
361
362 /* IDSEL 0x12 func 6 - PCI slot 2 */
363 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
364 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
365 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
366 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
367
368 /* IDSEL 0x12 func 7 - PCI slot 2 */
369 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
370 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
371 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
372 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
373
374 // IDSEL 0x1c USB
375 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
376 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
377 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
378 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
379
380 // IDSEL 0x1d Audio
381 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
382
383 // IDSEL 0x1e Legacy
384 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
385 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
386
387 // IDSEL 0x1f IDE/SATA
388 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
389 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
390
391 >;
392
393 pcie@0 {
394 reg = <0x0 0x0 0x0 0x0 0x0>;
395 #size-cells = <2>;
396 #address-cells = <3>;
397 device_type = "pci";
398 ranges = <0x2000000 0x0 0x80000000
399 0x2000000 0x0 0x80000000
400 0x0 0x20000000
401
402 0x1000000 0x0 0x0
403 0x1000000 0x0 0x0
404 0x0 0x10000>;
405 uli1575@0 {
406 reg = <0x0 0x0 0x0 0x0 0x0>;
407 #size-cells = <2>;
408 #address-cells = <3>;
409 ranges = <0x2000000 0x0 0x80000000
410 0x2000000 0x0 0x80000000
411 0x0 0x20000000
412
413 0x1000000 0x0 0x0
414 0x1000000 0x0 0x0
415 0x0 0x10000>;
416 isa@1e {
417 device_type = "isa";
418 #interrupt-cells = <2>;
419 #size-cells = <1>;
420 #address-cells = <2>;
421 reg = <0xf000 0x0 0x0 0x0 0x0>;
422 ranges = <0x1 0x0 0x1000000 0x0 0x0
423 0x1000>;
424 interrupt-parent = <&i8259>;
425
426 i8259: interrupt-controller@20 {
427 reg = <0x1 0x20 0x2
428 0x1 0xa0 0x2
429 0x1 0x4d0 0x2>;
430 interrupt-controller;
431 device_type = "interrupt-controller";
432 #address-cells = <0>;
433 #interrupt-cells = <2>;
434 compatible = "chrp,iic";
435 interrupts = <9 2>;
436 interrupt-parent = <&mpic>;
437 };
438
439 i8042@60 {
440 #size-cells = <0>;
441 #address-cells = <1>;
442 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
443 interrupts = <1 3 12 3>;
444 interrupt-parent =
445 <&i8259>;
446
447 keyboard@0 {
448 reg = <0x0>;
449 compatible = "pnpPNP,303";
450 };
451
452 mouse@1 {
453 reg = <0x1>;
454 compatible = "pnpPNP,f03";
455 };
456 };
457
458 rtc@70 {
459 compatible = "pnpPNP,b00";
460 reg = <0x1 0x70 0x2>;
461 };
462
463 gpio@400 {
464 reg = <0x1 0x400 0x80>;
465 };
466 };
467 };
77 }; 468 };
469
78 }; 470 };
79 pcie@ffe0a000 { 471
80 status = "disabled"; 472 pci1: pcie@ffe09000 {
473 compatible = "fsl,mpc8548-pcie";
474 device_type = "pci";
475 #interrupt-cells = <1>;
476 #size-cells = <2>;
477 #address-cells = <3>;
478 reg = <0xffe09000 0x1000>;
479 bus-range = <0 255>;
480 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
481 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
482 clock-frequency = <33333333>;
483 interrupt-parent = <&mpic>;
484 interrupts = <25 2>;
485 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
486 interrupt-map = <
487 /* IDSEL 0x0 */
488 0000 0x0 0x0 0x1 &mpic 0x4 0x1
489 0000 0x0 0x0 0x2 &mpic 0x5 0x1
490 0000 0x0 0x0 0x3 &mpic 0x6 0x1
491 0000 0x0 0x0 0x4 &mpic 0x7 0x1
492 >;
493 pcie@0 {
494 reg = <0x0 0x0 0x0 0x0 0x0>;
495 #size-cells = <2>;
496 #address-cells = <3>;
497 device_type = "pci";
498 ranges = <0x2000000 0x0 0xa0000000
499 0x2000000 0x0 0xa0000000
500 0x0 0x20000000
501
502 0x1000000 0x0 0x0
503 0x1000000 0x0 0x0
504 0x0 0x10000>;
505 };
81 }; 506 };
82}; 507};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index 24564ee108e..e7b477f6a3f 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -15,71 +15,169 @@
15 * option) any later version. 15 * option) any later version.
16 */ 16 */
17 17
18/include/ "mpc8572ds.dts" 18/dts-v1/;
19
20/ { 19/ {
21 model = "fsl,MPC8572DS"; 20 model = "fsl,MPC8572DS";
22 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; 21 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 aliases {
26 ethernet2 = &enet2;
27 ethernet3 = &enet3;
28 serial0 = &serial0;
29 pci2 = &pci2;
30 };
23 31
24 cpus { 32 cpus {
25 PowerPC,8572@0 { 33 #address-cells = <1>;
26 status = "disabled"; 34 #size-cells = <0>;
27 }; 35
28 PowerPC,8572@1 { 36 PowerPC,8572@1 {
37 device_type = "cpu";
38 reg = <0x1>;
39 d-cache-line-size = <32>; // 32 bytes
40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>;
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
29 }; 47 };
30 }; 48 };
31 49
32 localbus@ffe05000 { 50 memory {
33 status = "disabled"; 51 device_type = "memory";
52 reg = <0x0 0x0>; // Filled by U-Boot
34 }; 53 };
35 54
36 soc8572@ffe00000 { 55 soc8572@ffe00000 {
37 ecm-law@0 { 56 #address-cells = <1>;
38 status = "disabled"; 57 #size-cells = <1>;
39 }; 58 device_type = "soc";
40 ecm@1000 { 59 compatible = "simple-bus";
41 status = "disabled"; 60 ranges = <0x0 0xffe00000 0x100000>;
42 }; 61 bus-frequency = <0>; // Filled out by uboot.
43 memory-controller@2000 { 62
44 status = "disabled"; 63 L2: l2-cache-controller@20000 {
45 }; 64 compatible = "fsl,mpc8572-l2-cache-controller";
46 memory-controller@6000 { 65 reg = <0x20000 0x1000>;
47 status = "disabled"; 66 cache-line-size = <32>; // 32 bytes
48 }; 67 cache-size = <0x80000>; // L2, 512K
49 i2c@3000 { 68 interrupt-parent = <&mpic>;
50 status = "disabled";
51 };
52 i2c@3100 {
53 status = "disabled";
54 };
55 serial@4500 {
56 status = "disabled";
57 };
58 gpio-controller@f000 {
59 status = "disabled";
60 };
61 l2-cache-controller@20000 {
62 cache-size = <0x80000>; // L2, 512K
63 }; 69 };
64 dma@21300 { 70
65 status = "disabled"; 71 dma@c300 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
75 reg = <0xc300 0x4>;
76 ranges = <0x0 0xc100 0x200>;
77 cell-index = <0>;
78 dma-channel@0 {
79 compatible = "fsl,mpc8572-dma-channel",
80 "fsl,eloplus-dma-channel";
81 reg = <0x0 0x80>;
82 cell-index = <0>;
83 interrupt-parent = <&mpic>;
84 interrupts = <76 2>;
85 };
86 dma-channel@80 {
87 compatible = "fsl,mpc8572-dma-channel",
88 "fsl,eloplus-dma-channel";
89 reg = <0x80 0x80>;
90 cell-index = <1>;
91 interrupt-parent = <&mpic>;
92 interrupts = <77 2>;
93 };
94 dma-channel@100 {
95 compatible = "fsl,mpc8572-dma-channel",
96 "fsl,eloplus-dma-channel";
97 reg = <0x100 0x80>;
98 cell-index = <2>;
99 interrupt-parent = <&mpic>;
100 interrupts = <78 2>;
101 };
102 dma-channel@180 {
103 compatible = "fsl,mpc8572-dma-channel",
104 "fsl,eloplus-dma-channel";
105 reg = <0x180 0x80>;
106 cell-index = <3>;
107 interrupt-parent = <&mpic>;
108 interrupts = <79 2>;
109 };
66 }; 110 };
67 ethernet@24000 { 111
68 status = "disabled"; 112 mdio@24520 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 compatible = "fsl,gianfar-mdio";
116 reg = <0x24520 0x20>;
117
118 phy2: ethernet-phy@2 {
119 interrupt-parent = <&mpic>;
120 reg = <0x2>;
121 };
122 phy3: ethernet-phy@3 {
123 interrupt-parent = <&mpic>;
124 reg = <0x3>;
125 };
69 }; 126 };
70 ptp_clock@24e00 { 127
71 status = "disabled"; 128 enet2: ethernet@26000 {
129 cell-index = <2>;
130 device_type = "network";
131 model = "eTSEC";
132 compatible = "gianfar";
133 reg = <0x26000 0x1000>;
134 local-mac-address = [ 00 00 00 00 00 00 ];
135 interrupts = <31 2 32 2 33 2>;
136 interrupt-parent = <&mpic>;
137 phy-handle = <&phy2>;
138 phy-connection-type = "rgmii-id";
72 }; 139 };
73 ethernet@25000 { 140
74 status = "disabled"; 141 enet3: ethernet@27000 {
142 cell-index = <3>;
143 device_type = "network";
144 model = "eTSEC";
145 compatible = "gianfar";
146 reg = <0x27000 0x1000>;
147 local-mac-address = [ 00 00 00 00 00 00 ];
148 interrupts = <37 2 38 2 39 2>;
149 interrupt-parent = <&mpic>;
150 phy-handle = <&phy3>;
151 phy-connection-type = "rgmii-id";
75 }; 152 };
76 mdio@25520 { 153
77 status = "disabled"; 154 msi@41600 {
155 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
156 reg = <0x41600 0x80>;
157 msi-available-ranges = <0x80 0x80>;
158 interrupts = <
159 0xe4 0
160 0xe5 0
161 0xe6 0
162 0xe7 0>;
163 interrupt-parent = <&mpic>;
78 }; 164 };
79 crypto@30000 { 165
80 status = "disabled"; 166 serial0: serial@4600 {
167 cell-index = <1>;
168 device_type = "serial";
169 compatible = "ns16550";
170 reg = <0x4600 0x100>;
171 clock-frequency = <0>;
81 }; 172 };
82 pic@40000 { 173
174 mpic: pic@40000 {
175 interrupt-controller;
176 #address-cells = <0>;
177 #interrupt-cells = <2>;
178 reg = <0x40000 0x40000>;
179 compatible = "chrp,open-pic";
180 device_type = "open-pic";
83 protected-sources = < 181 protected-sources = <
84 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ 182 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
85 29 30 34 35 36 40 /* enet0 enet1 */ 183 29 30 34 35 36 40 /* enet0 enet1 */
@@ -91,25 +189,41 @@
91 0xe0 0xe1 0xe2 0xe3 /* msi */ 189 0xe0 0xe1 0xe2 0xe3 /* msi */
92 >; 190 >;
93 }; 191 };
94 timer@41100 {
95 status = "disabled";
96 };
97 msi@41600 {
98 msi-available-ranges = <0x80 0x80>;
99 interrupts = <
100 0xe4 0 0 0
101 0xe5 0 0 0
102 0xe6 0 0 0
103 0xe7 0 0 0>;
104 };
105 global-utilities@e0000 {
106 status = "disabled";
107 };
108 };
109 pcie@ffe08000 {
110 status = "disabled";
111 }; 192 };
112 pcie@ffe09000 { 193
113 status = "disabled"; 194 pci2: pcie@ffe0a000 {
195 compatible = "fsl,mpc8548-pcie";
196 device_type = "pci";
197 #interrupt-cells = <1>;
198 #size-cells = <2>;
199 #address-cells = <3>;
200 reg = <0xffe0a000 0x1000>;
201 bus-range = <0 255>;
202 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
203 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
204 clock-frequency = <33333333>;
205 interrupt-parent = <&mpic>;
206 interrupts = <26 2>;
207 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
208 interrupt-map = <
209 /* IDSEL 0x0 */
210 0000 0x0 0x0 0x1 &mpic 0x0 0x1
211 0000 0x0 0x0 0x2 &mpic 0x1 0x1
212 0000 0x0 0x0 0x3 &mpic 0x2 0x1
213 0000 0x0 0x0 0x4 &mpic 0x3 0x1
214 >;
215 pcie@0 {
216 reg = <0x0 0x0 0x0 0x0 0x0>;
217 #size-cells = <2>;
218 #address-cells = <3>;
219 device_type = "pci";
220 ranges = <0x2000000 0x0 0xc0000000
221 0x2000000 0x0 0xc0000000
222 0x0 0x20000000
223
224 0x1000000 0x0 0x0
225 0x1000000 0x0 0x0
226 0x0 0x10000>;
227 };
114 }; 228 };
115}; 229};
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 6a109a0ceac..83c3218cb4d 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -175,7 +175,7 @@
175 serial0: serial@4500 { 175 serial0: serial@4500 {
176 cell-index = <0>; 176 cell-index = <0>;
177 device_type = "serial"; 177 device_type = "serial";
178 compatible = "fsl,ns16550", "ns16550"; 178 compatible = "ns16550";
179 reg = <0x4500 0x100>; 179 reg = <0x4500 0x100>;
180 clock-frequency = <0>; 180 clock-frequency = <0>;
181 interrupts = <42 2>; 181 interrupts = <42 2>;
@@ -186,7 +186,7 @@
186 serial1: serial@4600 { 186 serial1: serial@4600 {
187 cell-index = <1>; 187 cell-index = <1>;
188 device_type = "serial"; 188 device_type = "serial";
189 compatible = "fsl,ns16550", "ns16550"; 189 compatible = "ns16550";
190 reg = <0x4600 0x100>; 190 reg = <0x4600 0x100>;
191 clock-frequency = <0>; 191 clock-frequency = <0>;
192 interrupts = <42 2>; 192 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 1e8666ccbed..848320e4d3c 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -26,6 +26,13 @@
26 serial1 = &serial1; 26 serial1 = &serial1;
27 pci0 = &pci0; 27 pci0 = &pci0;
28 pci1 = &pci1; 28 pci1 = &pci1;
29/*
30 * Only one of Rapid IO or PCI can be present due to HW limitations and
31 * due to the fact that the 2 now share address space in the new memory
32 * map. The most likely case is that we have PCI, so comment out the
33 * rapidio node. Leave it here for reference.
34 */
35 /* rapidio0 = &rapidio0; */
29 }; 36 };
30 37
31 cpus { 38 cpus {
@@ -328,7 +335,7 @@
328 serial0: serial@4500 { 335 serial0: serial@4500 {
329 cell-index = <0>; 336 cell-index = <0>;
330 device_type = "serial"; 337 device_type = "serial";
331 compatible = "fsl,ns16550", "ns16550"; 338 compatible = "ns16550";
332 reg = <0x4500 0x100>; 339 reg = <0x4500 0x100>;
333 clock-frequency = <0>; 340 clock-frequency = <0>;
334 interrupts = <42 2>; 341 interrupts = <42 2>;
@@ -338,7 +345,7 @@
338 serial1: serial@4600 { 345 serial1: serial@4600 {
339 cell-index = <1>; 346 cell-index = <1>;
340 device_type = "serial"; 347 device_type = "serial";
341 compatible = "fsl,ns16550", "ns16550"; 348 compatible = "ns16550";
342 reg = <0x4600 0x100>; 349 reg = <0x4600 0x100>;
343 clock-frequency = <0>; 350 clock-frequency = <0>;
344 interrupts = <28 2>; 351 interrupts = <28 2>;
@@ -354,41 +361,6 @@
354 device_type = "open-pic"; 361 device_type = "open-pic";
355 }; 362 };
356 363
357 rmu: rmu@d3000 {
358 #address-cells = <1>;
359 #size-cells = <1>;
360 compatible = "fsl,srio-rmu";
361 reg = <0xd3000 0x500>;
362 ranges = <0x0 0xd3000 0x500>;
363
364 message-unit@0 {
365 compatible = "fsl,srio-msg-unit";
366 reg = <0x0 0x100>;
367 interrupts = <
368 53 2 /* msg1_tx_irq */
369 54 2>;/* msg1_rx_irq */
370 };
371 message-unit@100 {
372 compatible = "fsl,srio-msg-unit";
373 reg = <0x100 0x100>;
374 interrupts = <
375 55 2 /* msg2_tx_irq */
376 56 2>;/* msg2_rx_irq */
377 };
378 doorbell-unit@400 {
379 compatible = "fsl,srio-dbell-unit";
380 reg = <0x400 0x80>;
381 interrupts = <
382 49 2 /* bell_outb_irq */
383 50 2>;/* bell_inb_irq */
384 };
385 port-write-unit@4e0 {
386 compatible = "fsl,srio-port-write-unit";
387 reg = <0x4e0 0x20>;
388 interrupts = <48 2>;
389 };
390 };
391
392 global-utilities@e0000 { 364 global-utilities@e0000 {
393 compatible = "fsl,mpc8641-guts"; 365 compatible = "fsl,mpc8641-guts";
394 reg = <0xe0000 0x1000>; 366 reg = <0xe0000 0x1000>;
@@ -640,27 +612,16 @@
640 }; 612 };
641 }; 613 };
642/* 614/*
643 * Only one of Rapid IO or PCI can be present due to HW limitations and 615 rapidio0: rapidio@ffec0000 {
644 * due to the fact that the 2 now share address space in the new memory
645 * map. The most likely case is that we have PCI, so comment out the
646 * rapidio node. Leave it here for reference.
647
648 rapidio@ffec0000 {
649 reg = <0xffec0000 0x11000>;
650 compatible = "fsl,srio";
651 interrupt-parent = <&mpic>;
652 interrupts = <48 2>;
653 #address-cells = <2>; 616 #address-cells = <2>;
654 #size-cells = <2>; 617 #size-cells = <2>;
655 fsl,srio-rmu-handle = <&rmu>; 618 compatible = "fsl,rapidio-delta";
656 ranges; 619 reg = <0xffec0000 0x20000>;
657 620 ranges = <0 0 0x80000000 0 0x20000000>;
658 port1 { 621 interrupt-parent = <&mpic>;
659 #address-cells = <2>; 622 // err_irq bell_outb_irq bell_inb_irq
660 #size-cells = <2>; 623 // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
661 cell-index = <1>; 624 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
662 ranges = <0 0 0x80000000 0 0x20000000>;
663 };
664 }; 625 };
665*/ 626*/
666 627
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
index fd4cd4da60b..8be8e701e1d 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
@@ -328,7 +328,7 @@
328 serial0: serial@4500 { 328 serial0: serial@4500 {
329 cell-index = <0>; 329 cell-index = <0>;
330 device_type = "serial"; 330 device_type = "serial";
331 compatible = "fsl,ns16550", "ns16550"; 331 compatible = "ns16550";
332 reg = <0x4500 0x100>; 332 reg = <0x4500 0x100>;
333 clock-frequency = <0>; 333 clock-frequency = <0>;
334 interrupts = <42 2>; 334 interrupts = <42 2>;
@@ -338,7 +338,7 @@
338 serial1: serial@4600 { 338 serial1: serial@4600 {
339 cell-index = <1>; 339 cell-index = <1>;
340 device_type = "serial"; 340 device_type = "serial";
341 compatible = "fsl,ns16550", "ns16550"; 341 compatible = "ns16550";
342 reg = <0x4600 0x100>; 342 reg = <0x4600 0x100>;
343 clock-frequency = <0>; 343 clock-frequency = <0>;
344 interrupts = <28 2>; 344 interrupts = <28 2>;
diff --git a/arch/powerpc/boot/dts/o2d.dts b/arch/powerpc/boot/dts/o2d.dts
deleted file mode 100644
index 9f6dd4d889b..00000000000
--- a/arch/powerpc/boot/dts/o2d.dts
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * O2D Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2d";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x08000000>; // 128MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x02000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x02000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40 /* o2d specific partitions */
41 partition@2c0000 {
42 label = "o2d user defined";
43 reg = <0x002c0000 0x01d40000>;
44 };
45 };
46 };
47};
diff --git a/arch/powerpc/boot/dts/o2d.dtsi b/arch/powerpc/boot/dts/o2d.dtsi
deleted file mode 100644
index 24f66803929..00000000000
--- a/arch/powerpc/boot/dts/o2d.dtsi
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * O2D base Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "mpc5200b.dtsi"
14
15/ {
16 model = "ifm,o2d";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x04000000>; // 64MB
21 };
22
23 soc5200@f0000000 {
24
25 gpio_simple: gpio@b00 {
26 };
27
28 timer@600 { // General Purpose Timer
29 #gpio-cells = <2>;
30 gpio-controller;
31 fsl,has-wdt;
32 fsl,wdt-on-boot = <0>;
33 };
34
35 timer@610 {
36 #gpio-cells = <2>;
37 gpio-controller;
38 };
39
40 timer7: timer@670 {
41 };
42
43 rtc@800 {
44 status = "disabled";
45 };
46
47 psc@2000 { // PSC1
48 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
49 #address-cells = <1>;
50 #size-cells = <0>;
51 cell-index = <0>;
52
53 spidev@0 {
54 compatible = "spidev";
55 spi-max-frequency = <250000>;
56 reg = <0>;
57 };
58 };
59
60 psc@2200 { // PSC2
61 status = "disabled";
62 };
63
64 psc@2400 { // PSC3
65 status = "disabled";
66 };
67
68 psc@2600 { // PSC4
69 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
70 };
71
72 psc@2800 { // PSC5
73 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
74 };
75
76 psc@2c00 { // PSC6
77 status = "disabled";
78 };
79
80 ethernet@3000 {
81 phy-handle = <&phy0>;
82 };
83
84 mdio@3000 {
85 phy0: ethernet-phy@0 {
86 reg = <0>;
87 };
88 };
89 };
90
91 localbus {
92 ranges = <0 0 0xff000000 0x01000000
93 3 0 0xe3000000 0x00100000>;
94
95 // flash device at LocalPlus Bus CS0
96 flash@0,0 {
97 compatible = "cfi-flash";
98 reg = <0 0 0x01000000>;
99 bank-width = <1>;
100 device-width = <2>;
101 #size-cells = <1>;
102 #address-cells = <1>;
103 no-unaligned-direct-access;
104
105 /* common layout for all machines */
106 partition@0 {
107 label = "u-boot";
108 reg = <0x00000000 0x00040000>;
109 read-only;
110 };
111 partition@40000 {
112 label = "env";
113 reg = <0x00040000 0x00020000>;
114 read-only;
115 };
116 };
117
118 csi@3,0 {
119 compatible = "ifm,o2d-csi";
120 reg = <3 0 0x00100000>;
121 ifm,csi-clk-handle = <&timer7>;
122 gpios = <&gpio_simple 23 0 /* imag_capture */
123 &gpio_simple 26 0 /* imag_reset */
124 &gpio_simple 29 0>; /* imag_master_en */
125
126 interrupts = <1 1 2>; /* IRQ1, edge falling */
127
128 ifm,csi-addr-bus-width = <24>;
129 ifm,csi-data-bus-width = <8>;
130 ifm,csi-wait-cycles = <0>;
131 };
132 };
133};
diff --git a/arch/powerpc/boot/dts/o2d300.dts b/arch/powerpc/boot/dts/o2d300.dts
deleted file mode 100644
index 29affe0f0da..00000000000
--- a/arch/powerpc/boot/dts/o2d300.dts
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * O2D300 Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2d300";
17 compatible = "ifm,o2d";
18
19 localbus {
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
22 flash@0,0 {
23 compatible = "cfi-flash";
24 reg = <0 0 0x02000000>;
25 bank-width = <2>;
26 device-width = <2>;
27 #size-cells = <1>;
28 #address-cells = <1>;
29
30 partition@40000 {
31 label = "env_1";
32 reg = <0x00040000 0x00020000>;
33 read-only;
34 };
35 partition@60000 {
36 label = "env_2";
37 reg = <0x00060000 0x00020000>;
38 read-only;
39 };
40 partition@80000 {
41 label = "kernel";
42 reg = <0x00080000 0x00260000>;
43 read-only;
44 };
45 /* o2d300 specific partitions */
46 partition@2e0000 {
47 label = "o2d300 user defined";
48 reg = <0x002e0000 0x01d20000>;
49 };
50 };
51 };
52};
diff --git a/arch/powerpc/boot/dts/o2dnt2.dts b/arch/powerpc/boot/dts/o2dnt2.dts
deleted file mode 100644
index a0f5b97a4f0..00000000000
--- a/arch/powerpc/boot/dts/o2dnt2.dts
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * O2DNT2 Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2dnt2";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x08000000>; // 128MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x02000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x02000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40
41 /* o2dnt2 specific partitions */
42 partition@2c0000 {
43 label = "o2dnt2 user defined";
44 reg = <0x002c0000 0x01d40000>;
45 };
46 };
47 };
48};
diff --git a/arch/powerpc/boot/dts/o2i.dts b/arch/powerpc/boot/dts/o2i.dts
deleted file mode 100644
index e3cc99d1360..00000000000
--- a/arch/powerpc/boot/dts/o2i.dts
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * O2I Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2i";
17 compatible = "ifm,o2d";
18
19 localbus {
20 flash@0,0 {
21 partition@60000 {
22 label = "kernel";
23 reg = <0x00060000 0x00260000>;
24 read-only;
25 };
26 /* o2i specific partitions */
27 partition@2c0000 {
28 label = "o2i user defined";
29 reg = <0x002c0000 0x00d40000>;
30 };
31 };
32 };
33};
diff --git a/arch/powerpc/boot/dts/o2mnt.dts b/arch/powerpc/boot/dts/o2mnt.dts
deleted file mode 100644
index d91859a9e94..00000000000
--- a/arch/powerpc/boot/dts/o2mnt.dts
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * O2MNT Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o2mnt";
17 compatible = "ifm,o2d";
18
19 localbus {
20 flash@0,0 {
21 partition@60000 {
22 label = "kernel";
23 reg = <0x00060000 0x00260000>;
24 read-only;
25 };
26 /* add o2mnt specific partitions */
27 partition@2c0000 {
28 label = "o2mnt user defined";
29 reg = <0x002c0000 0x00d40000>;
30 };
31 };
32 };
33};
diff --git a/arch/powerpc/boot/dts/o3dnt.dts b/arch/powerpc/boot/dts/o3dnt.dts
deleted file mode 100644
index acce4932649..00000000000
--- a/arch/powerpc/boot/dts/o3dnt.dts
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * O3DNT Device Tree Source
3 *
4 * Copyright (C) 2012 DENX Software Engineering
5 * Anatolij Gustschin <agust@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/include/ "o2d.dtsi"
14
15/ {
16 model = "ifm,o3dnt";
17 compatible = "ifm,o2d";
18
19 memory {
20 reg = <0x00000000 0x04000000>; // 64MB
21 };
22
23 localbus {
24 ranges = <0 0 0xfc000000 0x01000000
25 3 0 0xe3000000 0x00100000>;
26
27 flash@0,0 {
28 compatible = "cfi-flash";
29 reg = <0 0 0x01000000>;
30 bank-width = <2>;
31 device-width = <2>;
32 #size-cells = <1>;
33 #address-cells = <1>;
34
35 partition@60000 {
36 label = "kernel";
37 reg = <0x00060000 0x00260000>;
38 read-only;
39 };
40
41 /* o3dnt specific partitions */
42 partition@2c0000 {
43 label = "o3dnt user defined";
44 reg = <0x002c0000 0x00d40000>;
45 };
46 };
47 };
48};
diff --git a/arch/powerpc/boot/dts/obs600.dts b/arch/powerpc/boot/dts/obs600.dts
deleted file mode 100644
index 18e7d79ee4c..00000000000
--- a/arch/powerpc/boot/dts/obs600.dts
+++ /dev/null
@@ -1,314 +0,0 @@
1/*
2 * Device Tree Source for PlatHome OpenBlockS 600 (405EX)
3 *
4 * Copyright 2011 Ben Herrenschmidt, IBM Corp.
5 *
6 * Based on Kilauea by:
7 *
8 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15/dts-v1/;
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "PlatHome,OpenBlockS 600";
21 compatible = "plathome,obs600";
22 dcr-parent = <&{/cpus/cpu@0}>;
23
24 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,405EX";
38 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by U-Boot */
40 timebase-frequency = <0>; /* Filled in by U-Boot */
41 i-cache-line-size = <32>;
42 d-cache-line-size = <32>;
43 i-cache-size = <16384>; /* 16 kB */
44 d-cache-size = <16384>; /* 16 kB */
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
53 };
54
55 UIC0: interrupt-controller {
56 compatible = "ibm,uic-405ex", "ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0x0c0 0x009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-405ex","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
69 dcr-reg = <0x0d0 0x009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-405ex","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
81 dcr-reg = <0x0e0 0x009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
85 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 CPM0: cpm {
90 compatible = "ibm,cpm";
91 dcr-access-method = "native";
92 dcr-reg = <0x0b0 0x003>;
93 unused-units = <0x00000000>;
94 idle-doze = <0x02000000>;
95 standby = <0xe3e74800>;
96 };
97
98 plb {
99 compatible = "ibm,plb-405ex", "ibm,plb4";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 clock-frequency = <0>; /* Filled in by U-Boot */
104
105 SDRAM0: memory-controller {
106 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
107 dcr-reg = <0x010 0x002>;
108 interrupt-parent = <&UIC2>;
109 interrupts = <0x5 0x4 /* ECC DED Error */
110 0x6 0x4>; /* ECC SEC Error */
111 };
112
113 CRYPTO: crypto@ef700000 {
114 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
115 reg = <0xef700000 0x80400>;
116 interrupt-parent = <&UIC0>;
117 interrupts = <0x17 0x2>;
118 };
119
120 MAL0: mcmal {
121 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
122 dcr-reg = <0x180 0x062>;
123 num-tx-chans = <2>;
124 num-rx-chans = <2>;
125 interrupt-parent = <&MAL0>;
126 interrupts = <0x0 0x1 0x2 0x3 0x4>;
127 #interrupt-cells = <1>;
128 #address-cells = <0>;
129 #size-cells = <0>;
130 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
131 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
132 /*SERR*/ 0x2 &UIC1 0x0 0x4
133 /*TXDE*/ 0x3 &UIC1 0x1 0x4
134 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
135 interrupt-map-mask = <0xffffffff>;
136 };
137
138 POB0: opb {
139 compatible = "ibm,opb-405ex", "ibm,opb";
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <0x80000000 0x80000000 0x10000000
143 0xef600000 0xef600000 0x00a00000
144 0xf0000000 0xf0000000 0x10000000>;
145 dcr-reg = <0x0a0 0x005>;
146 clock-frequency = <0>; /* Filled in by U-Boot */
147
148 EBC0: ebc {
149 compatible = "ibm,ebc-405ex", "ibm,ebc";
150 dcr-reg = <0x012 0x002>;
151 #address-cells = <2>;
152 #size-cells = <1>;
153 clock-frequency = <0>; /* Filled in by U-Boot */
154 /* ranges property is supplied by U-Boot */
155 interrupts = <0x5 0x1>;
156 interrupt-parent = <&UIC1>;
157
158 nor_flash@0,0 {
159 compatible = "amd,s29gl512n", "cfi-flash";
160 bank-width = <2>;
161 reg = <0x00000000 0x00000000 0x08000000>;
162 #address-cells = <1>;
163 #size-cells = <1>;
164 partition@0 {
165 label = "kernel + initrd";
166 reg = <0x00000000 0x03de0000>;
167 };
168 partition@3de0000 {
169 label = "user config area";
170 reg = <0x03de0000 0x00080000>;
171 };
172 partition@3e60000 {
173 label = "user program area";
174 reg = <0x03e60000 0x04000000>;
175 };
176 partition@7e60000 {
177 label = "flat device tree";
178 reg = <0x07e60000 0x00080000>;
179 };
180 partition@7ee0000 {
181 label = "test program";
182 reg = <0x07ee0000 0x00080000>;
183 };
184 partition@7f60000 {
185 label = "u-boot env";
186 reg = <0x07f60000 0x00040000>;
187 };
188 partition@7fa0000 {
189 label = "u-boot";
190 reg = <0x07fa0000 0x00060000>;
191 };
192 };
193 };
194
195 UART0: serial@ef600200 {
196 device_type = "serial";
197 compatible = "ns16550";
198 reg = <0xef600200 0x00000008>;
199 virtual-reg = <0xef600200>;
200 clock-frequency = <0>; /* Filled in by U-Boot */
201 current-speed = <0>;
202 interrupt-parent = <&UIC0>;
203 interrupts = <0x1a 0x4>;
204 };
205
206 UART1: serial@ef600300 {
207 device_type = "serial";
208 compatible = "ns16550";
209 reg = <0xef600300 0x00000008>;
210 virtual-reg = <0xef600300>;
211 clock-frequency = <0>; /* Filled in by U-Boot */
212 current-speed = <0>;
213 interrupt-parent = <&UIC0>;
214 interrupts = <0x1 0x4>;
215 };
216
217 IIC0: i2c@ef600400 {
218 compatible = "ibm,iic-405ex", "ibm,iic";
219 reg = <0xef600400 0x00000014>;
220 interrupt-parent = <&UIC0>;
221 interrupts = <0x2 0x4>;
222 #address-cells = <1>;
223 #size-cells = <0>;
224
225 rtc@68 {
226 compatible = "dallas,ds1340";
227 reg = <0x68>;
228 };
229 };
230
231 IIC1: i2c@ef600500 {
232 compatible = "ibm,iic-405ex", "ibm,iic";
233 reg = <0xef600500 0x00000014>;
234 interrupt-parent = <&UIC0>;
235 interrupts = <0x7 0x4>;
236 };
237
238 RGMII0: emac-rgmii@ef600b00 {
239 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
240 reg = <0xef600b00 0x00000104>;
241 has-mdio;
242 };
243
244 EMAC0: ethernet@ef600900 {
245 linux,network-index = <0x0>;
246 device_type = "network";
247 compatible = "ibm,emac-405ex", "ibm,emac4sync";
248 interrupt-parent = <&EMAC0>;
249 interrupts = <0x0 0x1>;
250 #interrupt-cells = <1>;
251 #address-cells = <0>;
252 #size-cells = <0>;
253 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
254 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
255 reg = <0xef600900 0x000000c4>;
256 local-mac-address = [000000000000]; /* Filled in by U-Boot */
257 mal-device = <&MAL0>;
258 mal-tx-channel = <0>;
259 mal-rx-channel = <0>;
260 cell-index = <0>;
261 max-frame-size = <9000>;
262 rx-fifo-size = <4096>;
263 tx-fifo-size = <2048>;
264 rx-fifo-size-gige = <16384>;
265 tx-fifo-size-gige = <16384>;
266 phy-mode = "rgmii";
267 phy-map = <0x00000000>;
268 rgmii-device = <&RGMII0>;
269 rgmii-channel = <0>;
270 has-inverted-stacr-oc;
271 has-new-stacr-staopc;
272 };
273
274 EMAC1: ethernet@ef600a00 {
275 linux,network-index = <0x1>;
276 device_type = "network";
277 compatible = "ibm,emac-405ex", "ibm,emac4sync";
278 interrupt-parent = <&EMAC1>;
279 interrupts = <0x0 0x1>;
280 #interrupt-cells = <1>;
281 #address-cells = <0>;
282 #size-cells = <0>;
283 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
284 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
285 reg = <0xef600a00 0x000000c4>;
286 local-mac-address = [000000000000]; /* Filled in by U-Boot */
287 mal-device = <&MAL0>;
288 mal-tx-channel = <1>;
289 mal-rx-channel = <1>;
290 cell-index = <1>;
291 max-frame-size = <9000>;
292 rx-fifo-size = <4096>;
293 tx-fifo-size = <2048>;
294 rx-fifo-size-gige = <16384>;
295 tx-fifo-size-gige = <16384>;
296 phy-mode = "rgmii";
297 phy-map = <0x00000000>;
298 rgmii-device = <&RGMII0>;
299 rgmii-channel = <1>;
300 has-inverted-stacr-oc;
301 has-new-stacr-staopc;
302 };
303
304 GPIO: gpio@ef600800 {
305 device_type = "gpio";
306 compatible = "ibm,gpio-405ex", "ibm,ppc4xx-gpio";
307 reg = <0xef600800 0x50>;
308 };
309 };
310 };
311 chosen {
312 linux,stdout-path = "/plb/opb/serial@ef600200";
313 };
314};
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index b868d22984e..6b33b73a5ba 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -9,33 +9,236 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/p1010si-pre.dtsi" 12/include/ "p1010si.dtsi"
13 13
14/ { 14/ {
15 model = "fsl,P1010RDB"; 15 model = "fsl,P1010RDB";
16 compatible = "fsl,P1010RDB"; 16 compatible = "fsl,P1010RDB";
17 17
18 aliases {
19 serial0 = &serial0;
20 serial1 = &serial1;
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 };
27
18 memory { 28 memory {
19 device_type = "memory"; 29 device_type = "memory";
20 }; 30 };
21 31
22 board_ifc: ifc: ifc@ffe1e000 { 32 ifc@ffe1e000 {
23 /* NOR, NAND Flashes and CPLD on board */ 33 /* NOR, NAND Flashes and CPLD on board */
24 ranges = <0x0 0x0 0x0 0xee000000 0x02000000 34 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
25 0x1 0x0 0x0 0xff800000 0x00010000 35 0x1 0x0 0x0 0xff800000 0x00010000
26 0x3 0x0 0x0 0xffb00000 0x00000020>; 36 0x3 0x0 0x0 0xffb00000 0x00000020>;
27 reg = <0x0 0xffe1e000 0 0x2000>; 37
38 nor@0,0 {
39 #address-cells = <1>;
40 #size-cells = <1>;
41 compatible = "cfi-flash";
42 reg = <0x0 0x0 0x2000000>;
43 bank-width = <2>;
44 device-width = <1>;
45
46 partition@40000 {
47 /* 256KB for DTB Image */
48 reg = <0x00040000 0x00040000>;
49 label = "NOR DTB Image";
50 };
51
52 partition@80000 {
53 /* 7 MB for Linux Kernel Image */
54 reg = <0x00080000 0x00700000>;
55 label = "NOR Linux Kernel Image";
56 };
57
58 partition@800000 {
59 /* 20MB for JFFS2 based Root file System */
60 reg = <0x00800000 0x01400000>;
61 label = "NOR JFFS2 Root File System";
62 };
63
64 partition@1f00000 {
65 /* This location must not be altered */
66 /* 512KB for u-boot Bootloader Image */
67 /* 512KB for u-boot Environment Variables */
68 reg = <0x01f00000 0x00100000>;
69 label = "NOR U-Boot Image";
70 read-only;
71 };
72 };
73
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,ifc-nand";
78 reg = <0x1 0x0 0x10000>;
79
80 partition@0 {
81 /* This location must not be altered */
82 /* 1MB for u-boot Bootloader Image */
83 reg = <0x0 0x00100000>;
84 label = "NAND U-Boot Image";
85 read-only;
86 };
87
88 partition@100000 {
89 /* 1MB for DTB Image */
90 reg = <0x00100000 0x00100000>;
91 label = "NAND DTB Image";
92 };
93
94 partition@200000 {
95 /* 4MB for Linux Kernel Image */
96 reg = <0x00200000 0x00400000>;
97 label = "NAND Linux Kernel Image";
98 };
99
100 partition@600000 {
101 /* 4MB for Compressed Root file System Image */
102 reg = <0x00600000 0x00400000>;
103 label = "NAND Compressed RFS Image";
104 };
105
106 partition@a00000 {
107 /* 15MB for JFFS2 based Root file System */
108 reg = <0x00a00000 0x00f00000>;
109 label = "NAND JFFS2 Root File System";
110 };
111
112 partition@1900000 {
113 /* 7MB for User Area */
114 reg = <0x01900000 0x00700000>;
115 label = "NAND User area";
116 };
117 };
118
119 cpld@3,0 {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 compatible = "fsl,p1010rdb-cpld";
123 reg = <0x3 0x0 0x0000020>;
124 bank-width = <1>;
125 device-width = <1>;
126 };
28 }; 127 };
29 128
30 board_soc: soc: soc@ffe00000 { 129 soc@ffe00000 {
31 ranges = <0x0 0x0 0xffe00000 0x100000>; 130 spi@7000 {
131 flash@0 {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "spansion,s25sl12801";
135 reg = <0>;
136 spi-max-frequency = <50000000>;
137
138 partition@0 {
139 /* 1MB for u-boot Bootloader Image */
140 /* 1MB for Environment */
141 reg = <0x0 0x00100000>;
142 label = "SPI Flash U-Boot Image";
143 read-only;
144 };
145
146 partition@100000 {
147 /* 512KB for DTB Image */
148 reg = <0x00100000 0x00080000>;
149 label = "SPI Flash DTB Image";
150 };
151
152 partition@180000 {
153 /* 4MB for Linux Kernel Image */
154 reg = <0x00180000 0x00400000>;
155 label = "SPI Flash Linux Kernel Image";
156 };
157
158 partition@580000 {
159 /* 4MB for Compressed RFS Image */
160 reg = <0x00580000 0x00400000>;
161 label = "SPI Flash Compressed RFSImage";
162 };
163
164 partition@980000 {
165 /* 6.5MB for JFFS2 based RFS */
166 reg = <0x00980000 0x00680000>;
167 label = "SPI Flash JFFS2 RFS";
168 };
169 };
170 };
171
172 can0@1c000 {
173 fsl,flexcan-clock-source = "platform";
174 };
175
176 can1@1d000 {
177 fsl,flexcan-clock-source = "platform";
178 };
179
180 usb@22000 {
181 phy_type = "utmi";
182 };
183
184 mdio@24000 {
185 phy0: ethernet-phy@0 {
186 interrupt-parent = <&mpic>;
187 interrupts = <3 1>;
188 reg = <0x1>;
189 };
190
191 phy1: ethernet-phy@1 {
192 interrupt-parent = <&mpic>;
193 interrupts = <2 1>;
194 reg = <0x0>;
195 };
196
197 phy2: ethernet-phy@2 {
198 interrupt-parent = <&mpic>;
199 interrupts = <2 1>;
200 reg = <0x2>;
201 };
202 };
203
204 enet0: ethernet@b0000 {
205 phy-handle = <&phy0>;
206 phy-connection-type = "rgmii-id";
207 };
208
209 enet1: ethernet@b1000 {
210 phy-handle = <&phy1>;
211 tbi-handle = <&tbi0>;
212 phy-connection-type = "sgmii";
213 };
214
215 enet2: ethernet@b2000 {
216 phy-handle = <&phy2>;
217 tbi-handle = <&tbi1>;
218 phy-connection-type = "sgmii";
219 };
32 }; 220 };
33 221
34 pci0: pcie@ffe09000 { 222 pci0: pcie@ffe09000 {
35 reg = <0 0xffe09000 0 0x1000>;
36 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 223 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
37 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 224 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
38 pcie@0 { 225 pcie@0 {
226 reg = <0x0 0x0 0x0 0x0 0x0>;
227 #interrupt-cells = <1>;
228 #size-cells = <2>;
229 #address-cells = <3>;
230 device_type = "pci";
231 interrupt-parent = <&mpic>;
232 interrupts = <16 2>;
233 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
234 interrupt-map = <
235 /* IDSEL 0x0 */
236 0000 0x0 0x0 0x1 &mpic 0x4 0x1
237 0000 0x0 0x0 0x2 &mpic 0x5 0x1
238 0000 0x0 0x0 0x3 &mpic 0x6 0x1
239 0000 0x0 0x0 0x4 &mpic 0x7 0x1
240 >;
241
39 ranges = <0x2000000 0x0 0xa0000000 242 ranges = <0x2000000 0x0 0xa0000000
40 0x2000000 0x0 0xa0000000 243 0x2000000 0x0 0xa0000000
41 0x0 0x20000000 244 0x0 0x20000000
@@ -47,10 +250,24 @@
47 }; 250 };
48 251
49 pci1: pcie@ffe0a000 { 252 pci1: pcie@ffe0a000 {
50 reg = <0 0xffe0a000 0 0x1000>;
51 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 253 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
52 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 254 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
53 pcie@0 { 255 pcie@0 {
256 reg = <0x0 0x0 0x0 0x0 0x0>;
257 #interrupt-cells = <1>;
258 #size-cells = <2>;
259 #address-cells = <3>;
260 device_type = "pci";
261 interrupt-parent = <&mpic>;
262 interrupts = <16 2>;
263 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
264 interrupt-map = <
265 /* IDSEL 0x0 */
266 0000 0x0 0x0 0x1 &mpic 0x4 0x1
267 0000 0x0 0x0 0x2 &mpic 0x5 0x1
268 0000 0x0 0x0 0x3 &mpic 0x6 0x1
269 0000 0x0 0x0 0x4 &mpic 0x7 0x1
270 >;
54 ranges = <0x2000000 0x0 0x80000000 271 ranges = <0x2000000 0x0 0x80000000
55 0x2000000 0x0 0x80000000 272 0x2000000 0x0 0x80000000
56 0x0 0x20000000 273 0x0 0x20000000
@@ -61,6 +278,3 @@
61 }; 278 };
62 }; 279 };
63}; 280};
64
65/include/ "p1010rdb.dtsi"
66/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
deleted file mode 100644
index ec7c27a6467..00000000000
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
1/*
2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_ifc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x2000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@40000 {
45 /* 256KB for DTB Image */
46 reg = <0x00040000 0x00040000>;
47 label = "NOR DTB Image";
48 };
49
50 partition@80000 {
51 /* 7 MB for Linux Kernel Image */
52 reg = <0x00080000 0x00700000>;
53 label = "NOR Linux Kernel Image";
54 };
55
56 partition@800000 {
57 /* 20MB for JFFS2 based Root file System */
58 reg = <0x00800000 0x01400000>;
59 label = "NOR JFFS2 Root File System";
60 };
61
62 partition@1f00000 {
63 /* This location must not be altered */
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
66 reg = <0x01f00000 0x00100000>;
67 label = "NOR U-Boot Image";
68 read-only;
69 };
70 };
71
72 nand@1,0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "fsl,ifc-nand";
76 reg = <0x1 0x0 0x10000>;
77
78 partition@0 {
79 /* This location must not be altered */
80 /* 1MB for u-boot Bootloader Image */
81 reg = <0x0 0x00100000>;
82 label = "NAND U-Boot Image";
83 read-only;
84 };
85
86 partition@100000 {
87 /* 1MB for DTB Image */
88 reg = <0x00100000 0x00100000>;
89 label = "NAND DTB Image";
90 };
91
92 partition@200000 {
93 /* 4MB for Linux Kernel Image */
94 reg = <0x00200000 0x00400000>;
95 label = "NAND Linux Kernel Image";
96 };
97
98 partition@600000 {
99 /* 4MB for Compressed Root file System Image */
100 reg = <0x00600000 0x00400000>;
101 label = "NAND Compressed RFS Image";
102 };
103
104 partition@a00000 {
105 /* 15MB for JFFS2 based Root file System */
106 reg = <0x00a00000 0x00f00000>;
107 label = "NAND JFFS2 Root File System";
108 };
109
110 partition@1900000 {
111 /* 7MB for User Area */
112 reg = <0x01900000 0x00700000>;
113 label = "NAND User area";
114 };
115 };
116
117 cpld@3,0 {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "fsl,p1010rdb-cpld";
121 reg = <0x3 0x0 0x0000020>;
122 bank-width = <1>;
123 device-width = <1>;
124 };
125};
126
127&board_soc {
128 i2c@3000 {
129 eeprom@50 {
130 compatible = "st,24c256";
131 reg = <0x50>;
132 };
133
134 rtc@68 {
135 compatible = "pericom,pt7c4338";
136 reg = <0x68>;
137 };
138 };
139
140 i2c@3100 {
141 eeprom@52 {
142 compatible = "atmel,24c01";
143 reg = <0x52>;
144 };
145 };
146
147 spi@7000 {
148 flash@0 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 compatible = "spansion,s25sl12801";
152 reg = <0>;
153 spi-max-frequency = <40000000>;
154
155 partition@0 {
156 /* 1MB for u-boot Bootloader Image */
157 /* 1MB for Environment */
158 reg = <0x0 0x00100000>;
159 label = "SPI Flash U-Boot Image";
160 read-only;
161 };
162
163 partition@100000 {
164 /* 512KB for DTB Image */
165 reg = <0x00100000 0x00080000>;
166 label = "SPI Flash DTB Image";
167 };
168
169 partition@180000 {
170 /* 4MB for Linux Kernel Image */
171 reg = <0x00180000 0x00400000>;
172 label = "SPI Flash Linux Kernel Image";
173 };
174
175 partition@580000 {
176 /* 4MB for Compressed RFS Image */
177 reg = <0x00580000 0x00400000>;
178 label = "SPI Flash Compressed RFSImage";
179 };
180
181 partition@980000 {
182 /* 6.5MB for JFFS2 based RFS */
183 reg = <0x00980000 0x00680000>;
184 label = "SPI Flash JFFS2 RFS";
185 };
186 };
187 };
188
189 usb@22000 {
190 phy_type = "utmi";
191 dr_mode = "host";
192 };
193
194 mdio@24000 {
195 phy0: ethernet-phy@0 {
196 interrupts = <3 1 0 0>;
197 reg = <0x1>;
198 };
199
200 phy1: ethernet-phy@1 {
201 interrupts = <2 1 0 0>;
202 reg = <0x0>;
203 };
204
205 phy2: ethernet-phy@2 {
206 interrupts = <2 1 0 0>;
207 reg = <0x2>;
208 };
209
210 tbi-phy@3 {
211 device_type = "tbi-phy";
212 reg = <0x3>;
213 };
214 };
215
216 mdio@25000 {
217 tbi0: tbi-phy@11 {
218 reg = <0x11>;
219 device_type = "tbi-phy";
220 };
221 };
222
223 mdio@26000 {
224 tbi1: tbi-phy@11 {
225 reg = <0x11>;
226 device_type = "tbi-phy";
227 };
228 };
229
230 enet0: ethernet@b0000 {
231 phy-handle = <&phy0>;
232 phy-connection-type = "rgmii-id";
233 };
234
235 enet1: ethernet@b1000 {
236 phy-handle = <&phy1>;
237 tbi-handle = <&tbi0>;
238 phy-connection-type = "sgmii";
239 };
240
241 enet2: ethernet@b2000 {
242 phy-handle = <&phy2>;
243 tbi-handle = <&tbi1>;
244 phy-connection-type = "sgmii";
245 };
246};
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts b/arch/powerpc/boot/dts/p1010rdb_36b.dts
deleted file mode 100644
index 64776f4a465..00000000000
--- a/arch/powerpc/boot/dts/p1010rdb_36b.dts
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P1010 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1010si-pre.dtsi"
36
37/ {
38 model = "fsl,P1010RDB";
39 compatible = "fsl,P1010RDB";
40
41 memory {
42 device_type = "memory";
43 };
44
45 board_ifc: ifc: ifc@fffe1e000 {
46 /* NOR, NAND Flashes and CPLD on board */
47 ranges = <0x0 0x0 0xf 0xee000000 0x02000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x3 0x0 0xf 0xffb00000 0x00000020>;
50 reg = <0xf 0xffe1e000 0 0x2000>;
51 };
52
53 board_soc: soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0 0x1000>;
59 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xc0000000
63 0x2000000 0x0 0xc0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xc0000000
78 0x2000000 0x0 0xc0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1010rdb.dtsi"
89/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
deleted file mode 100644
index a24699cfea9..00000000000
--- a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
+++ /dev/null
@@ -1,151 +0,0 @@
1/*
2 * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x4000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* 128KB for DTB Image */
46 reg = <0x0 0x00020000>;
47 label = "NOR DTB Image";
48 };
49
50 partition@20000 {
51 /* 3.875 MB for Linux Kernel Image */
52 reg = <0x00020000 0x003e0000>;
53 label = "NOR Linux Kernel Image";
54 };
55
56 partition@400000 {
57 /* 58MB for Root file System */
58 reg = <0x00400000 0x03a00000>;
59 label = "NOR Root File System";
60 };
61
62 partition@3e00000 {
63 /* This location must not be altered */
64 /* 1M for Vitesse 7385 Switch firmware */
65 reg = <0x3e00000 0x00100000>;
66 label = "NOR Vitesse-7385 Firmware";
67 read-only;
68 };
69
70 partition@3f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x03f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 L2switch@2,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "vitesse-7385";
84 reg = <0x2 0x0 0x20000>;
85 };
86};
87
88&soc {
89 i2c@3000 {
90 rtc@68 {
91 compatible = "dallas,ds1339";
92 reg = <0x68>;
93 };
94 };
95
96 mdio@24000 {
97 phy0: ethernet-phy@0 {
98 interrupts = <3 1 0 0>;
99 reg = <0x0>;
100 };
101 phy1: ethernet-phy@1 {
102 interrupts = <2 1 0 0>;
103 reg = <0x1>;
104 };
105 };
106
107 mdio@25000 {
108 tbi1: tbi-phy@11 {
109 reg = <0x11>;
110 device_type = "tbi-phy";
111 };
112 };
113
114 mdio@26000 {
115 tbi2: tbi-phy@11 {
116 reg = <0x11>;
117 device_type = "tbi-phy";
118 };
119 };
120
121 enet0: ethernet@b0000 {
122 fixed-link = <1 1 1000 0 0>;
123 phy-connection-type = "rgmii-id";
124 };
125
126 enet1: ethernet@b1000 {
127 phy-handle = <&phy0>;
128 tbi-handle = <&tbi1>;
129 phy-connection-type = "sgmii";
130 };
131
132 enet2: ethernet@b2000 {
133 phy-handle = <&phy1>;
134 phy-connection-type = "rgmii-id";
135 };
136
137 usb@22000 {
138 phy_type = "ulpi";
139 };
140
141 /* USB2 is shared with localbus, so it must be disabled
142 by default. We can't put 'status = "disabled";' here
143 since U-Boot doesn't clear the status property when
144 it enables USB2. OTOH, U-Boot does create a new node
145 when there isn't any. So, just comment it out.
146 */
147 usb@23000 {
148 status = "disabled";
149 phy_type = "ulpi";
150 };
151};
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
deleted file mode 100644
index ab8f076eae9..00000000000
--- a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P1020 MBG-PC Device Tree Source (32-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020MBG-PC";
38 compatible = "fsl,P1020MBG-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0x0 0x1000>;
46
47 /* NOR and L2 switch */
48 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
49 0x1 0x0 0x0 0xffa00000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 reg = <0x0 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0x0 0xffe0a000 0x0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020mbg-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
deleted file mode 100644
index 9e9f401419b..00000000000
--- a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P1020 MBG-PC Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020MBG-PC";
38 compatible = "fsl,P1020MBG-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0x0 0x1000>;
46
47 /* NOR and L2 switch */
48 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
49 0x1 0x0 0xf 0xffa00000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020mbg-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi b/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
deleted file mode 100644
index c952cd37cf6..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
+++ /dev/null
@@ -1,247 +0,0 @@
1/*
2 * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p1020-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 7MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00700000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1100000 {
120 /* 15MB for JFFS2 based Root file System */
121 reg = <0x01100000 0x00f00000>;
122 label = "NAND Writable User area";
123 };
124 };
125
126 L2switch@2,0 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "vitesse-7385";
130 reg = <0x2 0x0 0x20000>;
131 };
132
133 cpld@3,0 {
134 #address-cells = <1>;
135 #size-cells = <1>;
136 compatible = "cpld";
137 reg = <0x3 0x0 0x20000>;
138 read-only;
139 };
140};
141
142&soc {
143 i2c@3000 {
144 rtc@68 {
145 compatible = "pericom,pt7c4338";
146 reg = <0x68>;
147 };
148 };
149
150 spi@7000 {
151 flash@0 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "spansion,s25sl12801";
155 reg = <0>;
156 spi-max-frequency = <40000000>; /* input clock */
157
158 partition@u-boot {
159 /* 512KB for u-boot Bootloader Image */
160 reg = <0x0 0x00080000>;
161 label = "u-boot";
162 read-only;
163 };
164
165 partition@dtb {
166 /* 512KB for DTB Image*/
167 reg = <0x00080000 0x00080000>;
168 label = "dtb";
169 };
170
171 partition@kernel {
172 /* 4MB for Linux Kernel Image */
173 reg = <0x00100000 0x00400000>;
174 label = "kernel";
175 };
176
177 partition@fs {
178 /* 4MB for Compressed RFS Image */
179 reg = <0x00500000 0x00400000>;
180 label = "file system";
181 };
182
183 partition@jffs-fs {
184 /* 7MB for JFFS2 based RFS */
185 reg = <0x00900000 0x00700000>;
186 label = "file system jffs2";
187 };
188 };
189 };
190
191 usb@22000 {
192 phy_type = "ulpi";
193 };
194
195 /* USB2 is shared with localbus, so it must be disabled
196 by default. We can't put 'status = "disabled";' here
197 since U-Boot doesn't clear the status property when
198 it enables USB2. OTOH, U-Boot does create a new node
199 when there isn't any. So, just comment it out.
200 usb@23000 {
201 phy_type = "ulpi";
202 };
203 */
204
205 mdio@24000 {
206 phy0: ethernet-phy@0 {
207 interrupt-parent = <&mpic>;
208 interrupts = <3 1>;
209 reg = <0x0>;
210 };
211
212 phy1: ethernet-phy@1 {
213 interrupt-parent = <&mpic>;
214 interrupts = <2 1>;
215 reg = <0x1>;
216 };
217
218 tbi0: tbi-phy@11 {
219 device_type = "tbi-phy";
220 reg = <0x11>;
221 };
222 };
223
224 mdio@25000 {
225 tbi1: tbi-phy@11 {
226 reg = <0x11>;
227 device_type = "tbi-phy";
228 };
229 };
230
231 enet0: ethernet@b0000 {
232 fixed-link = <1 1 1000 0 0>;
233 phy-connection-type = "rgmii-id";
234
235 };
236
237 enet1: ethernet@b1000 {
238 phy-handle = <&phy0>;
239 tbi-handle = <&tbi1>;
240 phy-connection-type = "sgmii";
241 };
242
243 enet2: ethernet@b2000 {
244 phy-handle = <&phy1>;
245 phy-connection-type = "rgmii-id";
246 };
247};
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts b/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
deleted file mode 100644
index 4de69b726dc..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * P1020 RDB-PC Device Tree Source (32-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020RDB-PC";
38 compatible = "fsl,P1020RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000
51 0x3 0x0 0x0 0xffa00000 0x00020000>;
52 };
53
54 soc: soc@ffe00000 {
55 ranges = <0x0 0x0 0xffe00000 0x100000>;
56 };
57
58 pci0: pcie@ffe09000 {
59 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
61 reg = <0 0xffe09000 0 0x1000>;
62 pcie@0 {
63 ranges = <0x2000000 0x0 0xa0000000
64 0x2000000 0x0 0xa0000000
65 0x0 0x20000000
66
67 0x1000000 0x0 0x0
68 0x1000000 0x0 0x0
69 0x0 0x100000>;
70 };
71 };
72
73 pci1: pcie@ffe0a000 {
74 reg = <0 0xffe0a000 0 0x1000>;
75 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
76 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
77 pcie@0 {
78 ranges = <0x2000000 0x0 0x80000000
79 0x2000000 0x0 0x80000000
80 0x0 0x20000000
81
82 0x1000000 0x0 0x0
83 0x1000000 0x0 0x0
84 0x0 0x100000>;
85 };
86 };
87};
88
89/include/ "p1020rdb-pc.dtsi"
90/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
deleted file mode 100644
index 5237da7441b..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * P1020 RDB-PC Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020RDB-PC";
38 compatible = "fsl,P1020RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00040000
51 0x3 0x0 0xf 0xffa00000 0x00020000>;
52 };
53
54 soc: soc@fffe00000 {
55 ranges = <0x0 0xf 0xffe00000 0x100000>;
56 };
57
58 pci0: pcie@fffe09000 {
59 reg = <0xf 0xffe09000 0 0x1000>;
60 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
61 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
62 pcie@0 {
63 ranges = <0x2000000 0x0 0xc0000000
64 0x2000000 0x0 0xc0000000
65 0x0 0x20000000
66
67 0x1000000 0x0 0x0
68 0x1000000 0x0 0x0
69 0x0 0x100000>;
70 };
71 };
72
73 pci1: pcie@fffe0a000 {
74 reg = <0xf 0xffe0a000 0 0x1000>;
75 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
76 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
77 pcie@0 {
78 ranges = <0x2000000 0x0 0x80000000
79 0x2000000 0x0 0x80000000
80 0x0 0x20000000
81
82 0x1000000 0x0 0x0
83 0x1000000 0x0 0x0
84 0x0 0x100000>;
85 };
86 };
87};
88
89/include/ "p1020rdb-pc.dtsi"
90/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
deleted file mode 100644
index f411515937e..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
7 * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
8 *
9 * Please note to add "-b 0" for core0's dts compiling.
10 *
11 * Copyright 2012 Freescale Semiconductor Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19/include/ "p1020rdb-pc_32b.dts"
20
21/ {
22 model = "fsl,P1020RDB-PC";
23 compatible = "fsl,P1020RDB-PC";
24
25 aliases {
26 ethernet1 = &enet1;
27 ethernet2 = &enet2;
28 serial0 = &serial0;
29 pci0 = &pci0;
30 pci1 = &pci1;
31 };
32
33 cpus {
34 PowerPC,P1020@1 {
35 status = "disabled";
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 };
42
43 localbus@ffe05000 {
44 status = "disabled";
45 };
46
47 soc@ffe00000 {
48 serial1: serial@4600 {
49 status = "disabled";
50 };
51
52 enet0: ethernet@b0000 {
53 status = "disabled";
54 };
55
56 mpic: pic@40000 {
57 protected-sources = <
58 42 29 30 34 /* serial1, enet0-queue-group0 */
59 17 18 24 45 /* enet0-queue-group1, crypto */
60 >;
61 pic-no-reset;
62 };
63 };
64};
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
deleted file mode 100644
index a91335ad82c..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
+++ /dev/null
@@ -1,142 +0,0 @@
1/*
2 * P1020 RDB-PC Core1 Device Tree Source in CAMP mode.
3 *
4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
5 * can be shared, all the other devices must be assigned to one core only.
6 * This dts allows core1 to have l2, eth0, crypto.
7 *
8 * Please note to add "-b 1" for core1's dts compiling.
9 *
10 * Copyright 2012 Freescale Semiconductor Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17
18/include/ "p1020rdb-pc_32b.dts"
19
20/ {
21 model = "fsl,P1020RDB-PC";
22 compatible = "fsl,P1020RDB-PC";
23
24 aliases {
25 ethernet0 = &enet0;
26 serial0 = &serial1;
27 };
28
29 cpus {
30 PowerPC,P1020@0 {
31 status = "disabled";
32 };
33 };
34
35 memory {
36 device_type = "memory";
37 };
38
39 localbus@ffe05000 {
40 status = "disabled";
41 };
42
43 soc@ffe00000 {
44 ecm-law@0 {
45 status = "disabled";
46 };
47
48 ecm@1000 {
49 status = "disabled";
50 };
51
52 memory-controller@2000 {
53 status = "disabled";
54 };
55
56 i2c@3000 {
57 status = "disabled";
58 };
59
60 i2c@3100 {
61 status = "disabled";
62 };
63
64 serial0: serial@4500 {
65 status = "disabled";
66 };
67
68 spi@7000 {
69 status = "disabled";
70 };
71
72 gpio: gpio-controller@f000 {
73 status = "disabled";
74 };
75
76 dma@21300 {
77 status = "disabled";
78 };
79
80 mdio@24000 {
81 status = "disabled";
82 };
83
84 mdio@25000 {
85 status = "disabled";
86 };
87
88 enet1: ethernet@b1000 {
89 status = "disabled";
90 };
91
92 enet2: ethernet@b2000 {
93 status = "disabled";
94 };
95
96 usb@22000 {
97 status = "disabled";
98 };
99
100 sdhci@2e000 {
101 status = "disabled";
102 };
103
104 mpic: pic@40000 {
105 protected-sources = <
106 16 /* ecm, mem, L2, pci0, pci1 */
107 43 42 59 /* i2c, serial0, spi */
108 47 63 62 /* gpio, tdm */
109 20 21 22 23 /* dma */
110 03 02 /* mdio */
111 35 36 40 /* enet1-queue-group0 */
112 51 52 67 /* enet1-queue-group1 */
113 31 32 33 /* enet2-queue-group0 */
114 25 26 27 /* enet2-queue-group1 */
115 28 72 58 /* usb, sdhci, crypto */
116 0xb0 0xb1 0xb2 /* message */
117 0xb3 0xb4 0xb5
118 0xb6 0xb7
119 0xe0 0xe1 0xe2 /* msi */
120 0xe3 0xe4 0xe5
121 0xe6 0xe7 /* sdhci, crypto , pci */
122 >;
123 pic-no-reset;
124 };
125
126 msi@41600 {
127 status = "disabled";
128 };
129
130 global-utilities@e0000 { //global utilities block
131 status = "disabled";
132 };
133 };
134
135 pci0: pcie@ffe09000 {
136 status = "disabled";
137 };
138
139 pci1: pcie@ffe0a000 {
140 status = "disabled";
141 };
142};
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index 518bf99b1f5..d6a8ae45813 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -9,33 +9,267 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/p1020si-pre.dtsi" 12/include/ "p1020si.dtsi"
13
13/ { 14/ {
14 model = "fsl,P1020RDB"; 15 model = "fsl,P1020RDB";
15 compatible = "fsl,P1020RDB"; 16 compatible = "fsl,P1020RDB";
16 17
18 aliases {
19 serial0 = &serial0;
20 serial1 = &serial1;
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 };
27
17 memory { 28 memory {
18 device_type = "memory"; 29 device_type = "memory";
19 }; 30 };
20 31
21 board_lbc: lbc: localbus@ffe05000 { 32 localbus@ffe05000 {
22 reg = <0 0xffe05000 0 0x1000>;
23 33
24 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ 34 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
25 ranges = <0x0 0x0 0x0 0xef000000 0x01000000 35 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
26 0x1 0x0 0x0 0xffa00000 0x00040000 36 0x1 0x0 0x0 0xffa00000 0x00040000
27 0x2 0x0 0x0 0xffb00000 0x00020000>; 37 0x2 0x0 0x0 0xffb00000 0x00020000>;
38
39 nor@0,0 {
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "cfi-flash";
43 reg = <0x0 0x0 0x1000000>;
44 bank-width = <2>;
45 device-width = <1>;
46
47 partition@0 {
48 /* This location must not be altered */
49 /* 256KB for Vitesse 7385 Switch firmware */
50 reg = <0x0 0x00040000>;
51 label = "NOR (RO) Vitesse-7385 Firmware";
52 read-only;
53 };
54
55 partition@40000 {
56 /* 256KB for DTB Image */
57 reg = <0x00040000 0x00040000>;
58 label = "NOR (RO) DTB Image";
59 read-only;
60 };
61
62 partition@80000 {
63 /* 3.5 MB for Linux Kernel Image */
64 reg = <0x00080000 0x00380000>;
65 label = "NOR (RO) Linux Kernel Image";
66 read-only;
67 };
68
69 partition@400000 {
70 /* 11MB for JFFS2 based Root file System */
71 reg = <0x00400000 0x00b00000>;
72 label = "NOR (RW) JFFS2 Root File System";
73 };
74
75 partition@f00000 {
76 /* This location must not be altered */
77 /* 512KB for u-boot Bootloader Image */
78 /* 512KB for u-boot Environment Variables */
79 reg = <0x00f00000 0x00100000>;
80 label = "NOR (RO) U-Boot Image";
81 read-only;
82 };
83 };
84
85 nand@1,0 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "fsl,p1020-fcm-nand",
89 "fsl,elbc-fcm-nand";
90 reg = <0x1 0x0 0x40000>;
91
92 partition@0 {
93 /* This location must not be altered */
94 /* 1MB for u-boot Bootloader Image */
95 reg = <0x0 0x00100000>;
96 label = "NAND (RO) U-Boot Image";
97 read-only;
98 };
99
100 partition@100000 {
101 /* 1MB for DTB Image */
102 reg = <0x00100000 0x00100000>;
103 label = "NAND (RO) DTB Image";
104 read-only;
105 };
106
107 partition@200000 {
108 /* 4MB for Linux Kernel Image */
109 reg = <0x00200000 0x00400000>;
110 label = "NAND (RO) Linux Kernel Image";
111 read-only;
112 };
113
114 partition@600000 {
115 /* 4MB for Compressed Root file System Image */
116 reg = <0x00600000 0x00400000>;
117 label = "NAND (RO) Compressed RFS Image";
118 read-only;
119 };
120
121 partition@a00000 {
122 /* 7MB for JFFS2 based Root file System */
123 reg = <0x00a00000 0x00700000>;
124 label = "NAND (RW) JFFS2 Root File System";
125 };
126
127 partition@1100000 {
128 /* 15MB for JFFS2 based Root file System */
129 reg = <0x01100000 0x00f00000>;
130 label = "NAND (RW) Writable User area";
131 };
132 };
133
134 L2switch@2,0 {
135 #address-cells = <1>;
136 #size-cells = <1>;
137 compatible = "vitesse-7385";
138 reg = <0x2 0x0 0x20000>;
139 };
140
28 }; 141 };
29 142
30 board_soc: soc: soc@ffe00000 { 143 soc@ffe00000 {
31 ranges = <0x0 0x0 0xffe00000 0x100000>; 144 i2c@3000 {
145 rtc@68 {
146 compatible = "dallas,ds1339";
147 reg = <0x68>;
148 };
149 };
150
151 spi@7000 {
152
153 fsl_m25p80@0 {
154 #address-cells = <1>;
155 #size-cells = <1>;
156 compatible = "fsl,espi-flash";
157 reg = <0>;
158 linux,modalias = "fsl_m25p80";
159 modal = "s25sl128b";
160 spi-max-frequency = <50000000>;
161 mode = <0>;
162
163 partition@0 {
164 /* 512KB for u-boot Bootloader Image */
165 reg = <0x0 0x00080000>;
166 label = "SPI (RO) U-Boot Image";
167 read-only;
168 };
169
170 partition@80000 {
171 /* 512KB for DTB Image */
172 reg = <0x00080000 0x00080000>;
173 label = "SPI (RO) DTB Image";
174 read-only;
175 };
176
177 partition@100000 {
178 /* 4MB for Linux Kernel Image */
179 reg = <0x00100000 0x00400000>;
180 label = "SPI (RO) Linux Kernel Image";
181 read-only;
182 };
183
184 partition@500000 {
185 /* 4MB for Compressed RFS Image */
186 reg = <0x00500000 0x00400000>;
187 label = "SPI (RO) Compressed RFS Image";
188 read-only;
189 };
190
191 partition@900000 {
192 /* 7MB for JFFS2 based RFS */
193 reg = <0x00900000 0x00700000>;
194 label = "SPI (RW) JFFS2 RFS";
195 };
196 };
197 };
198
199 mdio@24000 {
200
201 phy0: ethernet-phy@0 {
202 interrupt-parent = <&mpic>;
203 interrupts = <3 1>;
204 reg = <0x0>;
205 };
206
207 phy1: ethernet-phy@1 {
208 interrupt-parent = <&mpic>;
209 interrupts = <2 1>;
210 reg = <0x1>;
211 };
212 };
213
214 mdio@25000 {
215
216 tbi0: tbi-phy@11 {
217 reg = <0x11>;
218 device_type = "tbi-phy";
219 };
220 };
221
222 enet0: ethernet@b0000 {
223 fixed-link = <1 1 1000 0 0>;
224 phy-connection-type = "rgmii-id";
225
226 };
227
228 enet1: ethernet@b1000 {
229 phy-handle = <&phy0>;
230 tbi-handle = <&tbi0>;
231 phy-connection-type = "sgmii";
232
233 };
234
235 enet2: ethernet@b2000 {
236 phy-handle = <&phy1>;
237 phy-connection-type = "rgmii-id";
238
239 };
240
241 usb@22000 {
242 phy_type = "ulpi";
243 };
244
245 /* USB2 is shared with localbus, so it must be disabled
246 by default. We can't put 'status = "disabled";' here
247 since U-Boot doesn't clear the status property when
248 it enables USB2. OTOH, U-Boot does create a new node
249 when there isn't any. So, just comment it out.
250 usb@23000 {
251 phy_type = "ulpi";
252 };
253 */
254
32 }; 255 };
33 256
34 pci0: pcie@ffe09000 { 257 pci0: pcie@ffe09000 {
35 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 258 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
36 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 259 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
37 reg = <0 0xffe09000 0 0x1000>; 260 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
261 interrupt-map = <
262 /* IDSEL 0x0 */
263 0000 0x0 0x0 0x1 &mpic 0x4 0x1
264 0000 0x0 0x0 0x2 &mpic 0x5 0x1
265 0000 0x0 0x0 0x3 &mpic 0x6 0x1
266 0000 0x0 0x0 0x4 &mpic 0x7 0x1
267 >;
38 pcie@0 { 268 pcie@0 {
269 reg = <0x0 0x0 0x0 0x0 0x0>;
270 #size-cells = <2>;
271 #address-cells = <3>;
272 device_type = "pci";
39 ranges = <0x2000000 0x0 0xa0000000 273 ranges = <0x2000000 0x0 0xa0000000
40 0x2000000 0x0 0xa0000000 274 0x2000000 0x0 0xa0000000
41 0x0 0x20000000 275 0x0 0x20000000
@@ -47,10 +281,21 @@
47 }; 281 };
48 282
49 pci1: pcie@ffe0a000 { 283 pci1: pcie@ffe0a000 {
50 reg = <0 0xffe0a000 0 0x1000>;
51 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 284 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
52 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 285 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
286 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
287 interrupt-map = <
288 /* IDSEL 0x0 */
289 0000 0x0 0x0 0x1 &mpic 0x0 0x1
290 0000 0x0 0x0 0x2 &mpic 0x1 0x1
291 0000 0x0 0x0 0x3 &mpic 0x2 0x1
292 0000 0x0 0x0 0x4 &mpic 0x3 0x1
293 >;
53 pcie@0 { 294 pcie@0 {
295 reg = <0x0 0x0 0x0 0x0 0x0>;
296 #size-cells = <2>;
297 #address-cells = <3>;
298 device_type = "pci";
54 ranges = <0x2000000 0x0 0x80000000 299 ranges = <0x2000000 0x0 0x80000000
55 0x2000000 0x0 0x80000000 300 0x2000000 0x0 0x80000000
56 0x0 0x20000000 301 0x0 0x20000000
@@ -61,6 +306,3 @@
61 }; 306 };
62 }; 307 };
63}; 308};
64
65/include/ "p1020rdb.dtsi"
66/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/p1020rdb.dtsi
deleted file mode 100644
index 1fb7e0e0940..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
1/*
2 * P1020 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR (RO) Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR (RO) DTB Image";
56 read-only;
57 };
58
59 partition@80000 {
60 /* 3.5 MB for Linux Kernel Image */
61 reg = <0x00080000 0x00380000>;
62 label = "NOR (RO) Linux Kernel Image";
63 read-only;
64 };
65
66 partition@400000 {
67 /* 11MB for JFFS2 based Root file System */
68 reg = <0x00400000 0x00b00000>;
69 label = "NOR (RW) JFFS2 Root File System";
70 };
71
72 partition@f00000 {
73 /* This location must not be altered */
74 /* 512KB for u-boot Bootloader Image */
75 /* 512KB for u-boot Environment Variables */
76 reg = <0x00f00000 0x00100000>;
77 label = "NOR (RO) U-Boot Image";
78 read-only;
79 };
80 };
81
82 nand@1,0 {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 compatible = "fsl,p1020-fcm-nand",
86 "fsl,elbc-fcm-nand";
87 reg = <0x1 0x0 0x40000>;
88
89 partition@0 {
90 /* This location must not be altered */
91 /* 1MB for u-boot Bootloader Image */
92 reg = <0x0 0x00100000>;
93 label = "NAND (RO) U-Boot Image";
94 read-only;
95 };
96
97 partition@100000 {
98 /* 1MB for DTB Image */
99 reg = <0x00100000 0x00100000>;
100 label = "NAND (RO) DTB Image";
101 read-only;
102 };
103
104 partition@200000 {
105 /* 4MB for Linux Kernel Image */
106 reg = <0x00200000 0x00400000>;
107 label = "NAND (RO) Linux Kernel Image";
108 read-only;
109 };
110
111 partition@600000 {
112 /* 4MB for Compressed Root file System Image */
113 reg = <0x00600000 0x00400000>;
114 label = "NAND (RO) Compressed RFS Image";
115 read-only;
116 };
117
118 partition@a00000 {
119 /* 7MB for JFFS2 based Root file System */
120 reg = <0x00a00000 0x00700000>;
121 label = "NAND (RW) JFFS2 Root File System";
122 };
123
124 partition@1100000 {
125 /* 15MB for JFFS2 based Root file System */
126 reg = <0x01100000 0x00f00000>;
127 label = "NAND (RW) Writable User area";
128 };
129 };
130
131 L2switch@2,0 {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "vitesse-7385";
135 reg = <0x2 0x0 0x20000>;
136 };
137};
138
139&board_soc {
140 i2c@3000 {
141 rtc@68 {
142 compatible = "dallas,ds1339";
143 reg = <0x68>;
144 };
145 };
146
147 spi@7000 {
148 flash@0 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 compatible = "spansion,s25sl12801";
152 reg = <0>;
153 spi-max-frequency = <40000000>; /* input clock */
154
155 partition@u-boot {
156 /* 512KB for u-boot Bootloader Image */
157 reg = <0x0 0x00080000>;
158 label = "u-boot";
159 read-only;
160 };
161
162 partition@dtb {
163 /* 512KB for DTB Image */
164 reg = <0x00080000 0x00080000>;
165 label = "dtb";
166 read-only;
167 };
168
169 partition@kernel {
170 /* 4MB for Linux Kernel Image */
171 reg = <0x00100000 0x00400000>;
172 label = "kernel";
173 read-only;
174 };
175
176 partition@fs {
177 /* 4MB for Compressed RFS Image */
178 reg = <0x00500000 0x00400000>;
179 label = "file system";
180 read-only;
181 };
182
183 partition@jffs-fs {
184 /* 7MB for JFFS2 based RFS */
185 reg = <0x00900000 0x00700000>;
186 label = "file system jffs2";
187 };
188 };
189 };
190
191 usb@22000 {
192 phy_type = "ulpi";
193 dr_mode = "host";
194 };
195
196 /* USB2 is shared with localbus. It is used
197 only in case of SPI and SD boot after
198 appropriate device-tree fixup done by uboot */
199 usb@23000 {
200 phy_type = "ulpi";
201 dr_mode = "host";
202 };
203
204 mdio@24000 {
205 phy0: ethernet-phy@0 {
206 interrupt-parent = <&mpic>;
207 interrupts = <3 1>;
208 reg = <0x0>;
209 };
210
211 phy1: ethernet-phy@1 {
212 interrupt-parent = <&mpic>;
213 interrupts = <2 1>;
214 reg = <0x1>;
215 };
216
217 tbi-phy@2 {
218 device_type = "tbi-phy";
219 reg = <0x2>;
220 };
221 };
222
223 mdio@25000 {
224 tbi0: tbi-phy@11 {
225 reg = <0x11>;
226 device_type = "tbi-phy";
227 };
228 };
229
230 enet0: ethernet@b0000 {
231 fixed-link = <1 1 1000 0 0>;
232 phy-connection-type = "rgmii-id";
233
234 };
235
236 enet1: ethernet@b1000 {
237 phy-handle = <&phy0>;
238 tbi-handle = <&tbi0>;
239 phy-connection-type = "sgmii";
240 };
241
242 enet2: ethernet@b2000 {
243 phy-handle = <&phy1>;
244 phy-connection-type = "rgmii-id";
245 };
246};
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts b/arch/powerpc/boot/dts/p1020rdb_36b.dts
deleted file mode 100644
index bdbdb6097e5..00000000000
--- a/arch/powerpc/boot/dts/p1020rdb_36b.dts
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * P1020 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2009-2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/p1020si-pre.dtsi"
13/ {
14 model = "fsl,P1020RDB";
15 compatible = "fsl,P1020RDB";
16
17 memory {
18 device_type = "memory";
19 };
20
21 board_lbc: lbc: localbus@fffe05000 {
22 reg = <0xf 0xffe05000 0 0x1000>;
23
24 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
25 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
26 0x1 0x0 0xf 0xffa00000 0x00040000
27 0x2 0x0 0xf 0xffb00000 0x00020000>;
28 };
29
30 board_soc: soc: soc@fffe00000 {
31 ranges = <0x0 0xf 0xffe00000 0x100000>;
32 };
33
34 pci0: pcie@fffe09000 {
35 reg = <0xf 0xffe09000 0 0x1000>;
36 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
37 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
38 pcie@0 {
39 ranges = <0x2000000 0x0 0xc0000000
40 0x2000000 0x0 0xc0000000
41 0x0 0x20000000
42
43 0x1000000 0x0 0x0
44 0x1000000 0x0 0x0
45 0x0 0x100000>;
46 };
47 };
48
49 pci1: pcie@fffe0a000 {
50 reg = <0xf 0xffe0a000 0 0x1000>;
51 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
52 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
53 pcie@0 {
54 ranges = <0x2000000 0x0 0x80000000
55 0x2000000 0x0 0x80000000
56 0x0 0x20000000
57
58 0x1000000 0x0 0x0
59 0x1000000 0x0 0x0
60 0x0 0x100000>;
61 };
62 };
63};
64
65/include/ "p1020rdb.dtsi"
66/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/arch/powerpc/boot/dts/p1020utm-pc.dtsi
deleted file mode 100644
index 7ea85eabcc5..00000000000
--- a/arch/powerpc/boot/dts/p1020utm-pc.dtsi
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x2000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* 256KB for DTB Image */
46 reg = <0x0 0x00040000>;
47 label = "NOR DTB Image";
48 };
49
50 partition@40000 {
51 /* 3.75 MB for Linux Kernel Image */
52 reg = <0x00040000 0x003c0000>;
53 label = "NOR Linux Kernel Image";
54 };
55
56 partition@400000 {
57 /* 27MB for Root file System */
58 reg = <0x00400000 0x01b00000>;
59 label = "NOR Root File System";
60 };
61
62 partition@1f00000 {
63 /* This location must not be altered */
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
66 reg = <0x01f00000 0x00100000>;
67 label = "NOR U-Boot Image";
68 read-only;
69 };
70 };
71};
72
73&soc {
74 i2c@3000 {
75 rtc@68 {
76 compatible = "dallas,ds1339";
77 reg = <0x68>;
78 };
79 };
80
81 mdio@24000 {
82 phy0: ethernet-phy@0 {
83 interrupts = <3 1 0 0>;
84 reg = <0x0>;
85 };
86 phy1: ethernet-phy@1 {
87 interrupts = <2 1 0 0>;
88 reg = <0x1>;
89 };
90 phy2: ethernet-phy@2 {
91 interrupts = <1 1 0 0>;
92 reg = <0x2>;
93 };
94 };
95
96 mdio@25000 {
97 tbi1: tbi-phy@11 {
98 reg = <0x11>;
99 device_type = "tbi-phy";
100 };
101 };
102
103 mdio@26000 {
104 tbi2: tbi-phy@11 {
105 reg = <0x11>;
106 device_type = "tbi-phy";
107 };
108 };
109
110 enet0: ethernet@b0000 {
111 phy-handle = <&phy2>;
112 phy-connection-type = "rgmii-id";
113 };
114
115 enet1: ethernet@b1000 {
116 phy-handle = <&phy0>;
117 tbi-handle = <&tbi1>;
118 phy-connection-type = "sgmii";
119 };
120
121 enet2: ethernet@b2000 {
122 phy-handle = <&phy1>;
123 phy-connection-type = "rgmii-id";
124 };
125
126 usb@22000 {
127 phy_type = "ulpi";
128 };
129
130 /* USB2 is shared with localbus, so it must be disabled
131 by default. We can't put 'status = "disabled";' here
132 since U-Boot doesn't clear the status property when
133 it enables USB2. OTOH, U-Boot does create a new node
134 when there isn't any. So, just comment it out.
135 */
136 usb@23000 {
137 status = "disabled";
138 phy_type = "ulpi";
139 };
140};
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
deleted file mode 100644
index 4bfdd8971cd..00000000000
--- a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P1020 UTM-PC Device Tree Source (32-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020UTM-PC";
38 compatible = "fsl,P1020UTM-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0x0 0x1000>;
46
47 /* NOR */
48 ranges = <0x0 0x0 0x0 0xec000000 0x02000000
49 0x1 0x0 0x0 0xffa00000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 reg = <0x0 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0x0 0xffe0a000 0x0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020utm-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
deleted file mode 100644
index abec5355750..00000000000
--- a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P1020 UTM-PC Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1020UTM-PC";
38 compatible = "fsl,P1020UTM-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0x0 0x1000>;
46
47 /* NOR */
48 ranges = <0x0 0x0 0xf 0xec000000 0x02000000
49 0x1 0x0 0xf 0xffa00000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 reg = <0xf 0xffe09000 0x0 0x1000>;
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xe0000000
63 0x2000000 0x0 0xe0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xe0000000
78 0x2000000 0x0 0xe0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86};
87
88/include/ "p1020utm-pc.dtsi"
89/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts
index 97116f198a3..ad5b8526900 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/p1021mds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1021 MDS Device Tree Source 2 * P1021 MDS Device Tree Source
3 * 3 *
4 * Copyright 2010,2012 Freescale Semiconductor Inc. 4 * Copyright 2010 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,22 +9,53 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/p1021si-pre.dtsi" 12/dts-v1/;
13/ { 13/ {
14 model = "fsl,P1021"; 14 model = "fsl,P1021";
15 compatible = "fsl,P1021MDS"; 15 compatible = "fsl,P1021MDS";
16 #address-cells = <2>;
17 #size-cells = <2>;
16 18
17 aliases { 19 aliases {
20 serial0 = &serial0;
21 serial1 = &serial1;
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 ethernet2 = &enet2;
18 ethernet3 = &enet3; 25 ethernet3 = &enet3;
19 ethernet4 = &enet4; 26 ethernet4 = &enet4;
27 pci0 = &pci0;
28 pci1 = &pci1;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 PowerPC,P1021@0 {
36 device_type = "cpu";
37 reg = <0x0>;
38 next-level-cache = <&L2>;
39 };
40
41 PowerPC,P1021@1 {
42 device_type = "cpu";
43 reg = <0x1>;
44 next-level-cache = <&L2>;
45 };
20 }; 46 };
21 47
22 memory { 48 memory {
23 device_type = "memory"; 49 device_type = "memory";
24 }; 50 };
25 51
26 lbc: localbus@ffe05000 { 52 localbus@ffe05000 {
27 reg = <0x0 0xffe05000 0x0 0x1000>; 53 #address-cells = <2>;
54 #size-cells = <1>;
55 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
56 reg = <0 0xffe05000 0 0x1000>;
57 interrupts = <19 2>;
58 interrupt-parent = <&mpic>;
28 59
29 /* NAND Flash, BCSR, PMC0/1*/ 60 /* NAND Flash, BCSR, PMC0/1*/
30 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000 61 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
@@ -107,26 +138,99 @@
107 }; 138 };
108 }; 139 };
109 140
110 soc: soc@ffe00000 { 141 soc@ffe00000 {
142
143 #address-cells = <1>;
144 #size-cells = <1>;
145 device_type = "soc";
111 compatible = "fsl,p1021-immr", "simple-bus"; 146 compatible = "fsl,p1021-immr", "simple-bus";
112 ranges = <0x0 0x0 0xffe00000 0x100000>; 147 ranges = <0x0 0x0 0xffe00000 0x100000>;
148 bus-frequency = <0>; // Filled out by uboot.
149
150 ecm-law@0 {
151 compatible = "fsl,ecm-law";
152 reg = <0x0 0x1000>;
153 fsl,num-laws = <12>;
154 };
155
156 ecm@1000 {
157 compatible = "fsl,p1021-ecm", "fsl,ecm";
158 reg = <0x1000 0x1000>;
159 interrupts = <16 2>;
160 interrupt-parent = <&mpic>;
161 };
162
163 memory-controller@2000 {
164 compatible = "fsl,p1021-memory-controller";
165 reg = <0x2000 0x1000>;
166 interrupt-parent = <&mpic>;
167 interrupts = <16 2>;
168 };
113 169
114 i2c@3000 { 170 i2c@3000 {
171 #address-cells = <1>;
172 #size-cells = <0>;
173 cell-index = <0>;
174 compatible = "fsl-i2c";
175 reg = <0x3000 0x100>;
176 interrupts = <43 2>;
177 interrupt-parent = <&mpic>;
178 dfsrr;
115 rtc@68 { 179 rtc@68 {
116 compatible = "dallas,ds1374"; 180 compatible = "dallas,ds1374";
117 reg = <0x68>; 181 reg = <0x68>;
118 }; 182 };
119 }; 183 };
120 184
121 spi@7000 { 185 i2c@3100 {
186 #address-cells = <1>;
187 #size-cells = <0>;
188 cell-index = <1>;
189 compatible = "fsl-i2c";
190 reg = <0x3100 0x100>;
191 interrupts = <43 2>;
192 interrupt-parent = <&mpic>;
193 dfsrr;
194 };
195
196 serial0: serial@4500 {
197 cell-index = <0>;
198 device_type = "serial";
199 compatible = "ns16550";
200 reg = <0x4500 0x100>;
201 clock-frequency = <0>;
202 interrupts = <42 2>;
203 interrupt-parent = <&mpic>;
204 };
122 205
123 flash@0 { 206 serial1: serial@4600 {
207 cell-index = <1>;
208 device_type = "serial";
209 compatible = "ns16550";
210 reg = <0x4600 0x100>;
211 clock-frequency = <0>;
212 interrupts = <42 2>;
213 interrupt-parent = <&mpic>;
214 };
215
216 spi@7000 {
217 cell-index = <0>;
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "fsl,espi";
221 reg = <0x7000 0x1000>;
222 interrupts = <59 0x2>;
223 interrupt-parent = <&mpic>;
224 espi,num-ss-bits = <4>;
225 mode = "cpu";
226
227 fsl_m25p80@0 {
124 #address-cells = <1>; 228 #address-cells = <1>;
125 #size-cells = <1>; 229 #size-cells = <1>;
126 compatible = "spansion,s25sl12801"; 230 compatible = "fsl,espi-flash";
127 reg = <0>; 231 reg = <0>;
232 linux,modalias = "fsl_m25p80";
128 spi-max-frequency = <40000000>; /* input clock */ 233 spi-max-frequency = <40000000>; /* input clock */
129
130 partition@u-boot { 234 partition@u-boot {
131 label = "u-boot-spi"; 235 label = "u-boot-spi";
132 reg = <0x00000000 0x00100000>; 236 reg = <0x00000000 0x00100000>;
@@ -149,50 +253,237 @@
149 }; 253 };
150 }; 254 };
151 255
256 gpio: gpio-controller@f000 {
257 #gpio-cells = <2>;
258 compatible = "fsl,mpc8572-gpio";
259 reg = <0xf000 0x100>;
260 interrupts = <47 0x2>;
261 interrupt-parent = <&mpic>;
262 gpio-controller;
263 };
264
265 L2: l2-cache-controller@20000 {
266 compatible = "fsl,p1021-l2-cache-controller";
267 reg = <0x20000 0x1000>;
268 cache-line-size = <32>; // 32 bytes
269 cache-size = <0x40000>; // L2,256K
270 interrupt-parent = <&mpic>;
271 interrupts = <16 2>;
272 };
273
274 dma@21300 {
275 #address-cells = <1>;
276 #size-cells = <1>;
277 compatible = "fsl,eloplus-dma";
278 reg = <0x21300 0x4>;
279 ranges = <0x0 0x21100 0x200>;
280 cell-index = <0>;
281 dma-channel@0 {
282 compatible = "fsl,eloplus-dma-channel";
283 reg = <0x0 0x80>;
284 cell-index = <0>;
285 interrupt-parent = <&mpic>;
286 interrupts = <20 2>;
287 };
288 dma-channel@80 {
289 compatible = "fsl,eloplus-dma-channel";
290 reg = <0x80 0x80>;
291 cell-index = <1>;
292 interrupt-parent = <&mpic>;
293 interrupts = <21 2>;
294 };
295 dma-channel@100 {
296 compatible = "fsl,eloplus-dma-channel";
297 reg = <0x100 0x80>;
298 cell-index = <2>;
299 interrupt-parent = <&mpic>;
300 interrupts = <22 2>;
301 };
302 dma-channel@180 {
303 compatible = "fsl,eloplus-dma-channel";
304 reg = <0x180 0x80>;
305 cell-index = <3>;
306 interrupt-parent = <&mpic>;
307 interrupts = <23 2>;
308 };
309 };
310
152 usb@22000 { 311 usb@22000 {
312 #address-cells = <1>;
313 #size-cells = <0>;
314 compatible = "fsl-usb2-dr";
315 reg = <0x22000 0x1000>;
316 interrupt-parent = <&mpic>;
317 interrupts = <28 0x2>;
153 phy_type = "ulpi"; 318 phy_type = "ulpi";
154 dr_mode = "host";
155 }; 319 };
156 320
157 mdio@24000 { 321 mdio@24000 {
322 #address-cells = <1>;
323 #size-cells = <0>;
324 compatible = "fsl,etsec2-mdio";
325 reg = <0x24000 0x1000 0xb0030 0x4>;
326
158 phy0: ethernet-phy@0 { 327 phy0: ethernet-phy@0 {
159 interrupts = <1 1 0 0>; 328 interrupt-parent = <&mpic>;
329 interrupts = <1 1>;
160 reg = <0x0>; 330 reg = <0x0>;
161 }; 331 };
162 phy1: ethernet-phy@1 { 332 phy1: ethernet-phy@1 {
163 interrupts = <2 1 0 0>; 333 interrupt-parent = <&mpic>;
334 interrupts = <2 1>;
164 reg = <0x1>; 335 reg = <0x1>;
165 }; 336 };
166 phy4: ethernet-phy@4 { 337 phy4: ethernet-phy@4 {
338 interrupt-parent = <&mpic>;
167 reg = <0x4>; 339 reg = <0x4>;
168 }; 340 };
169 tbi-phy@5 {
170 device_type = "tbi-phy";
171 reg = <0x5>;
172 };
173 }; 341 };
174 342
175 mdio@25000 { 343 mdio@25000 {
344 #address-cells = <1>;
345 #size-cells = <0>;
346 compatible = "fsl,etsec2-tbi";
347 reg = <0x25000 0x1000 0xb1030 0x4>;
176 tbi0: tbi-phy@11 { 348 tbi0: tbi-phy@11 {
177 reg = <0x11>; 349 reg = <0x11>;
178 device_type = "tbi-phy"; 350 device_type = "tbi-phy";
179 }; 351 };
180 }; 352 };
181 353
182 ethernet@b0000 { 354 enet0: ethernet@B0000 {
355 #address-cells = <1>;
356 #size-cells = <1>;
357 cell-index = <0>;
358 device_type = "network";
359 model = "eTSEC";
360 compatible = "fsl,etsec2";
361 fsl,num_rx_queues = <0x8>;
362 fsl,num_tx_queues = <0x8>;
363 local-mac-address = [ 00 00 00 00 00 00 ];
364 interrupt-parent = <&mpic>;
183 phy-handle = <&phy0>; 365 phy-handle = <&phy0>;
184 phy-connection-type = "rgmii-id"; 366 phy-connection-type = "rgmii-id";
367 queue-group@0{
368 #address-cells = <1>;
369 #size-cells = <1>;
370 reg = <0xB0000 0x1000>;
371 interrupts = <29 2 30 2 34 2>;
372 };
373 queue-group@1{
374 #address-cells = <1>;
375 #size-cells = <1>;
376 reg = <0xB4000 0x1000>;
377 interrupts = <17 2 18 2 24 2>;
378 };
185 }; 379 };
186 380
187 ethernet@b1000 { 381 enet1: ethernet@B1000 {
382 #address-cells = <1>;
383 #size-cells = <1>;
384 cell-index = <0>;
385 device_type = "network";
386 model = "eTSEC";
387 compatible = "fsl,etsec2";
388 fsl,num_rx_queues = <0x8>;
389 fsl,num_tx_queues = <0x8>;
390 local-mac-address = [ 00 00 00 00 00 00 ];
391 interrupt-parent = <&mpic>;
188 phy-handle = <&phy4>; 392 phy-handle = <&phy4>;
189 tbi-handle = <&tbi0>; 393 tbi-handle = <&tbi0>;
190 phy-connection-type = "sgmii"; 394 phy-connection-type = "sgmii";
395 queue-group@0{
396 #address-cells = <1>;
397 #size-cells = <1>;
398 reg = <0xB1000 0x1000>;
399 interrupts = <35 2 36 2 40 2>;
400 };
401 queue-group@1{
402 #address-cells = <1>;
403 #size-cells = <1>;
404 reg = <0xB5000 0x1000>;
405 interrupts = <51 2 52 2 67 2>;
406 };
191 }; 407 };
192 408
193 ethernet@b2000 { 409 enet2: ethernet@B2000 {
410 #address-cells = <1>;
411 #size-cells = <1>;
412 cell-index = <0>;
413 device_type = "network";
414 model = "eTSEC";
415 compatible = "fsl,etsec2";
416 fsl,num_rx_queues = <0x8>;
417 fsl,num_tx_queues = <0x8>;
418 local-mac-address = [ 00 00 00 00 00 00 ];
419 interrupt-parent = <&mpic>;
194 phy-handle = <&phy1>; 420 phy-handle = <&phy1>;
195 phy-connection-type = "rgmii-id"; 421 phy-connection-type = "rgmii-id";
422 queue-group@0{
423 #address-cells = <1>;
424 #size-cells = <1>;
425 reg = <0xB2000 0x1000>;
426 interrupts = <31 2 32 2 33 2>;
427 };
428 queue-group@1{
429 #address-cells = <1>;
430 #size-cells = <1>;
431 reg = <0xB6000 0x1000>;
432 interrupts = <25 2 26 2 27 2>;
433 };
434 };
435
436 sdhci@2e000 {
437 compatible = "fsl,p1021-esdhc", "fsl,esdhc";
438 reg = <0x2e000 0x1000>;
439 interrupts = <72 0x2>;
440 interrupt-parent = <&mpic>;
441 /* Filled in by U-Boot */
442 clock-frequency = <0>;
443 };
444
445 crypto@30000 {
446 compatible = "fsl,sec3.3", "fsl,sec3.1",
447 "fsl,sec3.0", "fsl,sec2.4",
448 "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
449 reg = <0x30000 0x10000>;
450 interrupts = <45 2 58 2>;
451 interrupt-parent = <&mpic>;
452 fsl,num-channels = <4>;
453 fsl,channel-fifo-len = <24>;
454 fsl,exec-units-mask = <0x97c>;
455 fsl,descriptor-types-mask = <0x3a30abf>;
456 };
457
458 mpic: pic@40000 {
459 interrupt-controller;
460 #address-cells = <0>;
461 #interrupt-cells = <2>;
462 reg = <0x40000 0x40000>;
463 compatible = "chrp,open-pic";
464 device_type = "open-pic";
465 };
466
467 msi@41600 {
468 compatible = "fsl,p1021-msi", "fsl,mpic-msi";
469 reg = <0x41600 0x80>;
470 msi-available-ranges = <0 0x100>;
471 interrupts = <
472 0xe0 0
473 0xe1 0
474 0xe2 0
475 0xe3 0
476 0xe4 0
477 0xe5 0
478 0xe6 0
479 0xe7 0>;
480 interrupt-parent = <&mpic>;
481 };
482
483 global-utilities@e0000 { //global utilities block
484 compatible = "fsl,p1021-guts";
485 reg = <0xe0000 0x1000>;
486 fsl,has-rstcr;
196 }; 487 };
197 488
198 par_io@e0100 { 489 par_io@e0100 {
@@ -208,7 +499,8 @@
208 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ 499 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
209 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ 500 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
210 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ 501 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
211 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */ 502 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9
503*/
212 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ 504 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
213 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ 505 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
214 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ 506 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
@@ -243,10 +535,31 @@
243 }; 535 };
244 536
245 pci0: pcie@ffe09000 { 537 pci0: pcie@ffe09000 {
538 compatible = "fsl,mpc8548-pcie";
539 device_type = "pci";
540 #interrupt-cells = <1>;
541 #size-cells = <2>;
542 #address-cells = <3>;
246 reg = <0 0xffe09000 0 0x1000>; 543 reg = <0 0xffe09000 0 0x1000>;
544 bus-range = <0 255>;
247 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 545 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
248 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 546 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
547 clock-frequency = <33333333>;
548 interrupt-parent = <&mpic>;
549 interrupts = <16 2>;
550 interrupt-map-mask = <0xf800 0 0 7>;
551 interrupt-map = <
552 /* IDSEL 0x0 */
553 0000 0 0 1 &mpic 4 1
554 0000 0 0 2 &mpic 5 1
555 0000 0 0 3 &mpic 6 1
556 0000 0 0 4 &mpic 7 1
557 >;
249 pcie@0 { 558 pcie@0 {
559 reg = <0x0 0x0 0x0 0x0 0x0>;
560 #size-cells = <2>;
561 #address-cells = <3>;
562 device_type = "pci";
250 ranges = <0x2000000 0x0 0xa0000000 563 ranges = <0x2000000 0x0 0xa0000000
251 0x2000000 0x0 0xa0000000 564 0x2000000 0x0 0xa0000000
252 0x0 0x20000000 565 0x0 0x20000000
@@ -258,10 +571,31 @@
258 }; 571 };
259 572
260 pci1: pcie@ffe0a000 { 573 pci1: pcie@ffe0a000 {
574 compatible = "fsl,mpc8548-pcie";
575 device_type = "pci";
576 #interrupt-cells = <1>;
577 #size-cells = <2>;
578 #address-cells = <3>;
261 reg = <0 0xffe0a000 0 0x1000>; 579 reg = <0 0xffe0a000 0 0x1000>;
580 bus-range = <0 255>;
262 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 581 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
263 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 582 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
583 clock-frequency = <33333333>;
584 interrupt-parent = <&mpic>;
585 interrupts = <16 2>;
586 interrupt-map-mask = <0xf800 0 0 7>;
587 interrupt-map = <
588 /* IDSEL 0x0 */
589 0000 0 0 1 &mpic 0 1
590 0000 0 0 2 &mpic 1 1
591 0000 0 0 3 &mpic 2 1
592 0000 0 0 4 &mpic 3 1
593 >;
264 pcie@0 { 594 pcie@0 {
595 reg = <0x0 0x0 0x0 0x0 0x0>;
596 #size-cells = <2>;
597 #address-cells = <3>;
598 device_type = "pci";
265 ranges = <0x2000000 0x0 0xc0000000 599 ranges = <0x2000000 0x0 0xc0000000
266 0x2000000 0x0 0xc0000000 600 0x2000000 0x0 0xc0000000
267 0x0 0x20000000 601 0x0 0x20000000
@@ -272,16 +606,36 @@
272 }; 606 };
273 }; 607 };
274 608
275 qe: qe@ffe80000 { 609 qe@ffe80000 {
610 #address-cells = <1>;
611 #size-cells = <1>;
612 device_type = "qe";
613 compatible = "fsl,qe";
276 ranges = <0x0 0x0 0xffe80000 0x40000>; 614 ranges = <0x0 0x0 0xffe80000 0x40000>;
277 reg = <0 0xffe80000 0 0x480>; 615 reg = <0 0xffe80000 0 0x480>;
278 brg-frequency = <0>; 616 brg-frequency = <0>;
279 bus-frequency = <0>; 617 bus-frequency = <0>;
618 fsl,qe-num-riscs = <1>;
619 fsl,qe-num-snums = <28>;
280 status = "disabled"; /* no firmware loaded */ 620 status = "disabled"; /* no firmware loaded */
281 621
622 qeic: interrupt-controller@80 {
623 interrupt-controller;
624 compatible = "fsl,qe-ic";
625 #address-cells = <0>;
626 #interrupt-cells = <1>;
627 reg = <0x80 0x80>;
628 interrupts = <63 2 60 2>; //high:47 low:44
629 interrupt-parent = <&mpic>;
630 };
631
282 enet3: ucc@2000 { 632 enet3: ucc@2000 {
283 device_type = "network"; 633 device_type = "network";
284 compatible = "ucc_geth"; 634 compatible = "ucc_geth";
635 cell-index = <1>;
636 reg = <0x2000 0x200>;
637 interrupts = <32>;
638 interrupt-parent = <&qeic>;
285 local-mac-address = [ 00 00 00 00 00 00 ]; 639 local-mac-address = [ 00 00 00 00 00 00 ];
286 rx-clock-name = "clk12"; 640 rx-clock-name = "clk12";
287 tx-clock-name = "clk9"; 641 tx-clock-name = "clk9";
@@ -291,15 +645,20 @@
291 }; 645 };
292 646
293 mdio@2120 { 647 mdio@2120 {
648 #address-cells = <1>;
649 #size-cells = <0>;
650 reg = <0x2120 0x18>;
651 compatible = "fsl,ucc-mdio";
652
294 qe_phy0: ethernet-phy@0 { 653 qe_phy0: ethernet-phy@0 {
295 interrupt-parent = <&mpic>; 654 interrupt-parent = <&mpic>;
296 interrupts = <4 1 0 0>; 655 interrupts = <4 1>;
297 reg = <0x0>; 656 reg = <0x0>;
298 device_type = "ethernet-phy"; 657 device_type = "ethernet-phy";
299 }; 658 };
300 qe_phy1: ethernet-phy@03 { 659 qe_phy1: ethernet-phy@03 {
301 interrupt-parent = <&mpic>; 660 interrupt-parent = <&mpic>;
302 interrupts = <5 1 0 0>; 661 interrupts = <5 1>;
303 reg = <0x3>; 662 reg = <0x3>;
304 device_type = "ethernet-phy"; 663 device_type = "ethernet-phy";
305 }; 664 };
@@ -312,6 +671,10 @@
312 enet4: ucc@2400 { 671 enet4: ucc@2400 {
313 device_type = "network"; 672 device_type = "network";
314 compatible = "ucc_geth"; 673 compatible = "ucc_geth";
674 cell-index = <5>;
675 reg = <0x2400 0x200>;
676 interrupts = <40>;
677 interrupt-parent = <&qeic>;
315 local-mac-address = [ 00 00 00 00 00 00 ]; 678 local-mac-address = [ 00 00 00 00 00 00 ];
316 rx-clock-name = "none"; 679 rx-clock-name = "none";
317 tx-clock-name = "clk13"; 680 tx-clock-name = "clk13";
@@ -319,7 +682,18 @@
319 phy-handle = <&qe_phy1>; 682 phy-handle = <&qe_phy1>;
320 phy-connection-type = "rmii"; 683 phy-connection-type = "rmii";
321 }; 684 };
685
686 muram@10000 {
687 #address-cells = <1>;
688 #size-cells = <1>;
689 compatible = "fsl,qe-muram", "fsl,cpm-muram";
690 ranges = <0x0 0x10000 0x6000>;
691
692 data-only@0 {
693 compatible = "fsl,qe-muram-data",
694 "fsl,cpm-muram-data";
695 reg = <0x0 0x6000>;
696 };
697 };
322 }; 698 };
323}; 699};
324
325/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
deleted file mode 100644
index c13abfbbe2e..00000000000
--- a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
+++ /dev/null
@@ -1,236 +0,0 @@
1/*
2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 };
77 };
78
79 nand@1,0 {
80 #address-cells = <1>;
81 #size-cells = <1>;
82 compatible = "fsl,p1021-fcm-nand",
83 "fsl,elbc-fcm-nand";
84 reg = <0x1 0x0 0x40000>;
85
86 partition@0 {
87 /* This location must not be altered */
88 /* 1MB for u-boot Bootloader Image */
89 reg = <0x0 0x00100000>;
90 label = "NAND U-Boot Image";
91 read-only;
92 };
93
94 partition@100000 {
95 /* 1MB for DTB Image */
96 reg = <0x00100000 0x00100000>;
97 label = "NAND DTB Image";
98 };
99
100 partition@200000 {
101 /* 4MB for Linux Kernel Image */
102 reg = <0x00200000 0x00400000>;
103 label = "NAND Linux Kernel Image";
104 };
105
106 partition@600000 {
107 /* 4MB for Compressed Root file System Image */
108 reg = <0x00600000 0x00400000>;
109 label = "NAND Compressed RFS Image";
110 };
111
112 partition@a00000 {
113 /* 7MB for JFFS2 based Root file System */
114 reg = <0x00a00000 0x00700000>;
115 label = "NAND JFFS2 Root File System";
116 };
117
118 partition@1100000 {
119 /* 15MB for User Writable Area */
120 reg = <0x01100000 0x00f00000>;
121 label = "NAND Writable User area";
122 };
123 };
124
125 L2switch@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "vitesse-7385";
129 reg = <0x2 0x0 0x20000>;
130 };
131};
132
133&soc {
134 i2c@3000 {
135 rtc@68 {
136 compatible = "pericom,pt7c4338";
137 reg = <0x68>;
138 };
139 };
140
141 spi@7000 {
142 flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "spansion,s25sl12801";
146 reg = <0>;
147 spi-max-frequency = <40000000>; /* input clock */
148
149 partition@u-boot {
150 /* 512KB for u-boot Bootloader Image */
151 reg = <0x0 0x00080000>;
152 label = "SPI Flash U-Boot Image";
153 read-only;
154 };
155
156 partition@dtb {
157 /* 512KB for DTB Image */
158 reg = <0x00080000 0x00080000>;
159 label = "SPI Flash DTB Image";
160 };
161
162 partition@kernel {
163 /* 4MB for Linux Kernel Image */
164 reg = <0x00100000 0x00400000>;
165 label = "SPI Flash Linux Kernel Image";
166 };
167
168 partition@fs {
169 /* 4MB for Compressed RFS Image */
170 reg = <0x00500000 0x00400000>;
171 label = "SPI Flash Compressed RFSImage";
172 };
173
174 partition@jffs-fs {
175 /* 7MB for JFFS2 based RFS */
176 reg = <0x00900000 0x00700000>;
177 label = "SPI Flash JFFS2 RFS";
178 };
179 };
180 };
181
182 usb@22000 {
183 phy_type = "ulpi";
184 };
185
186 mdio@24000 {
187 phy0: ethernet-phy@0 {
188 interrupt-parent = <&mpic>;
189 interrupts = <3 1 0 0>;
190 reg = <0x0>;
191 };
192
193 phy1: ethernet-phy@1 {
194 interrupt-parent = <&mpic>;
195 interrupts = <2 1 0 0>;
196 reg = <0x1>;
197 };
198
199 tbi0: tbi-phy@11 {
200 reg = <0x11>;
201 device_type = "tbi-phy";
202 };
203 };
204
205 mdio@25000 {
206 tbi1: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@26000 {
213 tbi2: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 enet0: ethernet@b0000 {
220 fixed-link = <1 1 1000 0 0>;
221 phy-connection-type = "rgmii-id";
222
223 };
224
225 enet1: ethernet@b1000 {
226 phy-handle = <&phy0>;
227 tbi-handle = <&tbi1>;
228 phy-connection-type = "sgmii";
229 };
230
231 enet2: ethernet@b2000 {
232 phy-handle = <&phy1>;
233 tbi-handle = <&tbi2>;
234 phy-connection-type = "rgmii-id";
235 };
236};
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
deleted file mode 100644
index 7cefa12b629..00000000000
--- a/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * P1021 RDB Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1021RDB";
38 compatible = "fsl,P1021RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
59 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
60 reg = <0 0xffe09000 0 0x1000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0x80000000
78 0x2000000 0x0 0x80000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86
87 qe: qe@ffe80000 {
88 ranges = <0x0 0x0 0xffe80000 0x40000>;
89 reg = <0 0xffe80000 0 0x480>;
90 brg-frequency = <0>;
91 bus-frequency = <0>;
92 };
93};
94
95/include/ "p1021rdb-pc.dtsi"
96/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
deleted file mode 100644
index 53d0c889039..00000000000
--- a/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * P1021 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1021RDB";
38 compatible = "fsl,P1021RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
59 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
60 reg = <0xf 0xffe09000 0 0x1000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xc0000000
78 0x2000000 0x0 0xc0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86
87 qe: qe@fffe80000 {
88 ranges = <0x0 0xf 0xffe80000 0x40000>;
89 reg = <0xf 0xffe80000 0 0x480>;
90 brg-frequency = <0>;
91 bus-frequency = <0>;
92 };
93};
94
95/include/ "p1021rdb-pc.dtsi"
96/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
deleted file mode 100644
index 873da350d01..00000000000
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ /dev/null
@@ -1,226 +0,0 @@
1/*
2 * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
47 read-only;
48 };
49
50 partition@3000000 {
51 reg = <0x03000000 0x00e00000>;
52 label = "diagnostic-nor";
53 read-only;
54 };
55
56 partition@3e00000 {
57 reg = <0x03e00000 0x00200000>;
58 label = "dink-nor";
59 read-only;
60 };
61
62 partition@4000000 {
63 reg = <0x04000000 0x00400000>;
64 label = "kernel-nor";
65 read-only;
66 };
67
68 partition@4400000 {
69 reg = <0x04400000 0x03b00000>;
70 label = "jffs2-nor";
71 };
72
73 partition@7f00000 {
74 reg = <0x07f00000 0x00080000>;
75 label = "dtb-nor";
76 read-only;
77 };
78
79 partition@7f80000 {
80 reg = <0x07f80000 0x00080000>;
81 label = "u-boot-nor";
82 read-only;
83 };
84 };
85
86 nand@2,0 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "fsl,elbc-fcm-nand";
90 reg = <0x2 0x0 0x40000>;
91
92 partition@0 {
93 reg = <0x0 0x02000000>;
94 label = "u-boot-nand";
95 read-only;
96 };
97
98 partition@2000000 {
99 reg = <0x02000000 0x10000000>;
100 label = "jffs2-nand";
101 };
102
103 partition@12000000 {
104 reg = <0x12000000 0x10000000>;
105 label = "ramdisk-nand";
106 read-only;
107 };
108
109 partition@22000000 {
110 reg = <0x22000000 0x04000000>;
111 label = "kernel-nand";
112 };
113
114 partition@26000000 {
115 reg = <0x26000000 0x01000000>;
116 label = "dtb-nand";
117 read-only;
118 };
119
120 partition@27000000 {
121 reg = <0x27000000 0x19000000>;
122 label = "reserved-nand";
123 };
124 };
125
126 board-control@3,0 {
127 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
128 reg = <3 0 0x30>;
129 interrupt-parent = <&mpic>;
130 /*
131 * IRQ8 is generated if the "EVENT" switch is pressed
132 * and PX_CTL[EVESEL] is set to 00.
133 */
134 interrupts = <8 0 0 0>;
135 };
136};
137
138&board_soc {
139 i2c@3100 {
140 wm8776:codec@1a {
141 compatible = "wlf,wm8776";
142 reg = <0x1a>;
143 /*
144 * clock-frequency will be set by U-Boot if
145 * the clock is enabled.
146 */
147 };
148 rtc@68 {
149 compatible = "dallas,ds1339";
150 reg = <0x68>;
151 };
152 adt7461@4c {
153 compatible = "adi,adt7461";
154 reg = <0x4c>;
155 };
156 };
157
158 spi@7000 {
159 flash@0 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 compatible = "spansion,s25sl12801";
163 reg = <0>;
164 spi-max-frequency = <40000000>; /* input clock */
165
166 partition@0 {
167 label = "u-boot-spi";
168 reg = <0x00000000 0x00100000>;
169 read-only;
170 };
171 partition@100000 {
172 label = "kernel-spi";
173 reg = <0x00100000 0x00500000>;
174 read-only;
175 };
176 partition@600000 {
177 label = "dtb-spi";
178 reg = <0x00600000 0x00100000>;
179 read-only;
180 };
181 partition@700000 {
182 label = "file system-spi";
183 reg = <0x00700000 0x00900000>;
184 };
185 };
186 };
187
188 ssi@15000 {
189 fsl,mode = "i2s-slave";
190 codec-handle = <&wm8776>;
191 fsl,ssi-asynchronous;
192 };
193
194 usb@22000 {
195 phy_type = "ulpi";
196 };
197
198 usb@23000 {
199 status = "disabled";
200 };
201
202 mdio@24000 {
203 phy0: ethernet-phy@0 {
204 interrupts = <3 1 0 0>;
205 reg = <0x1>;
206 };
207 phy1: ethernet-phy@1 {
208 interrupts = <9 1 0 0>;
209 reg = <0x2>;
210 };
211 tbi-phy@2 {
212 device_type = "tbi-phy";
213 reg = <0x2>;
214 };
215 };
216
217 ethernet@b0000 {
218 phy-handle = <&phy0>;
219 phy-connection-type = "rgmii-id";
220 };
221
222 ethernet@b1000 {
223 phy-handle = <&phy1>;
224 phy-connection-type = "rgmii-id";
225 };
226};
diff --git a/arch/powerpc/boot/dts/p1022ds_32b.dts b/arch/powerpc/boot/dts/p1022ds_32b.dts
deleted file mode 100644
index d96cae00a9e..00000000000
--- a/arch/powerpc/boot/dts/p1022ds_32b.dts
+++ /dev/null
@@ -1,103 +0,0 @@
1/*
2 * P1022 DS 32-bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1022si-pre.dtsi"
36/ {
37 model = "fsl,P1022DS";
38 compatible = "fsl,P1022DS";
39
40 memory {
41 device_type = "memory";
42 };
43
44 board_lbc: lbc: localbus@ffe05000 {
45 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
46 0x1 0x0 0x0 0xe0000000 0x08000000
47 0x2 0x0 0x0 0xff800000 0x00040000
48 0x3 0x0 0x0 0xffdf0000 0x00008000>;
49 reg = <0x0 0xffe05000 0 0x1000>;
50 };
51
52 board_soc: soc: soc@ffe00000 {
53 ranges = <0x0 0x0 0xffe00000 0x100000>;
54 };
55
56 pci0: pcie@ffe09000 {
57 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
59 reg = <0x0 0xffe09000 0 0x1000>;
60 pcie@0 {
61 ranges = <0x2000000 0x0 0xe0000000
62 0x2000000 0x0 0xe0000000
63 0x0 0x20000000
64
65 0x1000000 0x0 0x0
66 0x1000000 0x0 0x0
67 0x0 0x100000>;
68 };
69 };
70
71 pci1: pcie@ffe0a000 {
72 ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
73 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
74 reg = <0 0xffe0a000 0 0x1000>;
75 pcie@0 {
76 ranges = <0x2000000 0x0 0xe0000000
77 0x2000000 0x0 0xe0000000
78 0x0 0x20000000
79
80 0x1000000 0x0 0x0
81 0x1000000 0x0 0x0
82 0x0 0x100000>;
83 };
84 };
85
86 pci2: pcie@ffe0b000 {
87 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
88 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
89 reg = <0 0xffe0b000 0 0x1000>;
90 pcie@0 {
91 ranges = <0x2000000 0x0 0xe0000000
92 0x2000000 0x0 0xe0000000
93 0x0 0x20000000
94
95 0x1000000 0x0 0x0
96 0x1000000 0x0 0x0
97 0x0 0x100000>;
98 };
99 };
100};
101
102/include/ "fsl/p1022si-post.dtsi"
103/include/ "p1022ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds_36b.dts b/arch/powerpc/boot/dts/p1022ds_36b.dts
deleted file mode 100644
index f7aacce40bf..00000000000
--- a/arch/powerpc/boot/dts/p1022ds_36b.dts
+++ /dev/null
@@ -1,103 +0,0 @@
1/*
2 * P1022 DS 36-bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1022si-pre.dtsi"
36/ {
37 model = "fsl,P1022DS";
38 compatible = "fsl,P1022DS";
39
40 memory {
41 device_type = "memory";
42 };
43
44 board_lbc: lbc: localbus@fffe05000 {
45 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
46 0x1 0x0 0xf 0xe0000000 0x08000000
47 0x2 0x0 0xf 0xff800000 0x00040000
48 0x3 0x0 0xf 0xffdf0000 0x00008000>;
49 reg = <0xf 0xffe05000 0 0x1000>;
50 };
51
52 board_soc: soc: soc@fffe00000 {
53 ranges = <0x0 0xf 0xffe00000 0x100000>;
54 };
55
56 pci0: pcie@fffe09000 {
57 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
59 reg = <0xf 0xffe09000 0 0x1000>;
60 pcie@0 {
61 ranges = <0x2000000 0x0 0xe0000000
62 0x2000000 0x0 0xe0000000
63 0x0 0x20000000
64
65 0x1000000 0x0 0x0
66 0x1000000 0x0 0x0
67 0x0 0x100000>;
68 };
69 };
70
71 pci1: pcie@fffe0a000 {
72 ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
73 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
74 reg = <0xf 0xffe0a000 0 0x1000>;
75 pcie@0 {
76 ranges = <0x2000000 0x0 0xe0000000
77 0x2000000 0x0 0xe0000000
78 0x0 0x20000000
79
80 0x1000000 0x0 0x0
81 0x1000000 0x0 0x0
82 0x0 0x100000>;
83 };
84 };
85
86 pci2: pcie@fffe0b000 {
87 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
88 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
89 reg = <0xf 0xffe0b000 0 0x1000>;
90 pcie@0 {
91 ranges = <0x2000000 0x0 0xe0000000
92 0x2000000 0x0 0xe0000000
93 0x0 0x20000000
94
95 0x1000000 0x0 0x0
96 0x1000000 0x0 0x0
97 0x0 0x100000>;
98 };
99 };
100};
101
102/include/ "fsl/p1022si-post.dtsi"
103/include/ "p1022ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022rdk.dts b/arch/powerpc/boot/dts/p1022rdk.dts
deleted file mode 100644
index 51d82de223f..00000000000
--- a/arch/powerpc/boot/dts/p1022rdk.dts
+++ /dev/null
@@ -1,188 +0,0 @@
1/*
2 * P1022 RDK 32-bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1022si-pre.dtsi"
36/ {
37 model = "fsl,P1022RDK";
38 compatible = "fsl,P1022RDK";
39
40 memory {
41 device_type = "memory";
42 };
43
44 board_lbc: lbc: localbus@ffe05000 {
45 /* The P1022 RDK does not have any localbus devices */
46 status = "disabled";
47 };
48
49 board_soc: soc: soc@ffe00000 {
50 ranges = <0x0 0x0 0xffe00000 0x100000>;
51
52 i2c@3100 {
53 wm8960:codec@1a {
54 compatible = "wlf,wm8960";
55 reg = <0x1a>;
56 /* MCLK source is a stand-alone oscillator */
57 clock-frequency = <12288000>;
58 };
59 rtc@68 {
60 compatible = "stm,m41t62";
61 reg = <0x68>;
62 };
63 adt7461@4c{
64 compatible = "adi,adt7461";
65 reg = <0x4c>;
66 };
67 zl6100@21{
68 compatible = "isil,zl6100";
69 reg = <0x21>;
70 };
71 zl6100@24{
72 compatible = "isil,zl6100";
73 reg = <0x24>;
74 };
75 zl6100@26{
76 compatible = "isil,zl6100";
77 reg = <0x26>;
78 };
79 zl6100@29{
80 compatible = "isil,zl6100";
81 reg = <0x29>;
82 };
83 };
84
85 spi@7000 {
86 flash@0 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "spansion,m25p80";
90 reg = <0>;
91 spi-max-frequency = <1000000>;
92 partition@0 {
93 label = "full-spi-flash";
94 reg = <0x00000000 0x00100000>;
95 };
96 };
97 };
98
99 ssi@15000 {
100 fsl,mode = "i2s-slave";
101 codec-handle = <&wm8960>;
102 };
103
104 usb@22000 {
105 phy_type = "ulpi";
106 };
107
108 usb@23000 {
109 phy_type = "ulpi";
110 };
111
112 mdio@24000 {
113 phy0: ethernet-phy@0 {
114 interrupts = <3 1 0 0>;
115 reg = <0x1>;
116 };
117 phy1: ethernet-phy@1 {
118 interrupts = <9 1 0 0>;
119 reg = <0x2>;
120 };
121 };
122
123 mdio@25000 {
124 tbi0: tbi-phy@11 {
125 reg = <0x11>;
126 device_type = "tbi-phy";
127 };
128 };
129
130 ethernet@b0000 {
131 phy-handle = <&phy0>;
132 phy-connection-type = "rgmii-id";
133 };
134
135 ethernet@b1000 {
136 phy-handle = <&phy1>;
137 tbi-handle = <&tbi0>;
138 phy-connection-type = "sgmii";
139 };
140 };
141
142 pci0: pcie@ffe09000 {
143 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
144 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
145 reg = <0x0 0xffe09000 0 0x1000>;
146 pcie@0 {
147 ranges = <0x2000000 0x0 0xe0000000
148 0x2000000 0x0 0xe0000000
149 0x0 0x20000000
150
151 0x1000000 0x0 0x0
152 0x1000000 0x0 0x0
153 0x0 0x100000>;
154 };
155 };
156
157 pci1: pcie@ffe0a000 {
158 ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
159 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
160 reg = <0 0xffe0a000 0 0x1000>;
161 pcie@0 {
162 ranges = <0x2000000 0x0 0xe0000000
163 0x2000000 0x0 0xe0000000
164 0x0 0x20000000
165
166 0x1000000 0x0 0x0
167 0x1000000 0x0 0x0
168 0x0 0x100000>;
169 };
170 };
171
172 pci2: pcie@ffe0b000 {
173 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
174 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
175 reg = <0 0xffe0b000 0 0x1000>;
176 pcie@0 {
177 ranges = <0x2000000 0x0 0xe0000000
178 0x2000000 0x0 0xe0000000
179 0x0 0x20000000
180
181 0x1000000 0x0 0x0
182 0x1000000 0x0 0x0
183 0x0 0x100000>;
184 };
185 };
186};
187
188/include/ "fsl/p1022si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index beb6cb12e59..d9b776740a6 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -34,30 +34,137 @@
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */ 35 */
36 36
37/include/ "fsl/p1023si-pre.dtsi" 37/dts-v1/;
38 38
39/ { 39/ {
40 model = "fsl,P1023"; 40 model = "fsl,P1023";
41 compatible = "fsl,P1023RDS"; 41 compatible = "fsl,P1023RDS";
42 #address-cells = <2>; 42 #address-cells = <2>;
43 #size-cells = <2>; 43 #size-cells = <2>;
44 interrupt-parent = <&mpic>; 44
45 aliases {
46 serial0 = &serial0;
47 serial1 = &serial1;
48 pci0 = &pci0;
49 pci1 = &pci1;
50 pci2 = &pci2;
51
52 crypto = &crypto;
53 sec_jr0 = &sec_jr0;
54 sec_jr1 = &sec_jr1;
55 sec_jr2 = &sec_jr2;
56 sec_jr3 = &sec_jr3;
57 rtic_a = &rtic_a;
58 rtic_b = &rtic_b;
59 rtic_c = &rtic_c;
60 rtic_d = &rtic_d;
61 };
62
63 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 cpu0: PowerPC,P1023@0 {
68 device_type = "cpu";
69 reg = <0x0>;
70 next-level-cache = <&L2>;
71 };
72
73 cpu1: PowerPC,P1023@1 {
74 device_type = "cpu";
75 reg = <0x1>;
76 next-level-cache = <&L2>;
77 };
78 };
45 79
46 memory { 80 memory {
47 device_type = "memory"; 81 device_type = "memory";
48 }; 82 };
49 83
50 soc: soc@ff600000 { 84 soc@ff600000 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 device_type = "soc";
88 compatible = "fsl,p1023-immr", "simple-bus";
51 ranges = <0x0 0x0 0xff600000 0x200000>; 89 ranges = <0x0 0x0 0xff600000 0x200000>;
90 bus-frequency = <0>; // Filled out by uboot.
91
92 ecm-law@0 {
93 compatible = "fsl,ecm-law";
94 reg = <0x0 0x1000>;
95 fsl,num-laws = <12>;
96 };
97
98 ecm@1000 {
99 compatible = "fsl,p1023-ecm", "fsl,ecm";
100 reg = <0x1000 0x1000>;
101 interrupts = <16 2>;
102 interrupt-parent = <&mpic>;
103 };
104
105 memory-controller@2000 {
106 compatible = "fsl,p1023-memory-controller";
107 reg = <0x2000 0x1000>;
108 interrupt-parent = <&mpic>;
109 interrupts = <16 2>;
110 };
52 111
53 i2c@3000 { 112 i2c@3000 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <0>;
116 compatible = "fsl-i2c";
117 reg = <0x3000 0x100>;
118 interrupts = <43 2>;
119 interrupt-parent = <&mpic>;
120 dfsrr;
54 rtc@68 { 121 rtc@68 {
55 compatible = "dallas,ds1374"; 122 compatible = "dallas,ds1374";
56 reg = <0x68>; 123 reg = <0x68>;
57 }; 124 };
58 }; 125 };
59 126
127 i2c@3100 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 cell-index = <1>;
131 compatible = "fsl-i2c";
132 reg = <0x3100 0x100>;
133 interrupts = <43 2>;
134 interrupt-parent = <&mpic>;
135 dfsrr;
136 };
137
138 serial0: serial@4500 {
139 cell-index = <0>;
140 device_type = "serial";
141 compatible = "ns16550";
142 reg = <0x4500 0x100>;
143 clock-frequency = <0>;
144 interrupts = <42 2>;
145 interrupt-parent = <&mpic>;
146 };
147
148 serial1: serial@4600 {
149 cell-index = <1>;
150 device_type = "serial";
151 compatible = "ns16550";
152 reg = <0x4600 0x100>;
153 clock-frequency = <0>;
154 interrupts = <42 2>;
155 interrupt-parent = <&mpic>;
156 };
157
60 spi@7000 { 158 spi@7000 {
159 cell-index = <0>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 compatible = "fsl,p1023-espi", "fsl,mpc8536-espi";
163 reg = <0x7000 0x1000>;
164 interrupts = <59 0x2>;
165 interrupt-parent = <&mpic>;
166 fsl,espi-num-chipselects = <4>;
167
61 fsl_dataflash@0 { 168 fsl_dataflash@0 {
62 #address-cells = <1>; 169 #address-cells = <1>;
63 #size-cells = <1>; 170 #size-cells = <1>;
@@ -79,14 +186,197 @@
79 }; 186 };
80 }; 187 };
81 188
189 gpio: gpio-controller@f000 {
190 #gpio-cells = <2>;
191 compatible = "fsl,qoriq-gpio";
192 reg = <0xf000 0x100>;
193 interrupts = <47 0x2>;
194 interrupt-parent = <&mpic>;
195 gpio-controller;
196 };
197
198 L2: l2-cache-controller@20000 {
199 compatible = "fsl,p1023-l2-cache-controller";
200 reg = <0x20000 0x1000>;
201 cache-line-size = <32>; // 32 bytes
202 cache-size = <0x40000>; // L2,256K
203 interrupt-parent = <&mpic>;
204 interrupts = <16 2>;
205 };
206
207 dma@21300 {
208 #address-cells = <1>;
209 #size-cells = <1>;
210 compatible = "fsl,eloplus-dma";
211 reg = <0x21300 0x4>;
212 ranges = <0x0 0x21100 0x200>;
213 cell-index = <0>;
214 dma-channel@0 {
215 compatible = "fsl,eloplus-dma-channel";
216 reg = <0x0 0x80>;
217 cell-index = <0>;
218 interrupt-parent = <&mpic>;
219 interrupts = <20 2>;
220 };
221 dma-channel@80 {
222 compatible = "fsl,eloplus-dma-channel";
223 reg = <0x80 0x80>;
224 cell-index = <1>;
225 interrupt-parent = <&mpic>;
226 interrupts = <21 2>;
227 };
228 dma-channel@100 {
229 compatible = "fsl,eloplus-dma-channel";
230 reg = <0x100 0x80>;
231 cell-index = <2>;
232 interrupt-parent = <&mpic>;
233 interrupts = <22 2>;
234 };
235 dma-channel@180 {
236 compatible = "fsl,eloplus-dma-channel";
237 reg = <0x180 0x80>;
238 cell-index = <3>;
239 interrupt-parent = <&mpic>;
240 interrupts = <23 2>;
241 };
242 };
243
82 usb@22000 { 244 usb@22000 {
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "fsl-usb2-dr";
248 reg = <0x22000 0x1000>;
249 interrupt-parent = <&mpic>;
250 interrupts = <28 0x2>;
83 dr_mode = "host"; 251 dr_mode = "host";
84 phy_type = "ulpi"; 252 phy_type = "ulpi";
85 }; 253 };
254
255 crypto: crypto@300000 {
256 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
257 #address-cells = <1>;
258 #size-cells = <1>;
259 reg = <0x30000 0x10000>;
260 ranges = <0 0x30000 0x10000>;
261 interrupt-parent = <&mpic>;
262 interrupts = <58 2>;
263
264 sec_jr0: jr@1000 {
265 compatible = "fsl,sec-v4.2-job-ring",
266 "fsl,sec-v4.0-job-ring";
267 reg = <0x1000 0x1000>;
268 interrupts = <45 2>;
269 };
270
271 sec_jr1: jr@2000 {
272 compatible = "fsl,sec-v4.2-job-ring",
273 "fsl,sec-v4.0-job-ring";
274 reg = <0x2000 0x1000>;
275 interrupts = <45 2>;
276 };
277
278 sec_jr2: jr@3000 {
279 compatible = "fsl,sec-v4.2-job-ring",
280 "fsl,sec-v4.0-job-ring";
281 reg = <0x3000 0x1000>;
282 interrupts = <57 2>;
283 };
284
285 sec_jr3: jr@4000 {
286 compatible = "fsl,sec-v4.2-job-ring",
287 "fsl,sec-v4.0-job-ring";
288 reg = <0x4000 0x1000>;
289 interrupts = <57 2>;
290 };
291
292 rtic@6000 {
293 compatible = "fsl,sec-v4.2-rtic",
294 "fsl,sec-v4.0-rtic";
295 #address-cells = <1>;
296 #size-cells = <1>;
297 reg = <0x6000 0x100>;
298 ranges = <0x0 0x6100 0xe00>;
299
300 rtic_a: rtic-a@0 {
301 compatible = "fsl,sec-v4.2-rtic-memory",
302 "fsl,sec-v4.0-rtic-memory";
303 reg = <0x00 0x20 0x100 0x80>;
304 };
305
306 rtic_b: rtic-b@20 {
307 compatible = "fsl,sec-v4.2-rtic-memory",
308 "fsl,sec-v4.0-rtic-memory";
309 reg = <0x20 0x20 0x200 0x80>;
310 };
311
312 rtic_c: rtic-c@40 {
313 compatible = "fsl,sec-v4.2-rtic-memory",
314 "fsl,sec-v4.0-rtic-memory";
315 reg = <0x40 0x20 0x300 0x80>;
316 };
317
318 rtic_d: rtic-d@60 {
319 compatible = "fsl,sec-v4.2-rtic-memory",
320 "fsl,sec-v4.0-rtic-memory";
321 reg = <0x60 0x20 0x500 0x80>;
322 };
323 };
324 };
325
326 power@e0070{
327 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc",
328 "fsl,p1022-pmc";
329 reg = <0xe0070 0x20>;
330 etsec1_clk: soc-clk@B0{
331 fsl,pmcdr-mask = <0x00000080>;
332 };
333 etsec2_clk: soc-clk@B1{
334 fsl,pmcdr-mask = <0x00000040>;
335 };
336 etsec3_clk: soc-clk@B2{
337 fsl,pmcdr-mask = <0x00000020>;
338 };
339 };
340
341 mpic: pic@40000 {
342 interrupt-controller;
343 #address-cells = <0>;
344 #interrupt-cells = <2>;
345 reg = <0x40000 0x40000>;
346 compatible = "chrp,open-pic";
347 device_type = "open-pic";
348 };
349
350 msi@41600 {
351 compatible = "fsl,p1023-msi", "fsl,mpic-msi";
352 reg = <0x41600 0x80>;
353 msi-available-ranges = <0 0x100>;
354 interrupts = <
355 0xe0 0
356 0xe1 0
357 0xe2 0
358 0xe3 0
359 0xe4 0
360 0xe5 0
361 0xe6 0
362 0xe7 0>;
363 interrupt-parent = <&mpic>;
364 };
365
366 global-utilities@e0000 { //global utilities block
367 compatible = "fsl,p1023-guts";
368 reg = <0xe0000 0x1000>;
369 fsl,has-rstcr;
370 };
86 }; 371 };
87 372
88 lbc: localbus@ff605000 { 373 localbus@ff605000 {
374 #address-cells = <2>;
375 #size-cells = <1>;
376 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
89 reg = <0 0xff605000 0 0x1000>; 377 reg = <0 0xff605000 0 0x1000>;
378 interrupts = <19 2>;
379 interrupt-parent = <&mpic>;
90 380
91 /* NOR Flash, BCSR */ 381 /* NOR Flash, BCSR */
92 ranges = <0x0 0x0 0x0 0xee000000 0x02000000 382 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
@@ -138,18 +428,33 @@
138 }; 428 };
139 429
140 pci0: pcie@ff60a000 { 430 pci0: pcie@ff60a000 {
431 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
432 cell-index = <1>;
433 device_type = "pci";
434 #size-cells = <2>;
435 #address-cells = <3>;
141 reg = <0 0xff60a000 0 0x1000>; 436 reg = <0 0xff60a000 0 0x1000>;
437 bus-range = <0 255>;
142 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 438 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
143 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 439 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
440 clock-frequency = <33333333>;
441 interrupt-parent = <&mpic>;
442 interrupts = <16 2>;
144 pcie@0 { 443 pcie@0 {
145 /* IRQ[0:3] are pulled up on board, set to active-low */ 444 reg = <0x0 0x0 0x0 0x0 0x0>;
445 #interrupt-cells = <1>;
446 #size-cells = <2>;
447 #address-cells = <3>;
448 device_type = "pci";
449 interrupt-parent = <&mpic>;
450 interrupts = <16 2>;
146 interrupt-map-mask = <0xf800 0 0 7>; 451 interrupt-map-mask = <0xf800 0 0 7>;
147 interrupt-map = < 452 interrupt-map = <
148 /* IDSEL 0x0 */ 453 /* IDSEL 0x0 */
149 0000 0 0 1 &mpic 0 1 0 0 454 0000 0 0 1 &mpic 0 1
150 0000 0 0 2 &mpic 1 1 0 0 455 0000 0 0 2 &mpic 1 1
151 0000 0 0 3 &mpic 2 1 0 0 456 0000 0 0 3 &mpic 2 1
152 0000 0 0 4 &mpic 3 1 0 0 457 0000 0 0 4 &mpic 3 1
153 >; 458 >;
154 ranges = <0x2000000 0x0 0xc0000000 459 ranges = <0x2000000 0x0 0xc0000000
155 0x2000000 0x0 0xc0000000 460 0x2000000 0x0 0xc0000000
@@ -161,22 +466,34 @@
161 }; 466 };
162 }; 467 };
163 468
164 board_pci1: pci1: pcie@ff609000 { 469 pci1: pcie@ff609000 {
470 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
471 cell-index = <2>;
472 device_type = "pci";
473 #size-cells = <2>;
474 #address-cells = <3>;
165 reg = <0 0xff609000 0 0x1000>; 475 reg = <0 0xff609000 0 0x1000>;
476 bus-range = <0 255>;
166 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 477 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
167 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 478 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
479 clock-frequency = <33333333>;
480 interrupt-parent = <&mpic>;
481 interrupts = <16 2>;
168 pcie@0 { 482 pcie@0 {
169 /* 483 reg = <0x0 0x0 0x0 0x0 0x0>;
170 * IRQ[4:6] only for PCIe, set to active-high, 484 #interrupt-cells = <1>;
171 * IRQ[7] is pulled up on board, set to active-low 485 #size-cells = <2>;
172 */ 486 #address-cells = <3>;
487 device_type = "pci";
488 interrupt-parent = <&mpic>;
489 interrupts = <16 2>;
173 interrupt-map-mask = <0xf800 0 0 7>; 490 interrupt-map-mask = <0xf800 0 0 7>;
174 interrupt-map = < 491 interrupt-map = <
175 /* IDSEL 0x0 */ 492 /* IDSEL 0x0 */
176 0000 0 0 1 &mpic 4 2 0 0 493 0000 0 0 1 &mpic 4 1
177 0000 0 0 2 &mpic 5 2 0 0 494 0000 0 0 2 &mpic 5 1
178 0000 0 0 3 &mpic 6 2 0 0 495 0000 0 0 3 &mpic 6 1
179 0000 0 0 4 &mpic 7 1 0 0 496 0000 0 0 4 &mpic 7 1
180 >; 497 >;
181 ranges = <0x2000000 0x0 0xa0000000 498 ranges = <0x2000000 0x0 0xa0000000
182 0x2000000 0x0 0xa0000000 499 0x2000000 0x0 0xa0000000
@@ -189,21 +506,33 @@
189 }; 506 };
190 507
191 pci2: pcie@ff60b000 { 508 pci2: pcie@ff60b000 {
509 cell-index = <3>;
510 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
511 device_type = "pci";
512 #size-cells = <2>;
513 #address-cells = <3>;
192 reg = <0 0xff60b000 0 0x1000>; 514 reg = <0 0xff60b000 0 0x1000>;
515 bus-range = <0 255>;
193 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 516 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
194 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 517 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
518 clock-frequency = <33333333>;
519 interrupt-parent = <&mpic>;
520 interrupts = <16 2>;
195 pcie@0 { 521 pcie@0 {
196 /* 522 reg = <0x0 0x0 0x0 0x0 0x0>;
197 * IRQ[8:10] are pulled up on board, set to active-low 523 #interrupt-cells = <1>;
198 * IRQ[11] only for PCIe, set to active-high, 524 #size-cells = <2>;
199 */ 525 #address-cells = <3>;
526 device_type = "pci";
527 interrupt-parent = <&mpic>;
528 interrupts = <16 2>;
200 interrupt-map-mask = <0xf800 0 0 7>; 529 interrupt-map-mask = <0xf800 0 0 7>;
201 interrupt-map = < 530 interrupt-map = <
202 /* IDSEL 0x0 */ 531 /* IDSEL 0x0 */
203 0000 0 0 1 &mpic 8 1 0 0 532 0000 0 0 1 &mpic 8 1
204 0000 0 0 2 &mpic 9 1 0 0 533 0000 0 0 2 &mpic 9 1
205 0000 0 0 3 &mpic 10 1 0 0 534 0000 0 0 3 &mpic 10 1
206 0000 0 0 4 &mpic 11 2 0 0 535 0000 0 0 4 &mpic 11 1
207 >; 536 >;
208 ranges = <0x2000000 0x0 0x80000000 537 ranges = <0x2000000 0x0 0x80000000
209 0x2000000 0x0 0x80000000 538 0x2000000 0x0 0x80000000
@@ -215,5 +544,3 @@
215 }; 544 };
216 }; 545 };
217}; 546};
218
219/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
deleted file mode 100644
index b05dcb40f80..00000000000
--- a/arch/powerpc/boot/dts/p1024rdb.dtsi
+++ /dev/null
@@ -1,228 +0,0 @@
1/*
2 * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p1020-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 15MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00f00000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1900000 {
120 /* 7MB for User Writable Area */
121 reg = <0x01900000 0x00700000>;
122 label = "NAND Writable User area";
123 };
124 };
125};
126
127&soc {
128 spi@7000 {
129 flash@0 {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "spansion,m25p80";
133 reg = <0>;
134 spi-max-frequency = <40000000>;
135
136 partition@0 {
137 /* 512KB for u-boot Bootloader Image */
138 reg = <0x0 0x00080000>;
139 label = "SPI U-Boot Image";
140 read-only;
141 };
142
143 partition@80000 {
144 /* 512KB for DTB Image */
145 reg = <0x00080000 0x00080000>;
146 label = "SPI DTB Image";
147 };
148
149 partition@100000 {
150 /* 4MB for Linux Kernel Image */
151 reg = <0x00100000 0x00400000>;
152 label = "SPI Linux Kernel Image";
153 };
154
155 partition@500000 {
156 /* 4MB for Compressed RFS Image */
157 reg = <0x00500000 0x00400000>;
158 label = "SPI Compressed RFS Image";
159 };
160
161 partition@900000 {
162 /* 7MB for JFFS2 based RFS */
163 reg = <0x00900000 0x00700000>;
164 label = "SPI JFFS2 RFS";
165 };
166 };
167 };
168
169 i2c@3000 {
170 rtc@68 {
171 compatible = "dallas,ds1339";
172 reg = <0x68>;
173 };
174 };
175
176 usb@22000 {
177 phy_type = "ulpi";
178 };
179
180 usb@23000 {
181 status = "disabled";
182 };
183
184 mdio@24000 {
185 phy0: ethernet-phy@0 {
186 interrupts = <3 1 0 0>;
187 reg = <0x0>;
188 };
189 phy1: ethernet-phy@1 {
190 interrupts = <2 1 0 0>;
191 reg = <0x1>;
192 };
193 phy2: ethernet-phy@2 {
194 interrupts = <1 1 0 0>;
195 reg = <0x2>;
196 };
197 };
198
199 mdio@25000 {
200 tbi0: tbi-phy@11 {
201 reg = <0x11>;
202 device_type = "tbi-phy";
203 };
204 };
205
206 mdio@26000 {
207 tbi1: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
212
213 ethernet@b0000 {
214 phy-handle = <&phy2>;
215 phy-connection-type = "rgmii-id";
216 };
217
218 ethernet@b1000 {
219 phy-handle = <&phy0>;
220 tbi-handle = <&tbi0>;
221 phy-connection-type = "sgmii";
222 };
223
224 ethernet@b2000 {
225 phy-handle = <&phy1>;
226 phy-connection-type = "rgmii-id";
227 };
228};
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/p1024rdb_32b.dts
deleted file mode 100644
index 90e803e9ba5..00000000000
--- a/arch/powerpc/boot/dts/p1024rdb_32b.dts
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * P1024 RDB 32Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1024RDB";
38 compatible = "fsl,P1024RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0x0 0xffe05000 0 0x1000>;
46 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
47 0x1 0x0 0x0 0xff800000 0x00040000>;
48 };
49
50 soc: soc@ffe00000 {
51 ranges = <0x0 0x0 0xffe00000 0x100000>;
52 };
53
54 pci0: pcie@ffe09000 {
55 reg = <0x0 0xffe09000 0 0x1000>;
56 ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
57 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
58 pcie@0 {
59 ranges = <0x2000000 0x0 0xe0000000
60 0x2000000 0x0 0xe0000000
61 0x0 0x20000000
62
63 0x1000000 0x0 0x0
64 0x1000000 0x0 0x0
65 0x0 0x100000>;
66 };
67 };
68
69 pci1: pcie@ffe0a000 {
70 reg = <0x0 0xffe0a000 0 0x1000>;
71 ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
72 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
73 pcie@0 {
74 reg = <0x0 0x0 0x0 0x0 0x0>;
75 ranges = <0x2000000 0x0 0xe0000000
76 0x2000000 0x0 0xe0000000
77 0x0 0x20000000
78
79 0x1000000 0x0 0x0
80 0x1000000 0x0 0x0
81 0x0 0x100000>;
82 };
83 };
84};
85
86/include/ "p1024rdb.dtsi"
87/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
deleted file mode 100644
index 3656825b65a..00000000000
--- a/arch/powerpc/boot/dts/p1024rdb_36b.dts
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * P1024 RDB 36Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1020si-pre.dtsi"
36/ {
37 model = "fsl,P1024RDB";
38 compatible = "fsl,P1024RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
47 0x1 0x0 0xf 0xff800000 0x00040000>;
48 };
49
50 soc: soc@fffe00000 {
51 ranges = <0x0 0xf 0xffe00000 0x100000>;
52 };
53
54 pci0: pcie@fffe09000 {
55 reg = <0xf 0xffe09000 0 0x1000>;
56 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
57 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
58 pcie@0 {
59 ranges = <0x2000000 0x0 0xe0000000
60 0x2000000 0x0 0xe0000000
61 0x0 0x20000000
62
63 0x1000000 0x0 0x0
64 0x1000000 0x0 0x0
65 0x0 0x100000>;
66 };
67 };
68
69 pci1: pcie@fffe0a000 {
70 reg = <0xf 0xffe0a000 0 0x1000>;
71 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
72 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
73 pcie@0 {
74 reg = <0x0 0x0 0x0 0x0 0x0>;
75 ranges = <0x2000000 0x0 0xe0000000
76 0x2000000 0x0 0xe0000000
77 0x0 0x20000000
78
79 0x1000000 0x0 0x0
80 0x1000000 0x0 0x0
81 0x0 0x100000>;
82 };
83 };
84};
85
86/include/ "p1024rdb.dtsi"
87/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/p1025rdb.dtsi
deleted file mode 100644
index f5025648229..00000000000
--- a/arch/powerpc/boot/dts/p1025rdb.dtsi
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2 * P1025 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p1025-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 7MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00700000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1100000 {
120 /* 15MB for JFFS2 based Root file System */
121 reg = <0x01100000 0x00f00000>;
122 label = "NAND Writable User area";
123 };
124 };
125
126};
127
128&soc {
129 i2c@3000 {
130 rtc@68 {
131 compatible = "dallas,ds1339";
132 reg = <0x68>;
133 };
134 };
135
136 spi@7000 {
137 flash@0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "spansion,s25sl12801";
141 reg = <0>;
142 spi-max-frequency = <40000000>; /* input clock */
143
144 partition@u-boot {
145 /* 512KB for u-boot Bootloader Image */
146 reg = <0x0 0x00080000>;
147 label = "u-boot";
148 read-only;
149 };
150
151 partition@dtb {
152 /* 512KB for DTB Image */
153 reg = <0x00080000 0x00080000>;
154 label = "dtb";
155 };
156
157 partition@kernel {
158 /* 4MB for Linux Kernel Image */
159 reg = <0x00100000 0x00400000>;
160 label = "kernel";
161 };
162
163 partition@fs {
164 /* 4MB for Compressed RFS Image */
165 reg = <0x00500000 0x00400000>;
166 label = "file system";
167 };
168
169 partition@jffs-fs {
170 /* 7MB for JFFS2 based RFS */
171 reg = <0x00900000 0x00700000>;
172 label = "file system jffs2";
173 };
174 };
175 };
176
177 usb@22000 {
178 phy_type = "ulpi";
179 };
180
181 /* USB2 is shared with localbus, so it must be disabled
182 by default. We can't put 'status = "disabled";' here
183 since U-Boot doesn't clear the status property when
184 it enables USB2. OTOH, U-Boot does create a new node
185 when there isn't any. So, just comment it out.
186 usb@23000 {
187 phy_type = "ulpi";
188 };
189 */
190
191 mdio@24000 {
192 phy0: ethernet-phy@0 {
193 interrupt-parent = <&mpic>;
194 interrupts = <3 1>;
195 reg = <0x0>;
196 };
197
198 phy1: ethernet-phy@1 {
199 interrupt-parent = <&mpic>;
200 interrupts = <2 1>;
201 reg = <0x1>;
202 };
203
204 tbi0: tbi-phy@11 {
205 reg = <0x11>;
206 device_type = "tbi-phy";
207 };
208 };
209
210 mdio@25000 {
211 tbi1: tbi-phy@11 {
212 reg = <0x11>;
213 device_type = "tbi-phy";
214 };
215 };
216
217 mdio@26000 {
218 tbi2: tbi-phy@11 {
219 reg = <0x11>;
220 device_type = "tbi-phy";
221 };
222 };
223
224 enet0: ethernet@b0000 {
225 fixed-link = <1 1 1000 0 0>;
226 phy-connection-type = "rgmii-id";
227
228 };
229
230 enet1: ethernet@b1000 {
231 phy-handle = <&phy0>;
232 tbi-handle = <&tbi1>;
233 phy-connection-type = "sgmii";
234 };
235
236 enet2: ethernet@b2000 {
237 phy-handle = <&phy1>;
238 phy-connection-type = "rgmii-id";
239 };
240
241 par_io@e0100 {
242 #address-cells = <1>;
243 #size-cells = <1>;
244 reg = <0xe0100 0x60>;
245 ranges = <0x0 0xe0100 0x60>;
246 device_type = "par_io";
247 num-ports = <3>;
248 pio1: ucc_pin@01 {
249 pio-map = <
250 /* port pin dir open_drain assignment has_irq */
251 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
252 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
259 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
260 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
261 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
262 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
263 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
264 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */
265 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */
266 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */
267 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */
268 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */
269 };
270
271 pio2: ucc_pin@02 {
272 pio-map = <
273 /* port pin dir open_drain assignment has_irq */
274 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
275 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
276 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */
277 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
278 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */
279 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */
280 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */
281 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */
282 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
283 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
284 };
285
286 pio3: ucc_pin@03 {
287 pio-map = <
288 /* port pin dir open_drain assignment has_irq */
289 0x0 0x16 0x2 0x0 0x2 0x0 /* SER7_CD_B*/
290 0x0 0x12 0x2 0x0 0x2 0x0 /* SER7_CTS_B*/
291 0x0 0x13 0x1 0x0 0x2 0x0 /* SER7_RTS_B*/
292 0x0 0x14 0x2 0x0 0x2 0x0 /* SER7_RXD0*/
293 0x0 0x15 0x1 0x0 0x2 0x0>; /* SER7_TXD0*/
294 };
295
296 pio4: ucc_pin@04 {
297 pio-map = <
298 /* port pin dir open_drain assignment has_irq */
299 0x1 0x0 0x2 0x0 0x2 0x0 /* SER3_CD_B*/
300 0x0 0x1c 0x2 0x0 0x2 0x0 /* SER3_CTS_B*/
301 0x0 0x1d 0x1 0x0 0x2 0x0 /* SER3_RTS_B*/
302 0x0 0x1e 0x2 0x0 0x2 0x0 /* SER3_RXD0*/
303 0x0 0x1f 0x1 0x0 0x2 0x0>; /* SER3_TXD0*/
304 };
305 };
306};
307
308&qe {
309 serial2: ucc@2600 {
310 device_type = "serial";
311 compatible = "ucc_uart";
312 port-number = <0>;
313 rx-clock-name = "brg6";
314 tx-clock-name = "brg6";
315 pio-handle = <&pio3>;
316 };
317
318 serial3: ucc@2200 {
319 device_type = "serial";
320 compatible = "ucc_uart";
321 port-number = <1>;
322 rx-clock-name = "brg2";
323 tx-clock-name = "brg2";
324 pio-handle = <&pio4>;
325 };
326};
diff --git a/arch/powerpc/boot/dts/p1025rdb_32b.dts b/arch/powerpc/boot/dts/p1025rdb_32b.dts
deleted file mode 100644
index ac5729c14ed..00000000000
--- a/arch/powerpc/boot/dts/p1025rdb_32b.dts
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * P1025 RDB Device Tree Source (32-bit address map)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1025RDB";
38 compatible = "fsl,P1025RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes */
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000>;
50 };
51
52 soc: soc@ffe00000 {
53 ranges = <0x0 0x0 0xffe00000 0x100000>;
54 };
55
56 pci0: pcie@ffe09000 {
57 ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
59 reg = <0 0xffe09000 0 0x1000>;
60 pcie@0 {
61 ranges = <0x2000000 0x0 0xe0000000
62 0x2000000 0x0 0xe0000000
63 0x0 0x20000000
64
65 0x1000000 0x0 0x0
66 0x1000000 0x0 0x0
67 0x0 0x100000>;
68 };
69 };
70
71 pci1: pcie@ffe0a000 {
72 reg = <0 0xffe0a000 0 0x1000>;
73 ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
74 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
75 pcie@0 {
76 ranges = <0x2000000 0x0 0xe0000000
77 0x2000000 0x0 0xe0000000
78 0x0 0x20000000
79
80 0x1000000 0x0 0x0
81 0x1000000 0x0 0x0
82 0x0 0x100000>;
83 };
84 };
85
86 qe: qe@ffe80000 {
87 ranges = <0x0 0x0 0xffe80000 0x40000>;
88 reg = <0 0xffe80000 0 0x480>;
89 brg-frequency = <0>;
90 bus-frequency = <0>;
91 status = "disabled"; /* no firmware loaded */
92
93 enet3: ucc@2000 {
94 device_type = "network";
95 compatible = "ucc_geth";
96 rx-clock-name = "clk12";
97 tx-clock-name = "clk9";
98 pio-handle = <&pio1>;
99 phy-handle = <&qe_phy0>;
100 phy-connection-type = "mii";
101 };
102
103 mdio@2120 {
104 qe_phy0: ethernet-phy@0 {
105 interrupt-parent = <&mpic>;
106 interrupts = <4 1 0 0>;
107 reg = <0x6>;
108 device_type = "ethernet-phy";
109 };
110 qe_phy1: ethernet-phy@03 {
111 interrupt-parent = <&mpic>;
112 interrupts = <5 1 0 0>;
113 reg = <0x3>;
114 device_type = "ethernet-phy";
115 };
116 tbi-phy@11 {
117 reg = <0x11>;
118 device_type = "tbi-phy";
119 };
120 };
121
122 enet4: ucc@2400 {
123 device_type = "network";
124 compatible = "ucc_geth";
125 rx-clock-name = "none";
126 tx-clock-name = "clk13";
127 pio-handle = <&pio2>;
128 phy-handle = <&qe_phy1>;
129 phy-connection-type = "rmii";
130 };
131 };
132};
133
134/include/ "p1025rdb.dtsi"
135/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/p1025rdb_36b.dts
deleted file mode 100644
index 4ce4bfa0eda..00000000000
--- a/arch/powerpc/boot/dts/p1025rdb_36b.dts
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * P1025 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1025RDB";
38 compatible = "fsl,P1025RDB";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes */
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000>;
50 };
51
52 soc: soc@fffe00000 {
53 ranges = <0x0 0xf 0xffe00000 0x100000>;
54 };
55
56 pci0: pcie@fffe09000 {
57 reg = <0xf 0xffe09000 0 0x1000>;
58 ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000
59 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
60 pcie@0 {
61 ranges = <0x2000000 0x0 0xe0000000
62 0x2000000 0x0 0xe0000000
63 0x0 0x20000000
64
65 0x1000000 0x0 0x0
66 0x1000000 0x0 0x0
67 0x0 0x100000>;
68 };
69 };
70
71 pci1: pcie@fffe0a000 {
72 reg = <0xf 0xffe0a000 0 0x1000>;
73 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
74 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
75 pcie@0 {
76 ranges = <0x2000000 0x0 0xe0000000
77 0x2000000 0x0 0xe0000000
78 0x0 0x20000000
79
80 0x1000000 0x0 0x0
81 0x1000000 0x0 0x0
82 0x0 0x100000>;
83 };
84 };
85};
86
87/include/ "p1025rdb.dtsi"
88/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts
index 237310cc7e6..dae403100f2 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -9,17 +9,30 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/p2020si-pre.dtsi" 12/include/ "p2020si.dtsi"
13 13
14/ { 14/ {
15 model = "fsl,P2020DS"; 15 model = "fsl,P2020DS";
16 compatible = "fsl,P2020DS"; 16 compatible = "fsl,P2020DS";
17 17
18 aliases {
19 ethernet0 = &enet0;
20 ethernet1 = &enet1;
21 ethernet2 = &enet2;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
27 };
28
29
18 memory { 30 memory {
19 device_type = "memory"; 31 device_type = "memory";
20 }; 32 };
21 33
22 board_lbc: lbc: localbus@ffe05000 { 34 localbus@ffe05000 {
35 compatible = "fsl,elbc", "simple-bus";
23 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 36 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
24 0x1 0x0 0x0 0xe0000000 0x08000000 37 0x1 0x0 0x0 0xe0000000 0x08000000
25 0x2 0x0 0x0 0xffa00000 0x00040000 38 0x2 0x0 0x0 0xffa00000 0x00040000
@@ -27,18 +40,198 @@
27 0x4 0x0 0x0 0xffa40000 0x00040000 40 0x4 0x0 0x0 0xffa40000 0x00040000
28 0x5 0x0 0x0 0xffa80000 0x00040000 41 0x5 0x0 0x0 0xffa80000 0x00040000
29 0x6 0x0 0x0 0xffac0000 0x00040000>; 42 0x6 0x0 0x0 0xffac0000 0x00040000>;
30 reg = <0 0xffe05000 0 0x1000>; 43
44 nor@0,0 {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "cfi-flash";
48 reg = <0x0 0x0 0x8000000>;
49 bank-width = <2>;
50 device-width = <1>;
51
52 ramdisk@0 {
53 reg = <0x0 0x03000000>;
54 read-only;
55 };
56
57 diagnostic@3000000 {
58 reg = <0x03000000 0x00e00000>;
59 read-only;
60 };
61
62 dink@3e00000 {
63 reg = <0x03e00000 0x00200000>;
64 read-only;
65 };
66
67 kernel@4000000 {
68 reg = <0x04000000 0x00400000>;
69 read-only;
70 };
71
72 jffs2@4400000 {
73 reg = <0x04400000 0x03b00000>;
74 };
75
76 dtb@7f00000 {
77 reg = <0x07f00000 0x00080000>;
78 read-only;
79 };
80
81 u-boot@7f80000 {
82 reg = <0x07f80000 0x00080000>;
83 read-only;
84 };
85 };
86
87 nand@2,0 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "fsl,elbc-fcm-nand";
91 reg = <0x2 0x0 0x40000>;
92
93 u-boot@0 {
94 reg = <0x0 0x02000000>;
95 read-only;
96 };
97
98 jffs2@2000000 {
99 reg = <0x02000000 0x10000000>;
100 };
101
102 ramdisk@12000000 {
103 reg = <0x12000000 0x08000000>;
104 read-only;
105 };
106
107 kernel@1a000000 {
108 reg = <0x1a000000 0x04000000>;
109 };
110
111 dtb@1e000000 {
112 reg = <0x1e000000 0x01000000>;
113 read-only;
114 };
115
116 empty@1f000000 {
117 reg = <0x1f000000 0x21000000>;
118 };
119 };
120
121 nand@4,0 {
122 compatible = "fsl,elbc-fcm-nand";
123 reg = <0x4 0x0 0x40000>;
124 };
125
126 nand@5,0 {
127 compatible = "fsl,elbc-fcm-nand";
128 reg = <0x5 0x0 0x40000>;
129 };
130
131 nand@6,0 {
132 compatible = "fsl,elbc-fcm-nand";
133 reg = <0x6 0x0 0x40000>;
134 };
31 }; 135 };
32 136
33 board_soc: soc: soc@ffe00000 { 137 soc@ffe00000 {
34 ranges = <0x0 0x0 0xffe00000 0x100000>; 138
139 usb@22000 {
140 phy_type = "ulpi";
141 };
142
143 mdio@24520 {
144 phy0: ethernet-phy@0 {
145 interrupt-parent = <&mpic>;
146 interrupts = <3 1>;
147 reg = <0x0>;
148 };
149 phy1: ethernet-phy@1 {
150 interrupt-parent = <&mpic>;
151 interrupts = <3 1>;
152 reg = <0x1>;
153 };
154 phy2: ethernet-phy@2 {
155 interrupt-parent = <&mpic>;
156 interrupts = <3 1>;
157 reg = <0x2>;
158 };
159 tbi0: tbi-phy@11 {
160 reg = <0x11>;
161 device_type = "tbi-phy";
162 };
163
164 };
165
166 mdio@25520 {
167 tbi1: tbi-phy@11 {
168 reg = <0x11>;
169 device_type = "tbi-phy";
170 };
171 };
172
173 mdio@26520 {
174 tbi2: tbi-phy@11 {
175 reg = <0x11>;
176 device_type = "tbi-phy";
177 };
178
179 };
180
181 ptp_clock@24E00 {
182 compatible = "fsl,etsec-ptp";
183 reg = <0x24E00 0xB0>;
184 interrupts = <68 2 69 2 70 2>;
185 interrupt-parent = < &mpic >;
186 fsl,tclk-period = <5>;
187 fsl,tmr-prsc = <200>;
188 fsl,tmr-add = <0xCCCCCCCD>;
189 fsl,tmr-fiper1 = <0x3B9AC9FB>;
190 fsl,tmr-fiper2 = <0x0001869B>;
191 fsl,max-adj = <249999999>;
192 };
193
194 enet0: ethernet@24000 {
195 tbi-handle = <&tbi0>;
196 phy-handle = <&phy0>;
197 phy-connection-type = "rgmii-id";
198 };
199
200 enet1: ethernet@25000 {
201 tbi-handle = <&tbi1>;
202 phy-handle = <&phy1>;
203 phy-connection-type = "rgmii-id";
204
205 };
206
207 enet2: ethernet@26000 {
208 tbi-handle = <&tbi2>;
209 phy-handle = <&phy2>;
210 phy-connection-type = "rgmii-id";
211 };
212
213
214 msi@41600 {
215 compatible = "fsl,mpic-msi";
216 };
35 }; 217 };
36 218
37 pci2: pcie@ffe08000 { 219 pci0: pcie@ffe08000 {
38 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 220 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
39 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 221 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
40 reg = <0 0xffe08000 0 0x1000>; 222 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
223 interrupt-map = <
224 /* IDSEL 0x0 */
225 0000 0x0 0x0 0x1 &mpic 0x8 0x1
226 0000 0x0 0x0 0x2 &mpic 0x9 0x1
227 0000 0x0 0x0 0x3 &mpic 0xa 0x1
228 0000 0x0 0x0 0x4 &mpic 0xb 0x1
229 >;
41 pcie@0 { 230 pcie@0 {
231 reg = <0x0 0x0 0x0 0x0 0x0>;
232 #size-cells = <2>;
233 #address-cells = <3>;
234 device_type = "pci";
42 ranges = <0x2000000 0x0 0x80000000 235 ranges = <0x2000000 0x0 0x80000000
43 0x2000000 0x0 0x80000000 236 0x2000000 0x0 0x80000000
44 0x0 0x20000000 237 0x0 0x20000000
@@ -49,11 +242,61 @@
49 }; 242 };
50 }; 243 };
51 244
52 board_pci1: pci1: pcie@ffe09000 { 245 pci1: pcie@ffe09000 {
53 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 246 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 247 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
55 reg = <0 0xffe09000 0 0x1000>; 248 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
249 interrupt-map = <
250
251 // IDSEL 0x11 func 0 - PCI slot 1
252 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
253 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
254
255 // IDSEL 0x11 func 1 - PCI slot 1
256 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
257 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
258
259 // IDSEL 0x11 func 2 - PCI slot 1
260 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
261 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
262
263 // IDSEL 0x11 func 3 - PCI slot 1
264 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
265 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
266
267 // IDSEL 0x11 func 4 - PCI slot 1
268 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
269 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
270
271 // IDSEL 0x11 func 5 - PCI slot 1
272 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
273 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
274
275 // IDSEL 0x11 func 6 - PCI slot 1
276 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
277 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
278
279 // IDSEL 0x11 func 7 - PCI slot 1
280 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
281 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
282
283 // IDSEL 0x1d Audio
284 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
285
286 // IDSEL 0x1e Legacy
287 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
288 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
289
290 // IDSEL 0x1f IDE/SATA
291 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
292 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
293 >;
294
56 pcie@0 { 295 pcie@0 {
296 reg = <0x0 0x0 0x0 0x0 0x0>;
297 #size-cells = <2>;
298 #address-cells = <3>;
299 device_type = "pci";
57 ranges = <0x2000000 0x0 0xa0000000 300 ranges = <0x2000000 0x0 0xa0000000
58 0x2000000 0x0 0xa0000000 301 0x2000000 0x0 0xa0000000
59 0x0 0x20000000 302 0x0 0x20000000
@@ -61,14 +304,89 @@
61 0x1000000 0x0 0x0 304 0x1000000 0x0 0x0
62 0x1000000 0x0 0x0 305 0x1000000 0x0 0x0
63 0x0 0x10000>; 306 0x0 0x10000>;
307 uli1575@0 {
308 reg = <0x0 0x0 0x0 0x0 0x0>;
309 #size-cells = <2>;
310 #address-cells = <3>;
311 ranges = <0x2000000 0x0 0xa0000000
312 0x2000000 0x0 0xa0000000
313 0x0 0x20000000
314
315 0x1000000 0x0 0x0
316 0x1000000 0x0 0x0
317 0x0 0x10000>;
318 isa@1e {
319 device_type = "isa";
320 #interrupt-cells = <2>;
321 #size-cells = <1>;
322 #address-cells = <2>;
323 reg = <0xf000 0x0 0x0 0x0 0x0>;
324 ranges = <0x1 0x0 0x1000000 0x0 0x0
325 0x1000>;
326 interrupt-parent = <&i8259>;
327
328 i8259: interrupt-controller@20 {
329 reg = <0x1 0x20 0x2
330 0x1 0xa0 0x2
331 0x1 0x4d0 0x2>;
332 interrupt-controller;
333 device_type = "interrupt-controller";
334 #address-cells = <0>;
335 #interrupt-cells = <2>;
336 compatible = "chrp,iic";
337 interrupts = <4 1>;
338 interrupt-parent = <&mpic>;
339 };
340
341 i8042@60 {
342 #size-cells = <0>;
343 #address-cells = <1>;
344 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
345 interrupts = <1 3 12 3>;
346 interrupt-parent =
347 <&i8259>;
348
349 keyboard@0 {
350 reg = <0x0>;
351 compatible = "pnpPNP,303";
352 };
353
354 mouse@1 {
355 reg = <0x1>;
356 compatible = "pnpPNP,f03";
357 };
358 };
359
360 rtc@70 {
361 compatible = "pnpPNP,b00";
362 reg = <0x1 0x70 0x2>;
363 };
364
365 gpio@400 {
366 reg = <0x1 0x400 0x80>;
367 };
368 };
369 };
64 }; 370 };
371
65 }; 372 };
66 373
67 pci0: pcie@ffe0a000 { 374 pci2: pcie@ffe0a000 {
68 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 375 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
69 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 376 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
70 reg = <0 0xffe0a000 0 0x1000>; 377 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
378 interrupt-map = <
379 /* IDSEL 0x0 */
380 0000 0x0 0x0 0x1 &mpic 0x0 0x1
381 0000 0x0 0x0 0x2 &mpic 0x1 0x1
382 0000 0x0 0x0 0x3 &mpic 0x2 0x1
383 0000 0x0 0x0 0x4 &mpic 0x3 0x1
384 >;
71 pcie@0 { 385 pcie@0 {
386 reg = <0x0 0x0 0x0 0x0 0x0>;
387 #size-cells = <2>;
388 #address-cells = <3>;
389 device_type = "pci";
72 ranges = <0x2000000 0x0 0xc0000000 390 ranges = <0x2000000 0x0 0xc0000000
73 0x2000000 0x0 0xc0000000 391 0x2000000 0x0 0xc0000000
74 0x0 0x20000000 392 0x0 0x20000000
@@ -79,11 +397,3 @@
79 }; 397 };
80 }; 398 };
81}; 399};
82
83/*
84 * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
85 * for interrupt-map & interrupt-map-mask
86 */
87
88/include/ "fsl/p2020si-post.dtsi"
89/include/ "p2020ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
deleted file mode 100644
index e699cf95b06..00000000000
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ /dev/null
@@ -1,327 +0,0 @@
1/*
2 * P2020DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 ramdisk@0 {
45 reg = <0x0 0x03000000>;
46 read-only;
47 };
48
49 diagnostic@3000000 {
50 reg = <0x03000000 0x00e00000>;
51 read-only;
52 };
53
54 dink@3e00000 {
55 reg = <0x03e00000 0x00200000>;
56 read-only;
57 };
58
59 kernel@4000000 {
60 reg = <0x04000000 0x00400000>;
61 read-only;
62 };
63
64 jffs2@4400000 {
65 reg = <0x04400000 0x03b00000>;
66 };
67
68 dtb@7f00000 {
69 reg = <0x07f00000 0x00080000>;
70 read-only;
71 };
72
73 u-boot@7f80000 {
74 reg = <0x07f80000 0x00080000>;
75 read-only;
76 };
77 };
78
79 nand@2,0 {
80 #address-cells = <1>;
81 #size-cells = <1>;
82 compatible = "fsl,elbc-fcm-nand";
83 reg = <0x2 0x0 0x40000>;
84
85 u-boot@0 {
86 reg = <0x0 0x02000000>;
87 read-only;
88 };
89
90 jffs2@2000000 {
91 reg = <0x02000000 0x10000000>;
92 };
93
94 ramdisk@12000000 {
95 reg = <0x12000000 0x08000000>;
96 read-only;
97 };
98
99 kernel@1a000000 {
100 reg = <0x1a000000 0x04000000>;
101 };
102
103 dtb@1e000000 {
104 reg = <0x1e000000 0x01000000>;
105 read-only;
106 };
107
108 empty@1f000000 {
109 reg = <0x1f000000 0x21000000>;
110 };
111 };
112
113 board-control@3,0 {
114 compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
115 reg = <0x3 0x0 0x30>;
116 };
117
118 nand@4,0 {
119 compatible = "fsl,elbc-fcm-nand";
120 reg = <0x4 0x0 0x40000>;
121 };
122
123 nand@5,0 {
124 compatible = "fsl,elbc-fcm-nand";
125 reg = <0x5 0x0 0x40000>;
126 };
127
128 nand@6,0 {
129 compatible = "fsl,elbc-fcm-nand";
130 reg = <0x6 0x0 0x40000>;
131 };
132};
133
134&board_soc {
135 usb@22000 {
136 phy_type = "ulpi";
137 dr_mode = "host";
138 };
139
140 mdio@24520 {
141 phy0: ethernet-phy@0 {
142 interrupts = <3 1 0 0>;
143 reg = <0x0>;
144 };
145 phy1: ethernet-phy@1 {
146 interrupts = <3 1 0 0>;
147 reg = <0x1>;
148 };
149 phy2: ethernet-phy@2 {
150 interrupts = <3 1 0 0>;
151 reg = <0x2>;
152 };
153
154 sgmii_phy1: sgmii-phy@1 {
155 interrupts = <5 1 0 0>;
156 reg = <0x1c>;
157 };
158 sgmii_phy2: sgmii-phy@2 {
159 interrupts = <5 1 0 0>;
160 reg = <0x1d>;
161 };
162
163 tbi0: tbi-phy@11 {
164 reg = <0x11>;
165 device_type = "tbi-phy";
166 };
167
168 };
169
170 mdio@25520 {
171 tbi1: tbi-phy@11 {
172 reg = <0x11>;
173 device_type = "tbi-phy";
174 };
175 };
176
177 mdio@26520 {
178 tbi2: tbi-phy@11 {
179 reg = <0x11>;
180 device_type = "tbi-phy";
181 };
182
183 };
184
185 ptp_clock@24e00 {
186 fsl,tclk-period = <5>;
187 fsl,tmr-prsc = <200>;
188 fsl,tmr-add = <0xCCCCCCCD>;
189 fsl,tmr-fiper1 = <0x3B9AC9FB>;
190 fsl,tmr-fiper2 = <0x0001869B>;
191 fsl,max-adj = <249999999>;
192 };
193
194 enet0: ethernet@24000 {
195 tbi-handle = <&tbi0>;
196 phy-handle = <&phy0>;
197 phy-connection-type = "rgmii-id";
198 };
199
200 enet1: ethernet@25000 {
201 tbi-handle = <&tbi1>;
202 phy-handle = <&phy1>;
203 phy-connection-type = "rgmii-id";
204
205 };
206
207 enet2: ethernet@26000 {
208 tbi-handle = <&tbi2>;
209 phy-handle = <&phy2>;
210 phy-connection-type = "rgmii-id";
211 };
212};
213
214&board_pci1 {
215 pcie@0 {
216 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
217 interrupt-map = <
218
219 // IDSEL 0x11 func 0 - PCI slot 1
220 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
221 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
222
223 // IDSEL 0x11 func 1 - PCI slot 1
224 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
225 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
226
227 // IDSEL 0x11 func 2 - PCI slot 1
228 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
229 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
230
231 // IDSEL 0x11 func 3 - PCI slot 1
232 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
233 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
234
235 // IDSEL 0x11 func 4 - PCI slot 1
236 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
237 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
238
239 // IDSEL 0x11 func 5 - PCI slot 1
240 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
241 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
242
243 // IDSEL 0x11 func 6 - PCI slot 1
244 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
245 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
246
247 // IDSEL 0x11 func 7 - PCI slot 1
248 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
249 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
250
251 // IDSEL 0x1d Audio
252 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
253
254 // IDSEL 0x1e Legacy
255 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
256 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
257
258 // IDSEL 0x1f IDE/SATA
259 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
260 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
261 >;
262
263 uli1575@0 {
264 reg = <0x0 0x0 0x0 0x0 0x0>;
265 #size-cells = <2>;
266 #address-cells = <3>;
267 ranges = <0x2000000 0x0 0xa0000000
268 0x2000000 0x0 0xa0000000
269 0x0 0x20000000
270
271 0x1000000 0x0 0x0
272 0x1000000 0x0 0x0
273 0x0 0x10000>;
274 isa@1e {
275 device_type = "isa";
276 #interrupt-cells = <2>;
277 #size-cells = <1>;
278 #address-cells = <2>;
279 reg = <0xf000 0x0 0x0 0x0 0x0>;
280 ranges = <0x1 0x0 0x1000000 0x0 0x0
281 0x1000>;
282 interrupt-parent = <&i8259>;
283
284 i8259: interrupt-controller@20 {
285 reg = <0x1 0x20 0x2
286 0x1 0xa0 0x2
287 0x1 0x4d0 0x2>;
288 interrupt-controller;
289 device_type = "interrupt-controller";
290 #address-cells = <0>;
291 #interrupt-cells = <2>;
292 compatible = "chrp,iic";
293 interrupts = <4 1 0 0>;
294 interrupt-parent = <&mpic>;
295 };
296
297 i8042@60 {
298 #size-cells = <0>;
299 #address-cells = <1>;
300 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
301 interrupts = <1 3 12 3>;
302 interrupt-parent =
303 <&i8259>;
304
305 keyboard@0 {
306 reg = <0x0>;
307 compatible = "pnpPNP,303";
308 };
309
310 mouse@1 {
311 reg = <0x1>;
312 compatible = "pnpPNP,f03";
313 };
314 };
315
316 rtc@70 {
317 compatible = "pnpPNP,b00";
318 reg = <0x1 0x70 0x2>;
319 };
320
321 gpio@400 {
322 reg = <0x1 0x400 0x80>;
323 };
324 };
325 };
326 };
327};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
deleted file mode 100644
index c21d1c7d16c..00000000000
--- a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
+++ /dev/null
@@ -1,241 +0,0 @@
1/*
2 * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p2020-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 7MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00700000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1100000 {
120 /* 15MB for JFFS2 based Root file System */
121 reg = <0x01100000 0x00f00000>;
122 label = "NAND Writable User area";
123 };
124 };
125
126 L2switch@2,0 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "vitesse-7385";
130 reg = <0x2 0x0 0x20000>;
131 };
132
133 cpld@3,0 {
134 #address-cells = <1>;
135 #size-cells = <1>;
136 compatible = "cpld";
137 reg = <0x3 0x0 0x20000>;
138 read-only;
139 };
140};
141
142&soc {
143 i2c@3000 {
144 rtc@68 {
145 compatible = "pericom,pt7c4338";
146 reg = <0x68>;
147 };
148 };
149
150 spi@7000 {
151 flash@0 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "spansion,m25p80";
155 reg = <0>;
156 spi-max-frequency = <40000000>;
157
158 partition@0 {
159 /* 512KB for u-boot Bootloader Image */
160 reg = <0x0 0x00080000>;
161 label = "SPI U-Boot Image";
162 read-only;
163 };
164
165 partition@80000 {
166 /* 512KB for DTB Image */
167 reg = <0x00080000 0x00080000>;
168 label = "SPI DTB Image";
169 };
170
171 partition@100000 {
172 /* 4MB for Linux Kernel Image */
173 reg = <0x00100000 0x00400000>;
174 label = "SPI Linux Kernel Image";
175 };
176
177 partition@500000 {
178 /* 4MB for Compressed RFS Image */
179 reg = <0x00500000 0x00400000>;
180 label = "SPI Compressed RFS Image";
181 };
182
183 partition@900000 {
184 /* 7MB for JFFS2 based RFS */
185 reg = <0x00900000 0x00700000>;
186 label = "SPI JFFS2 RFS";
187 };
188 };
189 };
190
191 usb@22000 {
192 phy_type = "ulpi";
193 };
194
195 mdio@24520 {
196 phy0: ethernet-phy@0 {
197 interrupts = <3 1 0 0>;
198 reg = <0x0>;
199 };
200 phy1: ethernet-phy@1 {
201 interrupts = <2 1 0 0>;
202 reg = <0x1>;
203 };
204 };
205
206 mdio@25520 {
207 tbi0: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
212
213 mdio@26520 {
214 status = "disabled";
215 };
216
217 ptp_clock@24e00 {
218 fsl,tclk-period = <5>;
219 fsl,tmr-prsc = <200>;
220 fsl,tmr-add = <0xCCCCCCCD>;
221 fsl,tmr-fiper1 = <0x3B9AC9FB>;
222 fsl,tmr-fiper2 = <0x0001869B>;
223 fsl,max-adj = <249999999>;
224 };
225
226 enet0: ethernet@24000 {
227 fixed-link = <1 1 1000 0 0>;
228 phy-connection-type = "rgmii-id";
229 };
230
231 enet1: ethernet@25000 {
232 tbi-handle = <&tbi0>;
233 phy-handle = <&phy0>;
234 phy-connection-type = "sgmii";
235 };
236
237 enet2: ethernet@26000 {
238 phy-handle = <&phy1>;
239 phy-connection-type = "rgmii-id";
240 };
241};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
deleted file mode 100644
index 57573bd52ca..00000000000
--- a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p2020si-pre.dtsi"
36
37/ {
38 model = "fsl,P2020RDB";
39 compatible = "fsl,P2020RDB-PC";
40
41 memory {
42 device_type = "memory";
43 };
44
45 lbc: localbus@ffe05000 {
46 reg = <0 0xffe05000 0 0x1000>;
47
48 /* NOR and NAND Flashes */
49 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
50 0x1 0x0 0x0 0xff800000 0x00040000
51 0x2 0x0 0x0 0xffb00000 0x00020000
52 0x3 0x0 0x0 0xffa00000 0x00020000>;
53 };
54
55 soc: soc@ffe00000 {
56 ranges = <0x0 0x0 0xffe00000 0x100000>;
57 };
58
59 pci2: pcie@ffe08000 {
60 reg = <0 0xffe08000 0 0x1000>;
61 status = "disabled";
62 };
63
64 pci1: pcie@ffe09000 {
65 reg = <0 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
68 pcie@0 {
69 ranges = <0x2000000 0x0 0xe0000000
70 0x2000000 0x0 0xe0000000
71 0x0 0x20000000
72
73 0x1000000 0x0 0x0
74 0x1000000 0x0 0x0
75 0x0 0x100000>;
76 };
77 };
78
79 pci0: pcie@ffe0a000 {
80 reg = <0 0xffe0a000 0 0x1000>;
81 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
82 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
83 pcie@0 {
84 ranges = <0x2000000 0x0 0xe0000000
85 0x2000000 0x0 0xe0000000
86 0x0 0x20000000
87
88 0x1000000 0x0 0x0
89 0x1000000 0x0 0x0
90 0x0 0x100000>;
91 };
92 };
93};
94
95/include/ "p2020rdb-pc.dtsi"
96/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
deleted file mode 100644
index 470247ea68b..00000000000
--- a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p2020si-pre.dtsi"
36
37/ {
38 model = "fsl,P2020RDB";
39 compatible = "fsl,P2020RDB-PC";
40
41 memory {
42 device_type = "memory";
43 };
44
45 lbc: localbus@fffe05000 {
46 reg = <0xf 0xffe05000 0 0x1000>;
47
48 /* NOR and NAND Flashes */
49 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
50 0x1 0x0 0xf 0xff800000 0x00040000
51 0x2 0x0 0xf 0xffb00000 0x00020000
52 0x3 0x0 0xf 0xffa00000 0x00020000>;
53 };
54
55 soc: soc@fffe00000 {
56 ranges = <0x0 0xf 0xffe00000 0x100000>;
57 };
58
59 pci2: pcie@fffe08000 {
60 reg = <0xf 0xffe08000 0 0x1000>;
61 status = "disabled";
62 };
63
64 pci1: pcie@fffe09000 {
65 reg = <0xf 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
68 pcie@0 {
69 ranges = <0x2000000 0x0 0xe0000000
70 0x2000000 0x0 0xe0000000
71 0x0 0x20000000
72
73 0x1000000 0x0 0x0
74 0x1000000 0x0 0x0
75 0x0 0x100000>;
76 };
77 };
78
79 pci0: pcie@fffe0a000 {
80 reg = <0xf 0xffe0a000 0 0x1000>;
81 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
82 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
83 pcie@0 {
84 ranges = <0x2000000 0x0 0xe0000000
85 0x2000000 0x0 0xe0000000
86 0x0 0x20000000
87
88 0x1000000 0x0 0x0
89 0x1000000 0x0 0x0
90 0x0 0x100000>;
91 };
92 };
93};
94
95/include/ "p2020rdb-pc.dtsi"
96/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 4d52bce1d5b..1d7a05f3021 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P2020 RDB Device Tree Source 2 * P2020 RDB Device Tree Source
3 * 3 *
4 * Copyright 2009-2012 Freescale Semiconductor Inc. 4 * Copyright 2009-2011 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,7 +9,7 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/include/ "fsl/p2020si-pre.dtsi" 12/include/ "p2020si.dtsi"
13 13
14/ { 14/ {
15 model = "fsl,P2020RDB"; 15 model = "fsl,P2020RDB";
@@ -29,8 +29,7 @@
29 device_type = "memory"; 29 device_type = "memory";
30 }; 30 };
31 31
32 lbc: localbus@ffe05000 { 32 localbus@ffe05000 {
33 reg = <0 0xffe05000 0 0x1000>;
34 33
35 /* NOR and NAND Flashes */ 34 /* NOR and NAND Flashes */
36 ranges = <0x0 0x0 0x0 0xef000000 0x01000000 35 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
@@ -141,9 +140,7 @@
141 140
142 }; 141 };
143 142
144 soc: soc@ffe00000 { 143 soc@ffe00000 {
145 ranges = <0x0 0x0 0xffe00000 0x100000>;
146
147 i2c@3000 { 144 i2c@3000 {
148 rtc@68 { 145 rtc@68 {
149 compatible = "dallas,ds1339"; 146 compatible = "dallas,ds1339";
@@ -151,13 +148,17 @@
151 }; 148 };
152 }; 149 };
153 150
154 spi@7000 { 151 spi@7000 {
155 flash@0 { 152
153 fsl_m25p80@0 {
156 #address-cells = <1>; 154 #address-cells = <1>;
157 #size-cells = <1>; 155 #size-cells = <1>;
158 compatible = "spansion,s25sl12801"; 156 compatible = "fsl,espi-flash";
159 reg = <0>; 157 reg = <0>;
160 spi-max-frequency = <40000000>; 158 linux,modalias = "fsl_m25p80";
159 modal = "s25sl128b";
160 spi-max-frequency = <50000000>;
161 mode = <0>;
161 162
162 partition@0 { 163 partition@0 {
163 /* 512KB for u-boot Bootloader Image */ 164 /* 512KB for u-boot Bootloader Image */
@@ -197,22 +198,19 @@
197 198
198 usb@22000 { 199 usb@22000 {
199 phy_type = "ulpi"; 200 phy_type = "ulpi";
200 dr_mode = "host";
201 }; 201 };
202 202
203 mdio@24520 { 203 mdio@24520 {
204 phy0: ethernet-phy@0 { 204 phy0: ethernet-phy@0 {
205 interrupts = <3 1 0 0>; 205 interrupt-parent = <&mpic>;
206 interrupts = <3 1>;
206 reg = <0x0>; 207 reg = <0x0>;
207 }; 208 };
208 phy1: ethernet-phy@1 { 209 phy1: ethernet-phy@1 {
209 interrupts = <3 1 0 0>; 210 interrupt-parent = <&mpic>;
211 interrupts = <3 1>;
210 reg = <0x1>; 212 reg = <0x1>;
211 }; 213 };
212 tbi-phy@2 {
213 device_type = "tbi-phy";
214 reg = <0x2>;
215 };
216 }; 214 };
217 215
218 mdio@25520 { 216 mdio@25520 {
@@ -226,7 +224,11 @@
226 status = "disabled"; 224 status = "disabled";
227 }; 225 };
228 226
229 ptp_clock@24e00 { 227 ptp_clock@24E00 {
228 compatible = "fsl,etsec-ptp";
229 reg = <0x24E00 0xB0>;
230 interrupts = <68 2 69 2 70 2>;
231 interrupt-parent = < &mpic >;
230 fsl,tclk-period = <5>; 232 fsl,tclk-period = <5>;
231 fsl,tmr-prsc = <200>; 233 fsl,tmr-prsc = <200>;
232 fsl,tmr-add = <0xCCCCCCCD>; 234 fsl,tmr-add = <0xCCCCCCCD>;
@@ -250,18 +252,29 @@
250 phy-handle = <&phy1>; 252 phy-handle = <&phy1>;
251 phy-connection-type = "rgmii-id"; 253 phy-connection-type = "rgmii-id";
252 }; 254 };
255
253 }; 256 };
254 257
255 pci0: pcie@ffe08000 { 258 pci0: pcie@ffe08000 {
256 reg = <0 0xffe08000 0 0x1000>;
257 status = "disabled"; 259 status = "disabled";
258 }; 260 };
259 261
260 pci1: pcie@ffe09000 { 262 pci1: pcie@ffe09000 {
261 reg = <0 0xffe09000 0 0x1000>;
262 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 263 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
263 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 264 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
264 pcie@0 { 265 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
266 interrupt-map = <
267 /* IDSEL 0x0 */
268 0000 0x0 0x0 0x1 &mpic 0x4 0x1
269 0000 0x0 0x0 0x2 &mpic 0x5 0x1
270 0000 0x0 0x0 0x3 &mpic 0x6 0x1
271 0000 0x0 0x0 0x4 &mpic 0x7 0x1
272 >;
273 pcie@0 {
274 reg = <0x0 0x0 0x0 0x0 0x0>;
275 #size-cells = <2>;
276 #address-cells = <3>;
277 device_type = "pci";
265 ranges = <0x2000000 0x0 0xa0000000 278 ranges = <0x2000000 0x0 0xa0000000
266 0x2000000 0x0 0xa0000000 279 0x2000000 0x0 0xa0000000
267 0x0 0x20000000 280 0x0 0x20000000
@@ -273,10 +286,21 @@
273 }; 286 };
274 287
275 pci2: pcie@ffe0a000 { 288 pci2: pcie@ffe0a000 {
276 reg = <0 0xffe0a000 0 0x1000>;
277 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 289 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
278 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 290 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
291 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
292 interrupt-map = <
293 /* IDSEL 0x0 */
294 0000 0x0 0x0 0x1 &mpic 0x0 0x1
295 0000 0x0 0x0 0x2 &mpic 0x1 0x1
296 0000 0x0 0x0 0x3 &mpic 0x2 0x1
297 0000 0x0 0x0 0x4 &mpic 0x3 0x1
298 >;
279 pcie@0 { 299 pcie@0 {
300 reg = <0x0 0x0 0x0 0x0 0x0>;
301 #size-cells = <2>;
302 #address-cells = <3>;
303 device_type = "pci";
280 ranges = <0x2000000 0x0 0x80000000 304 ranges = <0x2000000 0x0 0x80000000
281 0x2000000 0x0 0x80000000 305 0x2000000 0x0 0x80000000
282 0x0 0x20000000 306 0x0 0x20000000
@@ -287,5 +311,3 @@
287 }; 311 };
288 }; 312 };
289}; 313};
290
291/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
deleted file mode 100644
index d97ad74c727..00000000000
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * P2041RDB Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p2041si-pre.dtsi"
36
37/ {
38 model = "fsl,P2041RDB";
39 compatible = "fsl,P2041RDB";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 memory {
45 device_type = "memory";
46 };
47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 {
56 flash@0 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "spansion,s25sl12801";
60 reg = <0>;
61 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot {
63 label = "u-boot";
64 reg = <0x00000000 0x00100000>;
65 read-only;
66 };
67 partition@kernel {
68 label = "kernel";
69 reg = <0x00100000 0x00500000>;
70 read-only;
71 };
72 partition@dtb {
73 label = "dtb";
74 reg = <0x00600000 0x00100000>;
75 read-only;
76 };
77 partition@fs {
78 label = "file system";
79 reg = <0x00700000 0x00900000>;
80 };
81 };
82 };
83
84 i2c@118000 {
85 lm75b@48 {
86 compatible = "nxp,lm75a";
87 reg = <0x48>;
88 };
89 eeprom@50 {
90 compatible = "at24,24c256";
91 reg = <0x50>;
92 };
93 rtc@68 {
94 compatible = "pericom,pt7c4338";
95 reg = <0x68>;
96 };
97 adt7461@4c {
98 compatible = "adi,adt7461";
99 reg = <0x4c>;
100 };
101 };
102
103 i2c@118100 {
104 eeprom@50 {
105 compatible = "at24,24c256";
106 reg = <0x50>;
107 };
108 };
109
110 usb1: usb@211000 {
111 dr_mode = "host";
112 };
113 };
114
115 rio: rapidio@ffe0c0000 {
116 reg = <0xf 0xfe0c0000 0 0x11000>;
117
118 port1 {
119 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
120 };
121 port2 {
122 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
123 };
124 };
125
126 lbc: localbus@ffe124000 {
127 reg = <0xf 0xfe124000 0 0x1000>;
128 ranges = <0 0 0xf 0xe8000000 0x08000000
129 1 0 0xf 0xffa00000 0x00040000>;
130
131 flash@0,0 {
132 compatible = "cfi-flash";
133 reg = <0 0 0x08000000>;
134 bank-width = <2>;
135 device-width = <2>;
136 };
137
138 nand@1,0 {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 compatible = "fsl,elbc-fcm-nand";
142 reg = <0x1 0x0 0x40000>;
143
144 partition@0 {
145 label = "NAND U-Boot Image";
146 reg = <0x0 0x02000000>;
147 read-only;
148 };
149
150 partition@2000000 {
151 label = "NAND Root File System";
152 reg = <0x02000000 0x10000000>;
153 };
154
155 partition@12000000 {
156 label = "NAND Compressed RFS Image";
157 reg = <0x12000000 0x08000000>;
158 };
159
160 partition@1a000000 {
161 label = "NAND Linux Kernel Image";
162 reg = <0x1a000000 0x04000000>;
163 };
164
165 partition@1e000000 {
166 label = "NAND DTB Image";
167 reg = <0x1e000000 0x01000000>;
168 };
169
170 partition@1f000000 {
171 label = "NAND Writable User area";
172 reg = <0x1f000000 0x01000000>;
173 };
174 };
175 };
176
177 pci0: pcie@ffe200000 {
178 reg = <0xf 0xfe200000 0 0x1000>;
179 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
180 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
181 pcie@0 {
182 ranges = <0x02000000 0 0xe0000000
183 0x02000000 0 0xe0000000
184 0 0x20000000
185
186 0x01000000 0 0x00000000
187 0x01000000 0 0x00000000
188 0 0x00010000>;
189 };
190 };
191
192 pci1: pcie@ffe201000 {
193 reg = <0xf 0xfe201000 0 0x1000>;
194 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
195 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
196 pcie@0 {
197 ranges = <0x02000000 0 0xe0000000
198 0x02000000 0 0xe0000000
199 0 0x20000000
200
201 0x01000000 0 0x00000000
202 0x01000000 0 0x00000000
203 0 0x00010000>;
204 };
205 };
206
207 pci2: pcie@ffe202000 {
208 reg = <0xf 0xfe202000 0 0x1000>;
209 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
210 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
211 pcie@0 {
212 ranges = <0x02000000 0 0xe0000000
213 0x02000000 0 0xe0000000
214 0 0x20000000
215
216 0x01000000 0 0x00000000
217 0x01000000 0 0x00000000
218 0 0x00010000>;
219 };
220 };
221};
222
223/include/ "fsl/p2041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 2fed3bc0b99..69cae674f39 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -32,7 +32,7 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35/include/ "fsl/p3041si-pre.dtsi" 35/include/ "p3041si.dtsi"
36 36
37/ { 37/ {
38 model = "fsl,P3041DS"; 38 model = "fsl,P3041DS";
@@ -45,20 +45,14 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 { 48 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 { 49 spi@110000 {
56 flash@0 { 50 flash@0 {
57 #address-cells = <1>; 51 #address-cells = <1>;
58 #size-cells = <1>; 52 #size-cells = <1>;
59 compatible = "spansion,s25sl12801"; 53 compatible = "spansion,s25sl12801";
60 reg = <0>; 54 reg = <0>;
61 spi-max-frequency = <35000000>; /* input clock */ 55 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot { 56 partition@u-boot {
63 label = "u-boot"; 57 label = "u-boot";
64 reg = <0x00000000 0x00100000>; 58 reg = <0x00000000 0x00100000>;
@@ -98,25 +92,10 @@
98 reg = <0x68>; 92 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 93 interrupts = <0x1 0x1 0 0>;
100 }; 94 };
101 adt7461@4c {
102 compatible = "adi,adt7461";
103 reg = <0x4c>;
104 };
105 }; 95 };
106 }; 96 };
107 97
108 rio: rapidio@ffe0c0000 { 98 localbus@ffe124000 {
109 reg = <0xf 0xfe0c0000 0 0x11000>;
110
111 port1 {
112 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
113 };
114 port2 {
115 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
116 };
117 };
118
119 lbc: localbus@ffe124000 {
120 reg = <0xf 0xfe124000 0 0x1000>; 99 reg = <0xf 0xfe124000 0 0x1000>;
121 ranges = <0 0 0xf 0xe8000000 0x08000000 100 ranges = <0 0 0xf 0xe8000000 0x08000000
122 2 0 0xf 0xffa00000 0x00040000 101 2 0 0xf 0xffa00000 0x00040000
@@ -168,8 +147,8 @@
168 }; 147 };
169 148
170 board-control@3,0 { 149 board-control@3,0 {
171 compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; 150 compatible = "fsl,p3041ds-pixis";
172 reg = <3 0 0x30>; 151 reg = <3 0 0x20>;
173 }; 152 };
174 }; 153 };
175 154
@@ -233,5 +212,3 @@
233 }; 212 };
234 }; 213 };
235}; 214};
236
237/include/ "fsl/p3041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 1cf6148b8b0..eb11098bb68 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -32,7 +32,7 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35/include/ "fsl/p4080si-pre.dtsi" 35/include/ "p4080si.dtsi"
36 36
37/ { 37/ {
38 model = "fsl,P4080DS"; 38 model = "fsl,P4080DS";
@@ -45,14 +45,7 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 { 48 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55
56 spi@110000 { 49 spi@110000 {
57 flash@0 { 50 flash@0 {
58 #address-cells = <1>; 51 #address-cells = <1>;
@@ -96,10 +89,6 @@
96 reg = <0x68>; 89 reg = <0x68>;
97 interrupts = <0x1 0x1 0 0>; 90 interrupts = <0x1 0x1 0 0>;
98 }; 91 };
99 adt7461@4c {
100 compatible = "adi,adt7461";
101 reg = <0x4c>;
102 };
103 }; 92 };
104 93
105 usb0: usb@210000 { 94 usb0: usb@210000 {
@@ -112,21 +101,14 @@
112 }; 101 };
113 }; 102 };
114 103
115 rio: rapidio@ffe0c0000 { 104 rapidio0: rapidio@ffe0c0000 {
116 reg = <0xf 0xfe0c0000 0 0x11000>; 105 reg = <0xf 0xfe0c0000 0 0x20000>;
117 106 ranges = <0 0 0xc 0x20000000 0 0x01000000>;
118 port1 {
119 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
120 };
121 port2 {
122 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
123 };
124 }; 107 };
125 108
126 lbc: localbus@ffe124000 { 109 localbus@ffe124000 {
127 reg = <0xf 0xfe124000 0 0x1000>; 110 reg = <0xf 0xfe124000 0 0x1000>;
128 ranges = <0 0 0xf 0xe8000000 0x08000000 111 ranges = <0 0 0xf 0xe8000000 0x08000000>;
129 3 0 0xf 0xffdf0000 0x00008000>;
130 112
131 flash@0,0 { 113 flash@0,0 {
132 compatible = "cfi-flash"; 114 compatible = "cfi-flash";
@@ -134,11 +116,6 @@
134 bank-width = <2>; 116 bank-width = <2>;
135 device-width = <2>; 117 device-width = <2>;
136 }; 118 };
137
138 board-control@3,0 {
139 compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis";
140 reg = <3 0 0x30>;
141 };
142 }; 119 };
143 120
144 pci0: pcie@ffe200000 { 121 pci0: pcie@ffe200000 {
@@ -187,5 +164,3 @@
187 }; 164 };
188 165
189}; 166};
190
191/include/ "fsl/p4080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 2869fea717d..8366e2fd2fb 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -32,7 +32,7 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35/include/ "fsl/p5020si-pre.dtsi" 35/include/ "p5020si.dtsi"
36 36
37/ { 37/ {
38 model = "fsl,P5020DS"; 38 model = "fsl,P5020DS";
@@ -45,13 +45,7 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 { 48 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 { 49 spi@110000 {
56 flash@0 { 50 flash@0 {
57 #address-cells = <1>; 51 #address-cells = <1>;
@@ -98,25 +92,10 @@
98 reg = <0x68>; 92 reg = <0x68>;
99 interrupts = <0x1 0x1 0 0>; 93 interrupts = <0x1 0x1 0 0>;
100 }; 94 };
101 adt7461@4c {
102 compatible = "adi,adt7461";
103 reg = <0x4c>;
104 };
105 };
106 };
107
108 rio: rapidio@ffe0c0000 {
109 reg = <0xf 0xfe0c0000 0 0x11000>;
110
111 port1 {
112 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
113 };
114 port2 {
115 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
116 }; 95 };
117 }; 96 };
118 97
119 lbc: localbus@ffe124000 { 98 localbus@ffe124000 {
120 reg = <0xf 0xfe124000 0 0x1000>; 99 reg = <0xf 0xfe124000 0 0x1000>;
121 ranges = <0 0 0xf 0xe8000000 0x08000000 100 ranges = <0 0 0xf 0xe8000000 0x08000000
122 2 0 0xf 0xffa00000 0x00040000 101 2 0 0xf 0xffa00000 0x00040000
@@ -168,8 +147,8 @@
168 }; 147 };
169 148
170 board-control@3,0 { 149 board-control@3,0 {
171 compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; 150 compatible = "fsl,p5020ds-pixis";
172 reg = <3 0 0x30>; 151 reg = <3 0 0x20>;
173 }; 152 };
174 }; 153 };
175 154
@@ -177,6 +156,7 @@
177 reg = <0xf 0xfe200000 0 0x1000>; 156 reg = <0xf 0xfe200000 0 0x1000>;
178 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 157 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
179 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 158 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
159
180 pcie@0 { 160 pcie@0 {
181 ranges = <0x02000000 0 0xe0000000 161 ranges = <0x02000000 0 0xe0000000
182 0x02000000 0 0xe0000000 162 0x02000000 0 0xe0000000
@@ -233,5 +213,3 @@
233 }; 213 };
234 }; 214 };
235}; 215};
236
237/include/ "fsl/p5020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
deleted file mode 100644
index 860b5ccf76c..00000000000
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ /dev/null
@@ -1,207 +0,0 @@
1/*
2 * P5040DS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35/include/ "fsl/p5040si-pre.dtsi"
36
37/ {
38 model = "fsl,P5040DS";
39 compatible = "fsl,P5040DS";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 memory {
45 device_type = "memory";
46 };
47
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 };
51
52 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
55 spi@110000 {
56 flash@0 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "spansion,s25sl12801";
60 reg = <0>;
61 spi-max-frequency = <40000000>; /* input clock */
62 partition@u-boot {
63 label = "u-boot";
64 reg = <0x00000000 0x00100000>;
65 };
66 partition@kernel {
67 label = "kernel";
68 reg = <0x00100000 0x00500000>;
69 };
70 partition@dtb {
71 label = "dtb";
72 reg = <0x00600000 0x00100000>;
73 };
74 partition@fs {
75 label = "file system";
76 reg = <0x00700000 0x00900000>;
77 };
78 };
79 };
80
81 i2c@118100 {
82 eeprom@51 {
83 compatible = "at24,24c256";
84 reg = <0x51>;
85 };
86 eeprom@52 {
87 compatible = "at24,24c256";
88 reg = <0x52>;
89 };
90 };
91
92 i2c@119100 {
93 rtc@68 {
94 compatible = "dallas,ds3232";
95 reg = <0x68>;
96 interrupts = <0x1 0x1 0 0>;
97 };
98 adt7461@4c {
99 compatible = "adi,adt7461";
100 reg = <0x4c>;
101 };
102 };
103 };
104
105 lbc: localbus@ffe124000 {
106 reg = <0xf 0xfe124000 0 0x1000>;
107 ranges = <0 0 0xf 0xe8000000 0x08000000
108 2 0 0xf 0xffa00000 0x00040000
109 3 0 0xf 0xffdf0000 0x00008000>;
110
111 flash@0,0 {
112 compatible = "cfi-flash";
113 reg = <0 0 0x08000000>;
114 bank-width = <2>;
115 device-width = <2>;
116 };
117
118 nand@2,0 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "fsl,elbc-fcm-nand";
122 reg = <0x2 0x0 0x40000>;
123
124 partition@0 {
125 label = "NAND U-Boot Image";
126 reg = <0x0 0x02000000>;
127 };
128
129 partition@2000000 {
130 label = "NAND Root File System";
131 reg = <0x02000000 0x10000000>;
132 };
133
134 partition@12000000 {
135 label = "NAND Compressed RFS Image";
136 reg = <0x12000000 0x08000000>;
137 };
138
139 partition@1a000000 {
140 label = "NAND Linux Kernel Image";
141 reg = <0x1a000000 0x04000000>;
142 };
143
144 partition@1e000000 {
145 label = "NAND DTB Image";
146 reg = <0x1e000000 0x01000000>;
147 };
148
149 partition@1f000000 {
150 label = "NAND Writable User area";
151 reg = <0x1f000000 0x01000000>;
152 };
153 };
154
155 board-control@3,0 {
156 compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
157 reg = <3 0 0x40>;
158 };
159 };
160
161 pci0: pcie@ffe200000 {
162 reg = <0xf 0xfe200000 0 0x1000>;
163 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
164 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
165 pcie@0 {
166 ranges = <0x02000000 0 0xe0000000
167 0x02000000 0 0xe0000000
168 0 0x20000000
169
170 0x01000000 0 0x00000000
171 0x01000000 0 0x00000000
172 0 0x00010000>;
173 };
174 };
175
176 pci1: pcie@ffe201000 {
177 reg = <0xf 0xfe201000 0 0x1000>;
178 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
179 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
180 pcie@0 {
181 ranges = <0x02000000 0 0xe0000000
182 0x02000000 0 0xe0000000
183 0 0x20000000
184
185 0x01000000 0 0x00000000
186 0x01000000 0 0x00000000
187 0 0x00010000>;
188 };
189 };
190
191 pci2: pcie@ffe202000 {
192 reg = <0xf 0xfe202000 0 0x1000>;
193 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
194 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
195 pcie@0 {
196 ranges = <0x02000000 0 0xe0000000
197 0x02000000 0 0xe0000000
198 0 0x20000000
199
200 0x01000000 0 0x00000000
201 0x01000000 0 0x00000000
202 0 0x00010000>;
203 };
204 };
205};
206
207/include/ "fsl/p5040si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 96512c05803..9e354997eb7 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -59,7 +59,7 @@
59 #gpio-cells = <2>; 59 #gpio-cells = <2>;
60 }; 60 };
61 61
62 audioplatform: psc@2000 { /* PSC1 in ac97 mode */ 62 psc@2000 { /* PSC1 in ac97 mode */
63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; 63 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64 cell-index = <0>; 64 cell-index = <0>;
65 }; 65 };
@@ -134,9 +134,4 @@
134 localbus { 134 localbus {
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137
138 sound {
139 compatible = "phytec,pcm030-audio-fabric";
140 asoc-platform = <&audioplatform>;
141 };
142}; 137};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index b1e45a8537a..0dc90f9bd81 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -222,7 +222,7 @@
222 serial0: serial@4500 { 222 serial0: serial@4500 {
223 cell-index = <0>; 223 cell-index = <0>;
224 device_type = "serial"; 224 device_type = "serial";
225 compatible = "fsl,ns16550", "ns16550"; 225 compatible = "ns16550";
226 reg = <0x4500 0x100>; 226 reg = <0x4500 0x100>;
227 clock-frequency = <0>; 227 clock-frequency = <0>;
228 interrupts = <9 0x8>; 228 interrupts = <9 0x8>;
@@ -232,7 +232,7 @@
232 serial1: serial@4600 { 232 serial1: serial@4600 {
233 cell-index = <1>; 233 cell-index = <1>;
234 device_type = "serial"; 234 device_type = "serial";
235 compatible = "fsl,ns16550", "ns16550"; 235 compatible = "ns16550";
236 reg = <0x4600 0x100>; 236 reg = <0x4600 0x100>;
237 clock-frequency = <0>; 237 clock-frequency = <0>;
238 interrupts = <10 0x8>; 238 interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 77be77116c2..94a33225171 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -316,7 +316,7 @@
316 serial0: serial@4500 { 316 serial0: serial@4500 {
317 cell-index = <0>; 317 cell-index = <0>;
318 device_type = "serial"; 318 device_type = "serial";
319 compatible = "fsl,ns16550", "ns16550"; 319 compatible = "ns16550";
320 reg = <0x4500 0x100>; // reg base, size 320 reg = <0x4500 0x100>; // reg base, size
321 clock-frequency = <0>; // should we fill in in uboot? 321 clock-frequency = <0>; // should we fill in in uboot?
322 interrupts = <0x2a 0x2>; 322 interrupts = <0x2a 0x2>;
@@ -326,7 +326,7 @@
326 serial1: serial@4600 { 326 serial1: serial@4600 {
327 cell-index = <1>; 327 cell-index = <1>;
328 device_type = "serial"; 328 device_type = "serial";
329 compatible = "fsl,ns16550", "ns16550"; 329 compatible = "ns16550";
330 reg = <0x4600 0x100>; // reg base, size 330 reg = <0x4600 0x100>; // reg base, size
331 clock-frequency = <0>; // should we fill in in uboot? 331 clock-frequency = <0>; // should we fill in in uboot?
332 interrupts = <0x2a 0x2>; 332 interrupts = <0x2a 0x2>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 56bebce8784..ee5538feb45 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -347,7 +347,7 @@
347 serial0: serial@4500 { 347 serial0: serial@4500 {
348 cell-index = <0>; 348 cell-index = <0>;
349 device_type = "serial"; 349 device_type = "serial";
350 compatible = "fsl,ns16550", "ns16550"; 350 compatible = "ns16550";
351 reg = <0x4500 0x100>; 351 reg = <0x4500 0x100>;
352 clock-frequency = <0>; 352 clock-frequency = <0>;
353 interrupts = <42 2>; 353 interrupts = <42 2>;
@@ -357,7 +357,7 @@
357 serial1: serial@4600 { 357 serial1: serial@4600 {
358 cell-index = <1>; 358 cell-index = <1>;
359 device_type = "serial"; 359 device_type = "serial";
360 compatible = "fsl,ns16550", "ns16550"; 360 compatible = "ns16550";
361 reg = <0x4600 0x100>; 361 reg = <0x4600 0x100>;
362 clock-frequency = <0>; 362 clock-frequency = <0>;
363 interrupts = <28 2>; 363 interrupts = <28 2>;
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
index 134a5ff917e..38c35404bdc 100644
--- a/arch/powerpc/boot/dts/socrates.dts
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -199,7 +199,7 @@
199 serial0: serial@4500 { 199 serial0: serial@4500 {
200 cell-index = <0>; 200 cell-index = <0>;
201 device_type = "serial"; 201 device_type = "serial";
202 compatible = "fsl,ns16550", "ns16550"; 202 compatible = "ns16550";
203 reg = <0x4500 0x100>; 203 reg = <0x4500 0x100>;
204 clock-frequency = <0>; 204 clock-frequency = <0>;
205 interrupts = <42 2>; 205 interrupts = <42 2>;
@@ -209,7 +209,7 @@
209 serial1: serial@4600 { 209 serial1: serial@4600 {
210 cell-index = <1>; 210 cell-index = <1>;
211 device_type = "serial"; 211 device_type = "serial";
212 compatible = "fsl,ns16550", "ns16550"; 212 compatible = "ns16550";
213 reg = <0x4600 0x100>; 213 reg = <0x4600 0x100>;
214 clock-frequency = <0>; 214 clock-frequency = <0>;
215 interrupts = <42 2>; 215 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
index 2a555738517..eab680ce10d 100644
--- a/arch/powerpc/boot/dts/storcenter.dts
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -74,7 +74,7 @@
74 serial0: serial@4500 { 74 serial0: serial@4500 {
75 cell-index = <0>; 75 cell-index = <0>;
76 device_type = "serial"; 76 device_type = "serial";
77 compatible = "fsl,ns16550", "ns16550"; 77 compatible = "ns16550";
78 reg = <0x4500 0x20>; 78 reg = <0x4500 0x20>;
79 clock-frequency = <97553800>; /* Hz */ 79 clock-frequency = <97553800>; /* Hz */
80 current-speed = <115200>; 80 current-speed = <115200>;
@@ -85,7 +85,7 @@
85 serial1: serial@4600 { 85 serial1: serial@4600 {
86 cell-index = <1>; 86 cell-index = <1>;
87 device_type = "serial"; 87 device_type = "serial";
88 compatible = "fsl,ns16550", "ns16550"; 88 compatible = "ns16550";
89 reg = <0x4600 0x20>; 89 reg = <0x4600 0x20>;
90 clock-frequency = <97553800>; /* Hz */ 90 clock-frequency = <97553800>; /* Hz */
91 current-speed = <9600>; 91 current-speed = <9600>;
diff --git a/arch/powerpc/boot/dts/stxssa8555.dts b/arch/powerpc/boot/dts/stxssa8555.dts
index 4f166b01c1b..49efd44057d 100644
--- a/arch/powerpc/boot/dts/stxssa8555.dts
+++ b/arch/powerpc/boot/dts/stxssa8555.dts
@@ -210,7 +210,7 @@
210 serial0: serial@4500 { 210 serial0: serial@4500 {
211 cell-index = <0>; 211 cell-index = <0>;
212 device_type = "serial"; 212 device_type = "serial";
213 compatible = "fsl,ns16550", "ns16550"; 213 compatible = "ns16550";
214 reg = <0x4500 0x100>; // reg base, size 214 reg = <0x4500 0x100>; // reg base, size
215 clock-frequency = <0>; // should we fill in in uboot? 215 clock-frequency = <0>; // should we fill in in uboot?
216 interrupts = <42 2>; 216 interrupts = <42 2>;
@@ -220,7 +220,7 @@
220 serial1: serial@4600 { 220 serial1: serial@4600 {
221 cell-index = <1>; 221 cell-index = <1>;
222 device_type = "serial"; 222 device_type = "serial";
223 compatible = "fsl,ns16550", "ns16550"; 223 compatible = "ns16550";
224 reg = <0x4600 0x100>; // reg base, size 224 reg = <0x4600 0x100>; // reg base, size
225 clock-frequency = <0>; // should we fill in in uboot? 225 clock-frequency = <0>; // should we fill in in uboot?
226 interrupts = <42 2>; 226 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index ed264d9ae35..0a4cedbdcb5 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -250,7 +250,7 @@
250 serial0: serial@4500 { 250 serial0: serial@4500 {
251 cell-index = <0>; 251 cell-index = <0>;
252 device_type = "serial"; 252 device_type = "serial";
253 compatible = "fsl,ns16550", "ns16550"; 253 compatible = "ns16550";
254 reg = <0x4500 0x100>; // reg base, size 254 reg = <0x4500 0x100>; // reg base, size
255 clock-frequency = <0>; // should we fill in in uboot? 255 clock-frequency = <0>; // should we fill in in uboot?
256 interrupts = <42 2>; 256 interrupts = <42 2>;
@@ -260,7 +260,7 @@
260 serial1: serial@4600 { 260 serial1: serial@4600 {
261 cell-index = <1>; 261 cell-index = <1>;
262 device_type = "serial"; 262 device_type = "serial";
263 compatible = "fsl,ns16550", "ns16550"; 263 compatible = "ns16550";
264 reg = <0x4600 0x100>; // reg base, size 264 reg = <0x4600 0x100>; // reg base, size
265 clock-frequency = <0>; // should we fill in in uboot? 265 clock-frequency = <0>; // should we fill in in uboot?
266 interrupts = <42 2>; 266 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 92524211581..f49d0918131 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -224,7 +224,7 @@
224 serial0: serial@4500 { 224 serial0: serial@4500 {
225 cell-index = <0>; 225 cell-index = <0>;
226 device_type = "serial"; 226 device_type = "serial";
227 compatible = "fsl,ns16550", "ns16550"; 227 compatible = "ns16550";
228 reg = <0x4500 0x100>; // reg base, size 228 reg = <0x4500 0x100>; // reg base, size
229 clock-frequency = <0>; // should we fill in in uboot? 229 clock-frequency = <0>; // should we fill in in uboot?
230 interrupts = <42 2>; 230 interrupts = <42 2>;
@@ -234,7 +234,7 @@
234 serial1: serial@4600 { 234 serial1: serial@4600 {
235 cell-index = <1>; 235 cell-index = <1>;
236 device_type = "serial"; 236 device_type = "serial";
237 compatible = "fsl,ns16550", "ns16550"; 237 compatible = "ns16550";
238 reg = <0x4600 0x100>; // reg base, size 238 reg = <0x4600 0x100>; // reg base, size
239 clock-frequency = <0>; // should we fill in in uboot? 239 clock-frequency = <0>; // should we fill in in uboot?
240 interrupts = <42 2>; 240 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 6e1ac50852a..9452c3c0511 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -305,7 +305,7 @@
305 serial0: serial@4500 { 305 serial0: serial@4500 {
306 cell-index = <0>; 306 cell-index = <0>;
307 device_type = "serial"; 307 device_type = "serial";
308 compatible = "fsl,ns16550", "ns16550"; 308 compatible = "ns16550";
309 reg = <0x4500 0x100>; // reg base, size 309 reg = <0x4500 0x100>; // reg base, size
310 clock-frequency = <0>; // should we fill in in uboot? 310 clock-frequency = <0>; // should we fill in in uboot?
311 current-speed = <115200>; 311 current-speed = <115200>;
@@ -316,7 +316,7 @@
316 serial1: serial@4600 { 316 serial1: serial@4600 {
317 cell-index = <1>; 317 cell-index = <1>;
318 device_type = "serial"; 318 device_type = "serial";
319 compatible = "fsl,ns16550", "ns16550"; 319 compatible = "ns16550";
320 reg = <0x4600 0x100>; // reg base, size 320 reg = <0x4600 0x100>; // reg base, size
321 clock-frequency = <0>; // should we fill in in uboot? 321 clock-frequency = <0>; // should we fill in in uboot?
322 current-speed = <115200>; 322 current-speed = <115200>;
@@ -352,7 +352,7 @@
352 ranges = < 352 ranges = <
353 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 353 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
354 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 354 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
355 2 0x0 0xa3000000 0x00008000 // CAN (2 x CC770) 355 2 0x0 0xa3000000 0x00008000 // CAN (2 x i82527)
356 3 0x0 0xa3010000 0x00008000 // NAND FLASH 356 3 0x0 0xa3010000 0x00008000 // NAND FLASH
357 357
358 >; 358 >;
@@ -393,27 +393,18 @@
393 }; 393 };
394 394
395 /* Note: CAN support needs be enabled in U-Boot */ 395 /* Note: CAN support needs be enabled in U-Boot */
396 can@2,0 { 396 can0@2,0 {
397 compatible = "bosch,cc770"; // Bosch CC770 397 compatible = "intel,82527"; // Bosch CC770
398 reg = <2 0x0 0x100>; 398 reg = <2 0x0 0x100>;
399 interrupts = <4 1>; 399 interrupts = <4 1>;
400 interrupt-parent = <&mpic>; 400 interrupt-parent = <&mpic>;
401 bosch,external-clock-frequency = <16000000>;
402 bosch,disconnect-rx1-input;
403 bosch,disconnect-tx1-output;
404 bosch,iso-low-speed-mux;
405 bosch,clock-out-frequency = <16000000>;
406 }; 401 };
407 402
408 can@2,100 { 403 can1@2,100 {
409 compatible = "bosch,cc770"; // Bosch CC770 404 compatible = "intel,82527"; // Bosch CC770
410 reg = <2 0x100 0x100>; 405 reg = <2 0x100 0x100>;
411 interrupts = <4 1>; 406 interrupts = <4 1>;
412 interrupt-parent = <&mpic>; 407 interrupt-parent = <&mpic>;
413 bosch,external-clock-frequency = <16000000>;
414 bosch,disconnect-rx1-input;
415 bosch,disconnect-tx1-output;
416 bosch,iso-low-speed-mux;
417 }; 408 };
418 409
419 /* Note: NAND support needs to be enabled in U-Boot */ 410 /* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 161e75eac7f..619776f72c9 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -305,7 +305,7 @@
305 serial0: serial@4500 { 305 serial0: serial@4500 {
306 cell-index = <0>; 306 cell-index = <0>;
307 device_type = "serial"; 307 device_type = "serial";
308 compatible = "fsl,ns16550", "ns16550"; 308 compatible = "ns16550";
309 reg = <0x4500 0x100>; // reg base, size 309 reg = <0x4500 0x100>; // reg base, size
310 clock-frequency = <0>; // should we fill in in uboot? 310 clock-frequency = <0>; // should we fill in in uboot?
311 current-speed = <115200>; 311 current-speed = <115200>;
@@ -316,7 +316,7 @@
316 serial1: serial@4600 { 316 serial1: serial@4600 {
317 cell-index = <1>; 317 cell-index = <1>;
318 device_type = "serial"; 318 device_type = "serial";
319 compatible = "fsl,ns16550", "ns16550"; 319 compatible = "ns16550";
320 reg = <0x4600 0x100>; // reg base, size 320 reg = <0x4600 0x100>; // reg base, size
321 clock-frequency = <0>; // should we fill in in uboot? 321 clock-frequency = <0>; // should we fill in in uboot?
322 current-speed = <115200>; 322 current-speed = <115200>;
@@ -352,7 +352,7 @@
352 ranges = < 352 ranges = <
353 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 353 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
354 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 354 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
355 2 0x0 0xe3000000 0x00008000 // CAN (2 x CC770) 355 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
356 3 0x0 0xe3010000 0x00008000 // NAND FLASH 356 3 0x0 0xe3010000 0x00008000 // NAND FLASH
357 357
358 >; 358 >;
@@ -393,27 +393,18 @@
393 }; 393 };
394 394
395 /* Note: CAN support needs be enabled in U-Boot */ 395 /* Note: CAN support needs be enabled in U-Boot */
396 can@2,0 { 396 can0@2,0 {
397 compatible = "bosch,cc770"; // Bosch CC770 397 compatible = "intel,82527"; // Bosch CC770
398 reg = <2 0x0 0x100>; 398 reg = <2 0x0 0x100>;
399 interrupts = <4 1>; 399 interrupts = <4 1>;
400 interrupt-parent = <&mpic>; 400 interrupt-parent = <&mpic>;
401 bosch,external-clock-frequency = <16000000>;
402 bosch,disconnect-rx1-input;
403 bosch,disconnect-tx1-output;
404 bosch,iso-low-speed-mux;
405 bosch,clock-out-frequency = <16000000>;
406 }; 401 };
407 402
408 can@2,100 { 403 can1@2,100 {
409 compatible = "bosch,cc770"; // Bosch CC770 404 compatible = "intel,82527"; // Bosch CC770
410 reg = <2 0x100 0x100>; 405 reg = <2 0x100 0x100>;
411 interrupts = <4 1>; 406 interrupts = <4 1>;
412 interrupt-parent = <&mpic>; 407 interrupt-parent = <&mpic>;
413 bosch,external-clock-frequency = <16000000>;
414 bosch,disconnect-rx1-input;
415 bosch,disconnect-tx1-output;
416 bosch,iso-low-speed-mux;
417 }; 408 };
418 409
419 /* Note: NAND support needs to be enabled in U-Boot */ 410 /* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index aa6ff0d3dd9..81bad8cd375 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -224,7 +224,7 @@
224 serial0: serial@4500 { 224 serial0: serial@4500 {
225 cell-index = <0>; 225 cell-index = <0>;
226 device_type = "serial"; 226 device_type = "serial";
227 compatible = "fsl,ns16550", "ns16550"; 227 compatible = "ns16550";
228 reg = <0x4500 0x100>; // reg base, size 228 reg = <0x4500 0x100>; // reg base, size
229 clock-frequency = <0>; // should we fill in in uboot? 229 clock-frequency = <0>; // should we fill in in uboot?
230 interrupts = <42 2>; 230 interrupts = <42 2>;
@@ -234,7 +234,7 @@
234 serial1: serial@4600 { 234 serial1: serial@4600 {
235 cell-index = <1>; 235 cell-index = <1>;
236 device_type = "serial"; 236 device_type = "serial";
237 compatible = "fsl,ns16550", "ns16550"; 237 compatible = "ns16550";
238 reg = <0x4600 0x100>; // reg base, size 238 reg = <0x4600 0x100>; // reg base, size
239 clock-frequency = <0>; // should we fill in in uboot? 239 clock-frequency = <0>; // should we fill in in uboot?
240 interrupts = <42 2>; 240 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index c3dba2518d8..f6da7ec49a8 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,7 +57,6 @@
57 57
58 ranges = < 58 ranges = <
59 0x0 0x0 0x40000000 0x800000 59 0x0 0x0 0x40000000 0x800000
60 0x3 0x0 0xc0000000 0x200
61 >; 60 >;
62 61
63 flash@0,0 { 62 flash@0,0 {
@@ -68,30 +67,6 @@
68 bank-width = <4>; 67 bank-width = <4>;
69 device-width = <2>; 68 device-width = <2>;
70 }; 69 };
71
72 /* Note: CAN support needs be enabled in U-Boot */
73 can@3,0 {
74 compatible = "intc,82527";
75 reg = <3 0x0 0x80>;
76 interrupts = <8 1>;
77 interrupt-parent = <&PIC>;
78 bosch,external-clock-frequency = <16000000>;
79 bosch,disconnect-rx1-input;
80 bosch,disconnect-tx1-output;
81 bosch,iso-low-speed-mux;
82 bosch,clock-out-frequency = <16000000>;
83 };
84
85 can@3,100 {
86 compatible = "intc,82527";
87 reg = <3 0x100 0x80>;
88 interrupts = <8 1>;
89 interrupt-parent = <&PIC>;
90 bosch,external-clock-frequency = <16000000>;
91 bosch,disconnect-rx1-input;
92 bosch,disconnect-tx1-output;
93 bosch,iso-low-speed-mux;
94 };
95 }; 70 };
96 71
97 soc@fff00000 { 72 soc@fff00000 {
diff --git a/arch/powerpc/boot/dts/xcalibur1501.dts b/arch/powerpc/boot/dts/xcalibur1501.dts
index cc00f4ddd9a..ac0a617b429 100644
--- a/arch/powerpc/boot/dts/xcalibur1501.dts
+++ b/arch/powerpc/boot/dts/xcalibur1501.dts
@@ -531,7 +531,7 @@
531 serial0: serial@4500 { 531 serial0: serial@4500 {
532 cell-index = <0>; 532 cell-index = <0>;
533 device_type = "serial"; 533 device_type = "serial";
534 compatible = "fsl,ns16550", "ns16550"; 534 compatible = "ns16550";
535 reg = <0x4500 0x100>; 535 reg = <0x4500 0x100>;
536 clock-frequency = <0>; 536 clock-frequency = <0>;
537 interrupts = <42 2>; 537 interrupts = <42 2>;
@@ -542,7 +542,7 @@
542 serial1: serial@4600 { 542 serial1: serial@4600 {
543 cell-index = <1>; 543 cell-index = <1>;
544 device_type = "serial"; 544 device_type = "serial";
545 compatible = "fsl,ns16550", "ns16550"; 545 compatible = "ns16550";
546 reg = <0x4600 0x100>; 546 reg = <0x4600 0x100>;
547 clock-frequency = <0>; 547 clock-frequency = <0>;
548 interrupts = <42 2>; 548 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5200.dts b/arch/powerpc/boot/dts/xpedite5200.dts
index 8fd7b703135..c41a80c55e4 100644
--- a/arch/powerpc/boot/dts/xpedite5200.dts
+++ b/arch/powerpc/boot/dts/xpedite5200.dts
@@ -333,7 +333,7 @@
333 serial0: serial@4500 { 333 serial0: serial@4500 {
334 cell-index = <0>; 334 cell-index = <0>;
335 device_type = "serial"; 335 device_type = "serial";
336 compatible = "fsl,ns16550", "ns16550"; 336 compatible = "ns16550";
337 reg = <0x4500 0x100>; 337 reg = <0x4500 0x100>;
338 clock-frequency = <0>; 338 clock-frequency = <0>;
339 current-speed = <115200>; 339 current-speed = <115200>;
@@ -344,7 +344,7 @@
344 serial1: serial@4600 { 344 serial1: serial@4600 {
345 cell-index = <1>; 345 cell-index = <1>;
346 device_type = "serial"; 346 device_type = "serial";
347 compatible = "fsl,ns16550", "ns16550"; 347 compatible = "ns16550";
348 reg = <0x4600 0x100>; 348 reg = <0x4600 0x100>;
349 clock-frequency = <0>; 349 clock-frequency = <0>;
350 current-speed = <115200>; 350 current-speed = <115200>;
diff --git a/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
index 0baa8283d08..c0efcbb4513 100644
--- a/arch/powerpc/boot/dts/xpedite5200_xmon.dts
+++ b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
@@ -337,7 +337,7 @@
337 serial0: serial@4500 { 337 serial0: serial@4500 {
338 cell-index = <0>; 338 cell-index = <0>;
339 device_type = "serial"; 339 device_type = "serial";
340 compatible = "fsl,ns16550", "ns16550"; 340 compatible = "ns16550";
341 reg = <0x4500 0x100>; 341 reg = <0x4500 0x100>;
342 clock-frequency = <0>; 342 clock-frequency = <0>;
343 current-speed = <9600>; 343 current-speed = <9600>;
@@ -348,7 +348,7 @@
348 serial1: serial@4600 { 348 serial1: serial@4600 {
349 cell-index = <1>; 349 cell-index = <1>;
350 device_type = "serial"; 350 device_type = "serial";
351 compatible = "fsl,ns16550", "ns16550"; 351 compatible = "ns16550";
352 reg = <0x4600 0x100>; 352 reg = <0x4600 0x100>;
353 clock-frequency = <0>; 353 clock-frequency = <0>;
354 current-speed = <9600>; 354 current-speed = <9600>;
diff --git a/arch/powerpc/boot/dts/xpedite5301.dts b/arch/powerpc/boot/dts/xpedite5301.dts
index 53c1c6a9752..db7faf5ebb3 100644
--- a/arch/powerpc/boot/dts/xpedite5301.dts
+++ b/arch/powerpc/boot/dts/xpedite5301.dts
@@ -441,7 +441,7 @@
441 serial0: serial@4500 { 441 serial0: serial@4500 {
442 cell-index = <0>; 442 cell-index = <0>;
443 device_type = "serial"; 443 device_type = "serial";
444 compatible = "fsl,ns16550", "ns16550"; 444 compatible = "ns16550";
445 reg = <0x4500 0x100>; 445 reg = <0x4500 0x100>;
446 clock-frequency = <0>; 446 clock-frequency = <0>;
447 interrupts = <42 2>; 447 interrupts = <42 2>;
@@ -452,7 +452,7 @@
452 serial1: serial@4600 { 452 serial1: serial@4600 {
453 cell-index = <1>; 453 cell-index = <1>;
454 device_type = "serial"; 454 device_type = "serial";
455 compatible = "fsl,ns16550", "ns16550"; 455 compatible = "ns16550";
456 reg = <0x4600 0x100>; 456 reg = <0x4600 0x100>;
457 clock-frequency = <0>; 457 clock-frequency = <0>;
458 interrupts = <42 2>; 458 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5330.dts b/arch/powerpc/boot/dts/xpedite5330.dts
index 21522598315..c364ca6ff7d 100644
--- a/arch/powerpc/boot/dts/xpedite5330.dts
+++ b/arch/powerpc/boot/dts/xpedite5330.dts
@@ -477,7 +477,7 @@
477 serial0: serial@4500 { 477 serial0: serial@4500 {
478 cell-index = <0>; 478 cell-index = <0>;
479 device_type = "serial"; 479 device_type = "serial";
480 compatible = "fsl,ns16550", "ns16550"; 480 compatible = "ns16550";
481 reg = <0x4500 0x100>; 481 reg = <0x4500 0x100>;
482 clock-frequency = <0>; 482 clock-frequency = <0>;
483 interrupts = <42 2>; 483 interrupts = <42 2>;
@@ -488,7 +488,7 @@
488 serial1: serial@4600 { 488 serial1: serial@4600 {
489 cell-index = <1>; 489 cell-index = <1>;
490 device_type = "serial"; 490 device_type = "serial";
491 compatible = "fsl,ns16550", "ns16550"; 491 compatible = "ns16550";
492 reg = <0x4600 0x100>; 492 reg = <0x4600 0x100>;
493 clock-frequency = <0>; 493 clock-frequency = <0>;
494 interrupts = <42 2>; 494 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5370.dts b/arch/powerpc/boot/dts/xpedite5370.dts
index 11dbda10d75..7a8a4afd56c 100644
--- a/arch/powerpc/boot/dts/xpedite5370.dts
+++ b/arch/powerpc/boot/dts/xpedite5370.dts
@@ -439,7 +439,7 @@
439 serial0: serial@4500 { 439 serial0: serial@4500 {
440 cell-index = <0>; 440 cell-index = <0>;
441 device_type = "serial"; 441 device_type = "serial";
442 compatible = "fsl,ns16550", "ns16550"; 442 compatible = "ns16550";
443 reg = <0x4500 0x100>; 443 reg = <0x4500 0x100>;
444 clock-frequency = <0>; 444 clock-frequency = <0>;
445 interrupts = <42 2>; 445 interrupts = <42 2>;
@@ -450,7 +450,7 @@
450 serial1: serial@4600 { 450 serial1: serial@4600 {
451 cell-index = <1>; 451 cell-index = <1>;
452 device_type = "serial"; 452 device_type = "serial";
453 compatible = "fsl,ns16550", "ns16550"; 453 compatible = "ns16550";
454 reg = <0x4600 0x100>; 454 reg = <0x4600 0x100>;
455 clock-frequency = <0>; 455 clock-frequency = <0>;
456 interrupts = <42 2>; 456 interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 30bb4753577..64923245f0e 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -138,42 +138,6 @@
138 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
139 interrupts = <0x5 0x1>; 139 interrupts = <0x5 0x1>;
140 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
141
142 nor_flash@0,0 {
143 compatible = "amd,s29gl256n", "cfi-flash";
144 bank-width = <2>;
145 reg = <0x00000000 0x00000000 0x04000000>;
146 #address-cells = <1>;
147 #size-cells = <1>;
148 partition@0 {
149 label = "kernel";
150 reg = <0x00000000 0x001e0000>;
151 };
152 partition@1e0000 {
153 label = "dtb";
154 reg = <0x001e0000 0x00020000>;
155 };
156 partition@200000 {
157 label = "ramdisk";
158 reg = <0x00200000 0x01400000>;
159 };
160 partition@1600000 {
161 label = "jffs2";
162 reg = <0x01600000 0x00400000>;
163 };
164 partition@1a00000 {
165 label = "user";
166 reg = <0x01a00000 0x02540000>;
167 };
168 partition@3f40000 {
169 label = "env";
170 reg = <0x03f40000 0x00040000>;
171 };
172 partition@3f80000 {
173 label = "u-boot";
174 reg = <0x03f80000 0x00080000>;
175 };
176 };
177 }; 141 };
178 142
179 UART0: serial@ef600300 { 143 UART0: serial@ef600300 {
diff --git a/arch/powerpc/boot/treeboot-currituck.c b/arch/powerpc/boot/treeboot-currituck.c
deleted file mode 100644
index 925ae43b746..00000000000
--- a/arch/powerpc/boot/treeboot-currituck.c
+++ /dev/null
@@ -1,119 +0,0 @@
1/*
2 * Copyright © 2011 Tony Breeds IBM Corporation
3 *
4 * Based on earlier code:
5 * Copyright (C) Paul Mackerras 1997.
6 *
7 * Matt Porter <mporter@kernel.crashing.org>
8 * Copyright 2002-2005 MontaVista Software Inc.
9 *
10 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
11 * Copyright (c) 2003, 2004 Zultys Technologies
12 *
13 * Copyright 2007 David Gibson, IBM Corporation.
14 * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
15 * Copyright © 2011 David Kleikamp IBM Corporation
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 */
22#include <stdarg.h>
23#include <stddef.h>
24#include "types.h"
25#include "elf.h"
26#include "string.h"
27#include "stdio.h"
28#include "page.h"
29#include "ops.h"
30#include "reg.h"
31#include "io.h"
32#include "dcr.h"
33#include "4xx.h"
34#include "44x.h"
35#include "libfdt.h"
36
37BSS_STACK(4096);
38
39#define MAX_RANKS 0x4
40#define DDR3_MR0CF 0x80010011U
41
42static unsigned long long ibm_currituck_memsize;
43static unsigned long long ibm_currituck_detect_memsize(void)
44{
45 u32 reg;
46 unsigned i;
47 unsigned long long memsize = 0;
48
49 for(i = 0; i < MAX_RANKS; i++){
50 reg = mfdcrx(DDR3_MR0CF + i);
51
52 if (!(reg & 1))
53 continue;
54
55 reg &= 0x0000f000;
56 reg >>= 12;
57 memsize += (0x800000ULL << reg);
58 }
59
60 return memsize;
61}
62
63static void ibm_currituck_fixups(void)
64{
65 void *devp = finddevice("/");
66 u32 dma_ranges[7];
67
68 dt_fixup_memory(0x0ULL, ibm_currituck_memsize);
69
70 while ((devp = find_node_by_devtype(devp, "pci"))) {
71 if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) {
72 printf("%s: Failed to get dma-ranges\r\n", __func__);
73 continue;
74 }
75
76 dma_ranges[5] = ibm_currituck_memsize >> 32;
77 dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL;
78
79 setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
80 }
81}
82
83#define SPRN_PIR 0x11E /* Processor Indentification Register */
84void platform_init(void)
85{
86 unsigned long end_of_ram, avail_ram;
87 u32 pir_reg;
88 int node, size;
89 const u32 *timebase;
90
91 ibm_currituck_memsize = ibm_currituck_detect_memsize();
92 if (ibm_currituck_memsize >> 32)
93 end_of_ram = ~0UL;
94 else
95 end_of_ram = ibm_currituck_memsize;
96 avail_ram = end_of_ram - (unsigned long)_end;
97
98 simple_alloc_init(_end, avail_ram, 128, 64);
99 platform_ops.fixups = ibm_currituck_fixups;
100 platform_ops.exit = ibm44x_dbcr_reset;
101 pir_reg = mfspr(SPRN_PIR);
102
103 /* Make sure FDT blob is sane */
104 if (fdt_check_header(_dtb_start) != 0)
105 fatal("Invalid device tree blob\n");
106
107 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
108 "cpu", sizeof("cpu"));
109 if (!node)
110 fatal("Cannot find cpu node\n");
111 timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
112 if (timebase && (size == 4))
113 timebase_period_ns = 1000000000 / *timebase;
114
115 fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
116 fdt_init(_dtb_start);
117
118 serial_console_init();
119}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 6761c746048..c74531af72c 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -144,7 +144,6 @@ tmp=$tmpdir/zImage.$$.o
144ksection=.kernel:vmlinux.strip 144ksection=.kernel:vmlinux.strip
145isection=.kernel:initrd 145isection=.kernel:initrd
146link_address='0x400000' 146link_address='0x400000'
147make_space=y
148 147
149case "$platform" in 148case "$platform" in
150pseries) 149pseries)
@@ -164,7 +163,7 @@ coff)
164 link_address='0x500000' 163 link_address='0x500000'
165 pie= 164 pie=
166 ;; 165 ;;
167miboot|uboot*) 166miboot|uboot)
168 # miboot and U-boot want just the bare bits, not an ELF binary 167 # miboot and U-boot want just the bare bits, not an ELF binary
169 ext=bin 168 ext=bin
170 objflags="-O binary" 169 objflags="-O binary"
@@ -211,7 +210,6 @@ ps3)
211 ksection=.kernel:vmlinux.bin 210 ksection=.kernel:vmlinux.bin
212 isection=.kernel:initrd 211 isection=.kernel:initrd
213 link_address='' 212 link_address=''
214 make_space=n
215 pie= 213 pie=
216 ;; 214 ;;
217ep88xc|ep405|ep8248e) 215ep88xc|ep405|ep8248e)
@@ -246,9 +244,6 @@ gamecube|wii)
246 link_address='0x600000' 244 link_address='0x600000'
247 platformo="$object/$platform-head.o $object/$platform.o" 245 platformo="$object/$platform-head.o $object/$platform.o"
248 ;; 246 ;;
249treeboot-currituck)
250 link_address='0x1000000'
251 ;;
252treeboot-iss4xx-mpic) 247treeboot-iss4xx-mpic)
253 platformo="$object/treeboot-iss4xx.o" 248 platformo="$object/treeboot-iss4xx.o"
254 ;; 249 ;;
@@ -262,8 +257,6 @@ vmz="$tmpdir/`basename \"$kernel\"`.$ext"
262if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then 257if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then
263 ${CROSS}objcopy $objflags "$kernel" "$vmz.$$" 258 ${CROSS}objcopy $objflags "$kernel" "$vmz.$$"
264 259
265 strip_size=$(stat -c %s $vmz.$$)
266
267 if [ -n "$gzip" ]; then 260 if [ -n "$gzip" ]; then
268 gzip -n -f -9 "$vmz.$$" 261 gzip -n -f -9 "$vmz.$$"
269 fi 262 fi
@@ -273,26 +266,6 @@ if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then
273 else 266 else
274 vmz="$vmz.$$" 267 vmz="$vmz.$$"
275 fi 268 fi
276else
277 # Calculate the vmlinux.strip size
278 ${CROSS}objcopy $objflags "$kernel" "$vmz.$$"
279 strip_size=$(stat -c %s $vmz.$$)
280 rm -f $vmz.$$
281fi
282
283if [ "$make_space" = "y" ]; then
284 # Round the size to next higher MB limit
285 round_size=$(((strip_size + 0xfffff) & 0xfff00000))
286
287 round_size=0x$(printf "%x" $round_size)
288 link_addr=$(printf "%d" $link_address)
289
290 if [ $link_addr -lt $strip_size ]; then
291 echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
292 "overlaps the address of the wrapper($link_address)"
293 echo "INFO: Fixing the link_address of wrapper to ($round_size)"
294 link_address=$round_size
295 fi
296fi 269fi
297 270
298vmz="$vmz$gzip" 271vmz="$vmz$gzip"
@@ -318,26 +291,6 @@ uboot)
318 fi 291 fi
319 exit 0 292 exit 0
320 ;; 293 ;;
321uboot-obs600)
322 rm -f "$ofile"
323 # obs600 wants a multi image with an initrd, so we need to put a fake
324 # one in even when building a "normal" image.
325 if [ -n "$initrd" ]; then
326 real_rd="$initrd"
327 else
328 real_rd=`mktemp`
329 echo "\0" >>"$real_rd"
330 fi
331 ${MKIMAGE} -A ppc -O linux -T multi -C gzip -a $membase -e $membase \
332 $uboot_version -d "$vmz":"$real_rd":"$dtb" "$ofile"
333 if [ -z "$initrd" ]; then
334 rm -f "$real_rd"
335 fi
336 if [ -z "$cacheit" ]; then
337 rm -f "$vmz"
338 fi
339 exit 0
340 ;;
341esac 294esac
342 295
343addsec() { 296addsec() {
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 17:34:31 -0400