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authorJohn David Anglin <dave@hiauly1.hia.nrc.ca>2010-04-11 13:03:54 -0400
committerKyle McMartin <kyle@dreadnought.i.jkkm.org>2010-05-30 05:47:28 -0400
commit9b437bca163c44d4ec6544241f29451675693cd6 (patch)
tree1d3c46b7f0e03debec36465bb56a4f8eb00794d6 /arch/parisc
parentf4c0346c6f350d51aac7ed87e266a4257bdbe506 (diff)
parisc: Remove unnecessary macros from entry.S
The EXTR, DEP and DEPI macros are unnecessary. There are PA 1.X pneumonics available with the same functionality, and the DEP and DEPI macros conflict with assembler pneumonics. Tested on a variety of 32 and 64-bit systems. Signed-off-by: John David Anglin <dave.anglin@nrc-cnrc.gc.ca> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/kernel/entry.S40
1 files changed, 7 insertions, 33 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 293ba44f40a..6337adef30f 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -364,32 +364,6 @@
364 .align 32 364 .align 32
365 .endm 365 .endm
366 366
367 /* The following are simple 32 vs 64 bit instruction
368 * abstractions for the macros */
369 .macro EXTR reg1,start,length,reg2
370#ifdef CONFIG_64BIT
371 extrd,u \reg1,32+(\start),\length,\reg2
372#else
373 extrw,u \reg1,\start,\length,\reg2
374#endif
375 .endm
376
377 .macro DEP reg1,start,length,reg2
378#ifdef CONFIG_64BIT
379 depd \reg1,32+(\start),\length,\reg2
380#else
381 depw \reg1,\start,\length,\reg2
382#endif
383 .endm
384
385 .macro DEPI val,start,length,reg
386#ifdef CONFIG_64BIT
387 depdi \val,32+(\start),\length,\reg
388#else
389 depwi \val,\start,\length,\reg
390#endif
391 .endm
392
393 /* In LP64, the space contains part of the upper 32 bits of the 367 /* In LP64, the space contains part of the upper 32 bits of the
394 * fault. We have to extract this and place it in the va, 368 * fault. We have to extract this and place it in the va,
395 * zeroing the corresponding bits in the space register */ 369 * zeroing the corresponding bits in the space register */
@@ -442,19 +416,19 @@
442 */ 416 */
443 .macro L2_ptep pmd,pte,index,va,fault 417 .macro L2_ptep pmd,pte,index,va,fault
444#if PT_NLEVELS == 3 418#if PT_NLEVELS == 3
445 EXTR \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index 419 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
446#else 420#else
447 EXTR \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index 421 extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
448#endif 422#endif
449 DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ 423 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
450 copy %r0,\pte 424 copy %r0,\pte
451 ldw,s \index(\pmd),\pmd 425 ldw,s \index(\pmd),\pmd
452 bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault 426 bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault
453 DEP %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ 427 dep %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */
454 copy \pmd,%r9 428 copy \pmd,%r9
455 SHLREG %r9,PxD_VALUE_SHIFT,\pmd 429 SHLREG %r9,PxD_VALUE_SHIFT,\pmd
456 EXTR \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index 430 extru \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
457 DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ 431 dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
458 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd 432 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd
459 LDREG %r0(\pmd),\pte /* pmd is now pte */ 433 LDREG %r0(\pmd),\pte /* pmd is now pte */
460 bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault 434 bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault
@@ -605,7 +579,7 @@
605 depdi 0,31,32,\tmp 579 depdi 0,31,32,\tmp
606#endif 580#endif
607 copy \va,\tmp1 581 copy \va,\tmp1
608 DEPI 0,31,23,\tmp1 582 depi 0,31,23,\tmp1
609 cmpb,COND(<>),n \tmp,\tmp1,\fault 583 cmpb,COND(<>),n \tmp,\tmp1,\fault
610 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot 584 ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot
611 depd,z \prot,8,7,\prot 585 depd,z \prot,8,7,\prot