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authorBjorn Helgaas <bhelgaas@google.com>2012-02-23 22:19:03 -0500
committerBjorn Helgaas <bhelgaas@google.com>2012-02-23 22:19:03 -0500
commit39c2462e163448c7df466c7262109ec6a24d5f88 (patch)
tree58edadf5be6f48cc845baeaa1c5b58cd00591605 /arch/parisc
parent4b84b6e9b43cab04099ba7055322d31dbd789475 (diff)
parisc/PCI: get rid of device resource fixups
Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. CC: linux-parisc@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/include/asm/pci.h38
-rw-r--r--arch/parisc/kernel/pci.c52
2 files changed, 1 insertions, 89 deletions
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 2242a5c636c..a8b591fdd56 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -82,38 +82,8 @@ struct pci_hba_data {
82 82
83#ifdef CONFIG_64BIT 83#ifdef CONFIG_64BIT
84#define PCI_F_EXTEND 0xffffffff00000000UL 84#define PCI_F_EXTEND 0xffffffff00000000UL
85#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
86
87/* We need to know if an address is LMMMIO or GMMIO.
88 * LMMIO requires mangling and GMMIO we must use as-is.
89 */
90static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
91{
92 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
93}
94
95/*
96** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
97** See pci.c for more conversions used by Generic PCI code.
98**
99** Platform characteristics/firmware guarantee that
100** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
101** (2) PA_VIEW == IO_VIEW for GMMIO
102*/
103#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
104 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
105 : (a)) /* GMMIO */
106#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
107 ? (a) + hba->lmmio_space_offset \
108 : (a))
109
110#else /* !CONFIG_64BIT */ 85#else /* !CONFIG_64BIT */
111
112#define PCI_BUS_ADDR(hba,a) (a)
113#define PCI_HOST_ADDR(hba,a) (a)
114#define PCI_F_EXTEND 0UL 86#define PCI_F_EXTEND 0UL
115#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
116
117#endif /* !CONFIG_64BIT */ 87#endif /* !CONFIG_64BIT */
118 88
119/* 89/*
@@ -245,13 +215,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
245} 215}
246#endif 216#endif
247 217
248extern void 218#define ARCH_HAS_GENERIC_PCI_OFFSETS
249pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
250 struct resource *res);
251
252extern void
253pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
254 struct pci_bus_region *region);
255 219
256static inline void pcibios_penalize_isa_irq(int irq, int active) 220static inline void pcibios_penalize_isa_irq(int irq, int active)
257{ 221{
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index 9efd9740531..74d544b1cd2 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -195,58 +195,6 @@ void __init pcibios_init_bus(struct pci_bus *bus)
195 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl); 195 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl);
196} 196}
197 197
198/* called by drivers/pci/setup-bus.c:pci_setup_bridge(). */
199void __devinit pcibios_resource_to_bus(struct pci_dev *dev,
200 struct pci_bus_region *region, struct resource *res)
201{
202#ifdef CONFIG_64BIT
203 struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
204#endif
205
206 if (res->flags & IORESOURCE_IO) {
207 /*
208 ** I/O space may see busnumbers here. Something
209 ** in the form of 0xbbxxxx where bb is the bus num
210 ** and xxxx is the I/O port space address.
211 ** Remaining address translation are done in the
212 ** PCI Host adapter specific code - ie dino_out8.
213 */
214 region->start = PCI_PORT_ADDR(res->start);
215 region->end = PCI_PORT_ADDR(res->end);
216 } else if (res->flags & IORESOURCE_MEM) {
217 /* Convert MMIO addr to PCI addr (undo global virtualization) */
218 region->start = PCI_BUS_ADDR(hba, res->start);
219 region->end = PCI_BUS_ADDR(hba, res->end);
220 }
221
222 DBG_RES("pcibios_resource_to_bus(%02x %s [%lx,%lx])\n",
223 dev->bus->number, res->flags & IORESOURCE_IO ? "IO" : "MEM",
224 region->start, region->end);
225}
226
227void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
228 struct pci_bus_region *region)
229{
230#ifdef CONFIG_64BIT
231 struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
232#endif
233
234 if (res->flags & IORESOURCE_MEM) {
235 res->start = PCI_HOST_ADDR(hba, region->start);
236 res->end = PCI_HOST_ADDR(hba, region->end);
237 }
238
239 if (res->flags & IORESOURCE_IO) {
240 res->start = region->start;
241 res->end = region->end;
242 }
243}
244
245#ifdef CONFIG_HOTPLUG
246EXPORT_SYMBOL(pcibios_resource_to_bus);
247EXPORT_SYMBOL(pcibios_bus_to_resource);
248#endif
249
250/* 198/*
251 * pcibios align resources() is called every time generic PCI code 199 * pcibios align resources() is called every time generic PCI code
252 * wants to generate a new address. The process of looking for 200 * wants to generate a new address. The process of looking for