MIPS: TXx9: Fix possible overflow in clock calculations

Addition of -fwrapv option in 2.6.29 discloses possible overflow with
signed arithmetics.  For example, result of "a * 6 / 12" (int a =
400000000) is 200000000 without -fwrapv but -157913941 with -fwrapv.

Change some variable to unsigned to avoid such overflows.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3 files changed, 3 insertions, 3 deletions

diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c
index 914e93c6263..1093549df1a 100644
--- a/arch/mips/txx9/generic/setup_tx4927.c
+++ b/arch/mips/txx9/generic/setup_tx4927.c
@@ -88,7 +88,7 @@ void __init tx4927_setup(void)
 {
         int i;
         __u32 divmode;
-        int cpuclk = 0;
+        unsigned int cpuclk = 0;
         u64 ccfg;
 
         txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE,
diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c
index f0844f891f0..3925219b897 100644
--- a/arch/mips/txx9/generic/setup_tx4938.c
+++ b/arch/mips/txx9/generic/setup_tx4938.c
@@ -93,7 +93,7 @@ void __init tx4938_setup(void)
 {
         int i;
         __u32 divmode;
-        int cpuclk = 0;
+        unsigned int cpuclk = 0;
         u64 ccfg;
 
         txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE,
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index 7a25b573e9b..c2bf150c883 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -114,7 +114,7 @@ void __init tx4939_setup(void)
         int i;
         __u32 divmode;
         __u64 pcfg;
-        int cpuclk = 0;
+        unsigned int cpuclk = 0;
 
         txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE,
                           TX4939_REG_SIZE);