diff options
| author | David Daney <david.daney@cavium.com> | 2011-09-23 20:29:54 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-10-24 18:34:25 -0400 |
| commit | 074ef0d2752a54a73f0e368fad458e4b5a57c5f8 (patch) | |
| tree | 657167addc8f3747e7bbee25766402daf402d31f /arch/mips | |
| parent | b2788965baed868ce48ebd6d67f00acf617c9ee6 (diff) | |
MIPS: Add more CPU identifiers for Octeon II CPUs.
The CPU identifiers for cn68XX, cn66XX and cn61XX are known, so add
them.
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2776/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 5f95a4bfc73..2f7f41873f2 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
| @@ -135,6 +135,9 @@ | |||
| 135 | #define PRID_IMP_CAVIUM_CN50XX 0x0600 | 135 | #define PRID_IMP_CAVIUM_CN50XX 0x0600 |
| 136 | #define PRID_IMP_CAVIUM_CN52XX 0x0700 | 136 | #define PRID_IMP_CAVIUM_CN52XX 0x0700 |
| 137 | #define PRID_IMP_CAVIUM_CN63XX 0x9000 | 137 | #define PRID_IMP_CAVIUM_CN63XX 0x9000 |
| 138 | #define PRID_IMP_CAVIUM_CN68XX 0x9100 | ||
| 139 | #define PRID_IMP_CAVIUM_CN66XX 0x9200 | ||
| 140 | #define PRID_IMP_CAVIUM_CN61XX 0x9300 | ||
| 138 | 141 | ||
| 139 | /* | 142 | /* |
| 140 | * These are the PRID's for when 23:16 == PRID_COMP_INGENIC | 143 | * These are the PRID's for when 23:16 == PRID_COMP_INGENIC |