diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 12:33:01 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 12:33:01 -0400 |
| commit | e7c4782f92fc4b83d953ce53f77f05ae65dcd773 (patch) | |
| tree | 8b72472f8653ed55593f52fc10e7eaa9b7b31f1b /arch/mips/sgi-ip32 | |
| parent | 192cca6ef2c49ac5ff46f7a31cb9dd175995658e (diff) | |
[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sgi-ip32')
| -rw-r--r-- | arch/mips/sgi-ip32/ip32-platform.c | 52 | ||||
| -rw-r--r-- | arch/mips/sgi-ip32/ip32-setup.c | 36 |
2 files changed, 52 insertions, 36 deletions
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c index 120b15932ca..ba3697ee7ff 100644 --- a/arch/mips/sgi-ip32/ip32-platform.c +++ b/arch/mips/sgi-ip32/ip32-platform.c | |||
| @@ -1,5 +1,53 @@ | |||
| 1 | /* | ||
| 2 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 3 | * License. See the file "COPYING" in the main directory of this archive | ||
| 4 | * for more details. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) | ||
| 7 | */ | ||
| 8 | #include <linux/module.h> | ||
| 1 | #include <linux/init.h> | 9 | #include <linux/init.h> |
| 2 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
| 11 | #include <linux/serial_8250.h> | ||
| 12 | |||
| 13 | #include <asm/ip32/mace.h> | ||
| 14 | #include <asm/ip32/ip32_ints.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * .iobase isn't a constant (in the sense of C) so we fill it in at runtime. | ||
| 18 | */ | ||
| 19 | #define MACE_PORT(int) \ | ||
| 20 | { \ | ||
| 21 | .irq = int, \ | ||
| 22 | .uartclk = 1843200, \ | ||
| 23 | .iotype = UPIO_MEM, \ | ||
| 24 | .flags = UPF_SKIP_TEST, \ | ||
| 25 | .regshift = 8, \ | ||
| 26 | } | ||
| 27 | |||
| 28 | static struct plat_serial8250_port uart8250_data[] = { | ||
| 29 | MACE_PORT(MACEISA_SERIAL1_IRQ), | ||
| 30 | MACE_PORT(MACEISA_SERIAL2_IRQ), | ||
| 31 | { }, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static struct platform_device uart8250_device = { | ||
| 35 | .name = "serial8250", | ||
| 36 | .id = PLAT8250_DEV_PLATFORM, | ||
| 37 | .dev = { | ||
| 38 | .platform_data = uart8250_data, | ||
| 39 | }, | ||
| 40 | }; | ||
| 41 | |||
| 42 | static int __init uart8250_init(void) | ||
| 43 | { | ||
| 44 | uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1; | ||
| 45 | uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1; | ||
| 46 | |||
| 47 | return platform_device_register(&uart8250_device); | ||
| 48 | } | ||
| 49 | |||
| 50 | device_initcall(uart8250_init); | ||
| 3 | 51 | ||
| 4 | static __init int meth_devinit(void) | 52 | static __init int meth_devinit(void) |
| 5 | { | 53 | { |
| @@ -18,3 +66,7 @@ static __init int meth_devinit(void) | |||
| 18 | } | 66 | } |
| 19 | 67 | ||
| 20 | device_initcall(meth_devinit); | 68 | device_initcall(meth_devinit); |
| 69 | |||
| 70 | MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>"); | ||
| 71 | MODULE_LICENSE("GPL"); | ||
| 72 | MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2"); | ||
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 57708fe28bd..bbba066cb40 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c | |||
| @@ -62,12 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str) | |||
| 62 | } | 62 | } |
| 63 | #endif | 63 | #endif |
| 64 | 64 | ||
| 65 | #ifdef CONFIG_SERIAL_8250 | ||
| 66 | #include <linux/tty.h> | ||
| 67 | #include <linux/serial.h> | ||
| 68 | #include <linux/serial_core.h> | ||
| 69 | #endif /* CONFIG_SERIAL_8250 */ | ||
| 70 | |||
| 71 | /* An arbitrary time; this can be decreased if reliability looks good */ | 65 | /* An arbitrary time; this can be decreased if reliability looks good */ |
| 72 | #define WAIT_MS 10 | 66 | #define WAIT_MS 10 |
| 73 | 67 | ||
| @@ -96,36 +90,6 @@ void __init plat_mem_setup(void) | |||
| 96 | 90 | ||
| 97 | board_time_init = ip32_time_init; | 91 | board_time_init = ip32_time_init; |
| 98 | 92 | ||
| 99 | #ifdef CONFIG_SERIAL_8250 | ||
| 100 | { | ||
| 101 | static struct uart_port o2_serial[2]; | ||
| 102 | |||
| 103 | memset(o2_serial, 0, sizeof(o2_serial)); | ||
| 104 | o2_serial[0].type = PORT_16550A; | ||
| 105 | o2_serial[0].line = 0; | ||
| 106 | o2_serial[0].irq = MACEISA_SERIAL1_IRQ; | ||
| 107 | o2_serial[0].flags = UPF_SKIP_TEST; | ||
| 108 | o2_serial[0].uartclk = 1843200; | ||
| 109 | o2_serial[0].iotype = UPIO_MEM; | ||
| 110 | o2_serial[0].membase = (char *)&mace->isa.serial1; | ||
| 111 | o2_serial[0].fifosize = 14; | ||
| 112 | /* How much to shift register offset by. Each UART register | ||
| 113 | * is replicated over 256 byte space */ | ||
| 114 | o2_serial[0].regshift = 8; | ||
| 115 | o2_serial[1].type = PORT_16550A; | ||
| 116 | o2_serial[1].line = 1; | ||
| 117 | o2_serial[1].irq = MACEISA_SERIAL2_IRQ; | ||
| 118 | o2_serial[1].flags = UPF_SKIP_TEST; | ||
| 119 | o2_serial[1].uartclk = 1843200; | ||
| 120 | o2_serial[1].iotype = UPIO_MEM; | ||
| 121 | o2_serial[1].membase = (char *)&mace->isa.serial2; | ||
| 122 | o2_serial[1].fifosize = 14; | ||
| 123 | o2_serial[1].regshift = 8; | ||
| 124 | |||
| 125 | early_serial_setup(&o2_serial[0]); | ||
| 126 | early_serial_setup(&o2_serial[1]); | ||
| 127 | } | ||
| 128 | #endif | ||
| 129 | #ifdef CONFIG_SGI_O2MACE_ETH | 93 | #ifdef CONFIG_SGI_O2MACE_ETH |
| 130 | { | 94 | { |
| 131 | char *mac = ArcGetEnvironmentVariable("eaddr"); | 95 | char *mac = ArcGetEnvironmentVariable("eaddr"); |
