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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/mips/math-emu
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/mips/math-emu')
-rw-r--r--arch/mips/math-emu/cp1emu.c17
-rw-r--r--arch/mips/math-emu/dsemul.c1
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 47c77e7ffbf..dbf2f93a509 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -171,17 +171,16 @@ static int isBranchInstr(mips_instruction * i)
171 * In the Linux kernel, we support selection of FPR format on the 171 * In the Linux kernel, we support selection of FPR format on the
172 * basis of the Status.FR bit. If an FPU is not present, the FR bit 172 * basis of the Status.FR bit. If an FPU is not present, the FR bit
173 * is hardwired to zero, which would imply a 32-bit FPU even for 173 * is hardwired to zero, which would imply a 32-bit FPU even for
174 * 64-bit CPUs so we rather look at TIF_32BIT_REGS. 174 * 64-bit CPUs. For 64-bit kernels with no FPU we use TIF_32BIT_REGS
175 * FPU emu is slow and bulky and optimizing this function offers fairly 175 * as a proxy for the FR bit so that a 64-bit FPU is emulated. In any
176 * sizeable benefits so we try to be clever and make this function return 176 * case, for a 32-bit kernel which uses the O32 MIPS ABI, only the
177 * a constant whenever possible, that is on 64-bit kernels without O32 177 * even FPRs are used (Status.FR = 0).
178 * compatibility enabled and on 32-bit kernels.
179 */ 178 */
180static inline int cop1_64bit(struct pt_regs *xcp) 179static inline int cop1_64bit(struct pt_regs *xcp)
181{ 180{
182#if defined(CONFIG_64BIT) && !defined(CONFIG_MIPS32_O32) 181 if (cpu_has_fpu)
183 return 1; 182 return xcp->cp0_status & ST0_FR;
184#elif defined(CONFIG_64BIT) && defined(CONFIG_MIPS32_O32) 183#ifdef CONFIG_64BIT
185 return !test_thread_flag(TIF_32BIT_REGS); 184 return !test_thread_flag(TIF_32BIT_REGS);
186#else 185#else
187 return 0; 186 return 0;
@@ -246,7 +245,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
246 */ 245 */
247 emulpc = xcp->cp0_epc + 4; /* Snapshot emulation target */ 246 emulpc = xcp->cp0_epc + 4; /* Snapshot emulation target */
248 247
249 if (__compute_return_epc(xcp) < 0) { 248 if (__compute_return_epc(xcp)) {
250#ifdef CP1DBG 249#ifdef CP1DBG
251 printk("failed to emulate branch at %p\n", 250 printk("failed to emulate branch at %p\n",
252 (void *) (xcp->cp0_epc)); 251 (void *) (xcp->cp0_epc));
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c
index 384a3b0091e..3c4a8c5ba7f 100644
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -12,6 +12,7 @@
12#include <asm/uaccess.h> 12#include <asm/uaccess.h>
13#include <asm/branch.h> 13#include <asm/branch.h>
14#include <asm/mipsregs.h> 14#include <asm/mipsregs.h>
15#include <asm/system.h>
15#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
16 17
17#include <asm/fpu_emulator.h> 18#include <asm/fpu_emulator.h>