aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/csrc-bcm1480.c
diff options
context:
space:
mode:
authorRalf Baechle <ralf@linux-mips.org>2007-10-31 21:57:55 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-11-02 12:13:47 -0400
commit217dd11e9d0442767fa13c9c188be0b92dc93d7e (patch)
tree9557e15fbad397fcc5a707e85cf1a68132ee6c31 /arch/mips/kernel/csrc-bcm1480.c
parentf3f9ad0edcc1b7bf154bb34fe3b3f71e5379c9f0 (diff)
[MIPS] Sibyte: Split and move clock code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/csrc-bcm1480.c')
-rw-r--r--arch/mips/kernel/csrc-bcm1480.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/mips/kernel/csrc-bcm1480.c b/arch/mips/kernel/csrc-bcm1480.c
new file mode 100644
index 00000000000..868745e7184
--- /dev/null
+++ b/arch/mips/kernel/csrc-bcm1480.c
@@ -0,0 +1,54 @@
1/*
2 * Copyright (C) 2000,2001,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18#include <linux/clocksource.h>
19
20#include <asm/addrspace.h>
21#include <asm/io.h>
22#include <asm/time.h>
23
24#include <asm/sibyte/bcm1480_regs.h>
25#include <asm/sibyte/sb1250_regs.h>
26#include <asm/sibyte/bcm1480_int.h>
27#include <asm/sibyte/bcm1480_scd.h>
28
29#include <asm/sibyte/sb1250.h>
30
31static cycle_t bcm1480_hpt_read(void)
32{
33 return (cycle_t) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT));
34}
35
36struct clocksource bcm1480_clocksource = {
37 .name = "zbbus-cycles",
38 .rating = 200,
39 .read = bcm1480_hpt_read,
40 .mask = CLOCKSOURCE_MASK(64),
41 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
42};
43
44void __init sb1480_clocksource_init(void)
45{
46 struct clocksource *cs = &bcm1480_clocksource;
47 unsigned int plldiv;
48 unsigned long zbbus;
49
50 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
51 zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000);
52 clocksource_set_clock(cs, zbbus);
53 clocksource_register(cs);
54}