Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "More hardware support across the field including a bunch of device
  drivers.  The highlight however really are further steps towards
  device tree.

  This has been sitting in -next for ages.  All MIPS _defconfigs have
  been tested to boot or where I don't have hardware available, to at
  least build fine."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (77 commits)
  MIPS: Loongson 1B: Add defconfig
  MIPS: Loongson 1B: Add board support
  MIPS: Netlogic: early console fix
  MIPS: Netlogic: Fix indentation of smpboot.S
  MIPS: Netlogic: remove cpu_has_dc_aliases define for XLP
  MIPS: Netlogic: Remove unused pcibios_fixups
  MIPS: Netlogic: Add XLP SoC devices in FDT
  MIPS: Netlogic: Add IRQ mappings for more devices
  MIPS: Netlogic: USB support for XLP
  MIPS: Netlogic: XLP PCIe controller support.
  MIPS: Netlogic: Platform changes for XLR/XLS I2C
  MIPS: Netlogic: Platform NAND/NOR flash support
  MIPS: Netlogic: Platform changes for XLS USB
  MIPS: Netlogic: Remove NETLOGIC_ prefix
  MIPS: Netlogic: SMP wakeup code update
  MIPS: Netlogic: Update comments in smpboot.S
  MIPS: BCM63XX: Add 96328avng reference board
  MIPS: Expose PCIe drivers for MIPS
  MIPS: BCM63XX: Add PCIe Support for BCM6328
  MIPS: BCM63XX: Move the PCI initialization into its own function
  ...

13 files changed, 458 insertions, 69 deletions

diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
index 6b1b9ad8d85..d03e8799d1c 100644
--- a/arch/mips/bcm63xx/Kconfig
+++ b/arch/mips/bcm63xx/Kconfig
@@ -1,6 +1,10 @@
 menu "CPU support"
         depends on BCM63XX
 
+config BCM63XX_CPU_6328
+        bool "support 6328 CPU"
+        select HW_HAS_PCI
+
 config BCM63XX_CPU_6338
         bool "support 6338 CPU"
         select HW_HAS_PCI
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index 6dfdc69928a..833af72c852 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,5 +1,6 @@
 obj-y           += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
-                   dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o
+                   dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o dev-rng.o \
+                   dev-spi.o dev-uart.o dev-wdt.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 
 obj-y           += boards/
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 2f1773f3fb7..feb05258a4d 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -11,9 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
 #include <linux/ssb/ssb.h>
 #include <asm/addrspace.h>
 #include <bcm63xx_board.h>
@@ -24,7 +21,9 @@
 #include <bcm63xx_dev_pci.h>
 #include <bcm63xx_dev_enet.h>
 #include <bcm63xx_dev_dsp.h>
+#include <bcm63xx_dev_flash.h>
 #include <bcm63xx_dev_pcmcia.h>
+#include <bcm63xx_dev_spi.h>
 #include <board_bcm963xx.h>
 
 #define PFX     "board_bcm963xx: "
@@ -34,6 +33,48 @@ static unsigned int mac_addr_used;
 static struct board_info board;
 
 /*
+ * known 6328 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6328
+static struct board_info __initdata board_96328avng = {
+        .name                           = "96328avng",
+        .expected_cpu_id                = 0x6328,
+
+        .has_uart0                      = 1,
+        .has_pci                        = 1,
+
+        .leds = {
+                {
+                        .name           = "96328avng::ppp-fail",
+                        .gpio           = 2,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "96328avng::power",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "96328avng::power-fail",
+                        .gpio           = 8,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "96328avng::wps",
+                        .gpio           = 9,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "96328avng::ppp",
+                        .gpio           = 11,
+                        .active_low     = 1,
+                },
+        },
+};
+#endif
+
+/*
  * known 6338 boards
  */
 #ifdef CONFIG_BCM63XX_CPU_6338
@@ -592,6 +633,9 @@ static struct board_info __initdata board_DWVS0 = {
  * all boards
  */
 static const struct board_info __initdata *bcm963xx_boards[] = {
+#ifdef CONFIG_BCM63XX_CPU_6328
+        &board_96328avng,
+#endif
 #ifdef CONFIG_BCM63XX_CPU_6338
         &board_96338gw,
         &board_96338w,
@@ -709,9 +753,15 @@ void __init board_prom_init(void)
         char cfe_version[32];
         u32 val;
 
-        /* read base address of boot chip select (0) */
-        val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-        val &= MPI_CSBASE_BASE_MASK;
+        /* read base address of boot chip select (0)
+         * 6328 does not have MPI but boots from a fixed address
+         */
+        if (BCMCPU_IS_6328())
+                val = 0x18000000;
+        else {
+                val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+                val &= MPI_CSBASE_BASE_MASK;
+        }
         boot_addr = (u8 *)KSEG1ADDR(val);
 
         /* dump cfe version */
@@ -808,40 +858,6 @@ void __init board_setup(void)
                 panic("unexpected CPU for bcm963xx board");
 }
 
-static struct mtd_partition mtd_partitions[] = {
-        {
-                .name           = "cfe",
-                .offset         = 0x0,
-                .size           = 0x40000,
-        }
-};
-
-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
-
-static struct physmap_flash_data flash_data = {
-        .width                  = 2,
-        .nr_parts               = ARRAY_SIZE(mtd_partitions),
-        .parts                  = mtd_partitions,
-        .part_probe_types       = bcm63xx_part_types,
-};
-
-static struct resource mtd_resources[] = {
-        {
-                .start          = 0,    /* filled at runtime */
-                .end            = 0,    /* filled at runtime */
-                .flags          = IORESOURCE_MEM,
-        }
-};
-
-static struct platform_device mtd_dev = {
-        .name                   = "physmap-flash",
-        .resource               = mtd_resources,
-        .num_resources          = ARRAY_SIZE(mtd_resources),
-        .dev                    = {
-                .platform_data  = &flash_data,
-        },
-};
-
 static struct gpio_led_platform_data bcm63xx_led_data;
 
 static struct platform_device bcm63xx_gpio_leds = {
@@ -855,8 +871,6 @@ static struct platform_device bcm63xx_gpio_leds = {
  */
 int __init board_register_devices(void)
 {
-        u32 val;
-
         if (board.has_uart0)
                 bcm63xx_uart_register(0);
 
@@ -890,14 +904,9 @@ int __init board_register_devices(void)
         }
 #endif
 
-        /* read base address of boot chip select (0) */
-        val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-        val &= MPI_CSBASE_BASE_MASK;
-
-        mtd_resources[0].start = val;
-        mtd_resources[0].end = 0x1FFFFFFF;
+        bcm63xx_spi_register();
 
-        platform_device_register(&mtd_dev);
+        bcm63xx_flash_register();
 
         bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
         bcm63xx_led_data.leds = board.leds;
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index 9d57c71b7b5..1db48adb543 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -120,7 +120,7 @@ static void enetsw_set(struct clk *clk, int enable)
 {
         if (!BCMCPU_IS_6368())
                 return;
-        bcm_hwclock_set(CKCTL_6368_ROBOSW_CLK_EN |
+        bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
                         CKCTL_6368_SWPKT_USB_EN |
                         CKCTL_6368_SWPKT_SAR_EN, enable);
         if (enable) {
@@ -163,7 +163,7 @@ static void usbh_set(struct clk *clk, int enable)
         if (BCMCPU_IS_6348())
                 bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
         else if (BCMCPU_IS_6368())
-                bcm_hwclock_set(CKCTL_6368_USBH_CLK_EN, enable);
+                bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
 }
 
 static struct clk clk_usbh = {
@@ -181,9 +181,11 @@ static void spi_set(struct clk *clk, int enable)
                 mask = CKCTL_6338_SPI_EN;
         else if (BCMCPU_IS_6348())
                 mask = CKCTL_6348_SPI_EN;
-        else
-                /* BCMCPU_IS_6358 */
+        else if (BCMCPU_IS_6358())
                 mask = CKCTL_6358_SPI_EN;
+        else
+                /* BCMCPU_IS_6368 */
+                mask = CKCTL_6368_SPI_EN;
         bcm_hwclock_set(mask, enable);
 }
 
@@ -199,7 +201,7 @@ static void xtm_set(struct clk *clk, int enable)
         if (!BCMCPU_IS_6368())
                 return;
 
-        bcm_hwclock_set(CKCTL_6368_SAR_CLK_EN |
+        bcm_hwclock_set(CKCTL_6368_SAR_EN |
                         CKCTL_6368_SWPKT_SAR_EN, enable);
 
         if (enable) {
@@ -222,6 +224,18 @@ static struct clk clk_xtm = {
 };
 
 /*
+ * IPsec clock
+ */
+static void ipsec_set(struct clk *clk, int enable)
+{
+        bcm_hwclock_set(CKCTL_6368_IPSEC_EN, enable);
+}
+
+static struct clk clk_ipsec = {
+        .set    = ipsec_set,
+};
+
+/*
  * Internal peripheral clock
  */
 static struct clk clk_periph = {
@@ -278,6 +292,8 @@ struct clk *clk_get(struct device *dev, const char *id)
                 return &clk_periph;
         if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
                 return &clk_pcm;
+        if (BCMCPU_IS_6368() && !strcmp(id, "ipsec"))
+                return &clk_ipsec;
         return ERR_PTR(-ENOENT);
 }
 
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
index 8f0d6c7725e..a7afb289b15 100644
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
@@ -29,6 +29,14 @@ static u16 bcm63xx_cpu_rev;
 static unsigned int bcm63xx_cpu_freq;
 static unsigned int bcm63xx_memory_size;
 
+static const unsigned long bcm6328_regs_base[] = {
+        __GEN_CPU_REGS_TABLE(6328)
+};
+
+static const int bcm6328_irqs[] = {
+        __GEN_CPU_IRQ_TABLE(6328)
+};
+
 static const unsigned long bcm6338_regs_base[] = {
         __GEN_CPU_REGS_TABLE(6338)
 };
@@ -99,6 +107,33 @@ unsigned int bcm63xx_get_memory_size(void)
 static unsigned int detect_cpu_clock(void)
 {
         switch (bcm63xx_get_cpu_id()) {
+        case BCM6328_CPU_ID:
+        {
+                unsigned int tmp, mips_pll_fcvo;
+
+                tmp = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+                mips_pll_fcvo = (tmp & STRAPBUS_6328_FCVO_MASK)
+                                >> STRAPBUS_6328_FCVO_SHIFT;
+
+                switch (mips_pll_fcvo) {
+                case 0x12:
+                case 0x14:
+                case 0x19:
+                        return 160000000;
+                case 0x1c:
+                        return 192000000;
+                case 0x13:
+                case 0x15:
+                        return 200000000;
+                case 0x1a:
+                        return 384000000;
+                case 0x16:
+                        return 400000000;
+                default:
+                        return 320000000;
+                }
+
+        }
         case BCM6338_CPU_ID:
                 /* BCM6338 has a fixed 240 Mhz frequency */
                 return 240000000;
@@ -170,6 +205,9 @@ static unsigned int detect_memory_size(void)
         unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
         u32 val;
 
+        if (BCMCPU_IS_6328())
+                return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+
         if (BCMCPU_IS_6345()) {
                 val = bcm_sdram_readl(SDRAM_MBASE_REG);
                 return (val * 8 * 1024 * 1024);
@@ -228,17 +266,26 @@ void __init bcm63xx_cpu_init(void)
                 bcm63xx_irqs = bcm6345_irqs;
                 break;
         case CPU_BMIPS4350:
-                switch (read_c0_prid() & 0xf0) {
-                case 0x10:
+                if ((read_c0_prid() & 0xf0) == 0x10) {
                         expected_cpu_id = BCM6358_CPU_ID;
                         bcm63xx_regs_base = bcm6358_regs_base;
                         bcm63xx_irqs = bcm6358_irqs;
-                        break;
-                case 0x30:
-                        expected_cpu_id = BCM6368_CPU_ID;
-                        bcm63xx_regs_base = bcm6368_regs_base;
-                        bcm63xx_irqs = bcm6368_irqs;
-                        break;
+                } else {
+                        /* all newer chips have the same chip id location */
+                        u16 chip_id = bcm_readw(BCM_6368_PERF_BASE);
+
+                        switch (chip_id) {
+                        case BCM6328_CPU_ID:
+                                expected_cpu_id = BCM6328_CPU_ID;
+                                bcm63xx_regs_base = bcm6328_regs_base;
+                                bcm63xx_irqs = bcm6328_irqs;
+                                break;
+                        case BCM6368_CPU_ID:
+                                expected_cpu_id = BCM6368_CPU_ID;
+                                bcm63xx_regs_base = bcm6368_regs_base;
+                                bcm63xx_irqs = bcm6368_irqs;
+                                break;
+                        }
                 }
                 break;
         }
diff --git a/arch/mips/bcm63xx/dev-dsp.c b/arch/mips/bcm63xx/dev-dsp.c
index da46d1d3c77..5bb5b154c9b 100644
--- a/arch/mips/bcm63xx/dev-dsp.c
+++ b/arch/mips/bcm63xx/dev-dsp.c
@@ -31,7 +31,7 @@ static struct resource voip_dsp_resources[] = {
 
 static struct platform_device bcm63xx_voip_dsp_device = {
         .name           = "bcm63xx-voip-dsp",
-        .id             = 0,
+        .id             = -1,
         .num_resources  = ARRAY_SIZE(voip_dsp_resources),
         .resource       = voip_dsp_resources,
 };
diff --git a/arch/mips/bcm63xx/dev-flash.c b/arch/mips/bcm63xx/dev-flash.c
new file mode 100644
index 00000000000..58371c7deac
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -0,0 +1,123 @@
+/*
+ * Broadcom BCM63xx flash registration
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_flash.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+
+static struct mtd_partition mtd_partitions[] = {
+        {
+                .name           = "cfe",
+                .offset         = 0x0,
+                .size           = 0x40000,
+        }
+};
+
+static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
+
+static struct physmap_flash_data flash_data = {
+        .width                  = 2,
+        .parts                  = mtd_partitions,
+        .part_probe_types       = bcm63xx_part_types,
+};
+
+static struct resource mtd_resources[] = {
+        {
+                .start          = 0,    /* filled at runtime */
+                .end            = 0,    /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device mtd_dev = {
+        .name                   = "physmap-flash",
+        .resource               = mtd_resources,
+        .num_resources          = ARRAY_SIZE(mtd_resources),
+        .dev                    = {
+                .platform_data  = &flash_data,
+        },
+};
+
+static int __init bcm63xx_detect_flash_type(void)
+{
+        u32 val;
+
+        switch (bcm63xx_get_cpu_id()) {
+        case BCM6328_CPU_ID:
+                val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+                if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+                        return BCM63XX_FLASH_TYPE_SERIAL;
+                else
+                        return BCM63XX_FLASH_TYPE_NAND;
+        case BCM6338_CPU_ID:
+        case BCM6345_CPU_ID:
+        case BCM6348_CPU_ID:
+                /* no way to auto detect so assume parallel */
+                return BCM63XX_FLASH_TYPE_PARALLEL;
+        case BCM6358_CPU_ID:
+                val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
+                if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
+                        return BCM63XX_FLASH_TYPE_PARALLEL;
+                else
+                        return BCM63XX_FLASH_TYPE_SERIAL;
+        case BCM6368_CPU_ID:
+                val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
+                switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+                case STRAPBUS_6368_BOOT_SEL_NAND:
+                        return BCM63XX_FLASH_TYPE_NAND;
+                case STRAPBUS_6368_BOOT_SEL_SERIAL:
+                        return BCM63XX_FLASH_TYPE_SERIAL;
+                case STRAPBUS_6368_BOOT_SEL_PARALLEL:
+                        return BCM63XX_FLASH_TYPE_PARALLEL;
+                }
+        default:
+                return -EINVAL;
+        }
+}
+
+int __init bcm63xx_flash_register(void)
+{
+        int flash_type;
+        u32 val;
+
+        flash_type = bcm63xx_detect_flash_type();
+
+        switch (flash_type) {
+        case BCM63XX_FLASH_TYPE_PARALLEL:
+                /* read base address of boot chip select (0) */
+                val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+                val &= MPI_CSBASE_BASE_MASK;
+
+                mtd_resources[0].start = val;
+                mtd_resources[0].end = 0x1FFFFFFF;
+
+                return platform_device_register(&mtd_dev);
+        case BCM63XX_FLASH_TYPE_SERIAL:
+                pr_warn("unsupported serial flash detected\n");
+                return -ENODEV;
+        case BCM63XX_FLASH_TYPE_NAND:
+                pr_warn("unsupported NAND flash detected\n");
+                return -ENODEV;
+        default:
+                pr_err("flash detection failed for BCM%x: %d\n",
+                       bcm63xx_get_cpu_id(), flash_type);
+                return -ENODEV;
+        }
+}
diff --git a/arch/mips/bcm63xx/dev-rng.c b/arch/mips/bcm63xx/dev-rng.c
new file mode 100644
index 00000000000..d277b4dc6c6
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-rng.c
@@ -0,0 +1,40 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011 Florian Fainelli <florian@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <bcm63xx_cpu.h>
+
+static struct resource rng_resources[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device bcm63xx_rng_device = {
+        .name           = "bcm63xx-rng",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(rng_resources),
+        .resource       = rng_resources,
+};
+
+int __init bcm63xx_rng_register(void)
+{
+        if (!BCMCPU_IS_6368())
+                return -ENODEV;
+
+        rng_resources[0].start = bcm63xx_regset_address(RSET_RNG);
+        rng_resources[0].end = rng_resources[0].start;
+        rng_resources[0].end += RSET_RNG_SIZE - 1;
+
+        return platform_device_register(&bcm63xx_rng_device);
+}
+arch_initcall(bcm63xx_rng_register);
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
new file mode 100644
index 00000000000..e39f73048d4
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -0,0 +1,119 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/export.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_spi.h>
+#include <bcm63xx_regs.h>
+
+#ifdef BCMCPU_RUNTIME_DETECT
+/*
+ * register offsets
+ */
+static const unsigned long bcm6338_regs_spi[] = {
+        __GEN_SPI_REGS_TABLE(6338)
+};
+
+static const unsigned long bcm6348_regs_spi[] = {
+        __GEN_SPI_REGS_TABLE(6348)
+};
+
+static const unsigned long bcm6358_regs_spi[] = {
+        __GEN_SPI_REGS_TABLE(6358)
+};
+
+static const unsigned long bcm6368_regs_spi[] = {
+        __GEN_SPI_REGS_TABLE(6368)
+};
+
+const unsigned long *bcm63xx_regs_spi;
+EXPORT_SYMBOL(bcm63xx_regs_spi);
+
+static __init void bcm63xx_spi_regs_init(void)
+{
+        if (BCMCPU_IS_6338())
+                bcm63xx_regs_spi = bcm6338_regs_spi;
+        if (BCMCPU_IS_6348())
+                bcm63xx_regs_spi = bcm6348_regs_spi;
+        if (BCMCPU_IS_6358())
+                bcm63xx_regs_spi = bcm6358_regs_spi;
+        if (BCMCPU_IS_6368())
+                bcm63xx_regs_spi = bcm6368_regs_spi;
+}
+#else
+static __init void bcm63xx_spi_regs_init(void) { }
+#endif
+
+static struct resource spi_resources[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct bcm63xx_spi_pdata spi_pdata = {
+        .bus_num                = 0,
+        .num_chipselect         = 8,
+};
+
+static struct platform_device bcm63xx_spi_device = {
+        .name           = "bcm63xx-spi",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(spi_resources),
+        .resource       = spi_resources,
+        .dev            = {
+                .platform_data = &spi_pdata,
+        },
+};
+
+int __init bcm63xx_spi_register(void)
+{
+        struct clk *periph_clk;
+
+        if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
+                return -ENODEV;
+
+        periph_clk = clk_get(NULL, "periph");
+        if (IS_ERR(periph_clk)) {
+                pr_err("unable to get periph clock\n");
+                return -ENODEV;
+        }
+
+        /* Set bus frequency */
+        spi_pdata.speed_hz = clk_get_rate(periph_clk);
+
+        spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+        spi_resources[0].end = spi_resources[0].start;
+        spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
+
+        if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+                spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
+                spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
+        }
+
+        if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
+                spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+                spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
+        }
+
+        bcm63xx_spi_regs_init();
+
+        return platform_device_register(&bcm63xx_spi_device);
+}
diff --git a/arch/mips/bcm63xx/dev-wdt.c b/arch/mips/bcm63xx/dev-wdt.c
index 3e6c716a4c1..2a2346a99bc 100644
--- a/arch/mips/bcm63xx/dev-wdt.c
+++ b/arch/mips/bcm63xx/dev-wdt.c
@@ -21,7 +21,7 @@ static struct resource wdt_resources[] = {
 
 static struct platform_device bcm63xx_wdt_device = {
         .name           = "bcm63xx-wdt",
-        .id             = 0,
+        .id             = -1,
         .num_resources  = ARRAY_SIZE(wdt_resources),
         .resource       = wdt_resources,
 };
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index 9a216a451d9..18e051ad18a 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -27,6 +27,17 @@ static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
 static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
 
 #ifndef BCMCPU_RUNTIME_DETECT
+#ifdef CONFIG_BCM63XX_CPU_6328
+#define irq_stat_reg            PERF_IRQSTAT_6328_REG
+#define irq_mask_reg            PERF_IRQMASK_6328_REG
+#define irq_bits                64
+#define is_ext_irq_cascaded     1
+#define ext_irq_start           (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
+#define ext_irq_end             (BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
+#define ext_irq_count           4
+#define ext_irq_cfg_reg1        PERF_EXTIRQ_CFG_REG_6328
+#define ext_irq_cfg_reg2        0
+#endif
 #ifdef CONFIG_BCM63XX_CPU_6338
 #define irq_stat_reg            PERF_IRQSTAT_6338_REG
 #define irq_mask_reg            PERF_IRQMASK_6338_REG
@@ -118,6 +129,16 @@ static void bcm63xx_init_irq(void)
         irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
 
         switch (bcm63xx_get_cpu_id()) {
+        case BCM6328_CPU_ID:
+                irq_stat_addr += PERF_IRQSTAT_6328_REG;
+                irq_mask_addr += PERF_IRQMASK_6328_REG;
+                irq_bits = 64;
+                ext_irq_count = 4;
+                is_ext_irq_cascaded = 1;
+                ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+                ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+                ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
+                break;
         case BCM6338_CPU_ID:
                 irq_stat_addr += PERF_IRQSTAT_6338_REG;
                 irq_mask_addr += PERF_IRQMASK_6338_REG;
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index 99d7f405cbe..10eaff45807 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -26,7 +26,9 @@ void __init prom_init(void)
         bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
 
         /* disable all hardware blocks clock for now */
-        if (BCMCPU_IS_6338())
+        if (BCMCPU_IS_6328())
+                mask = CKCTL_6328_ALL_SAFE_EN;
+        else if (BCMCPU_IS_6338())
                 mask = CKCTL_6338_ALL_SAFE_EN;
         else if (BCMCPU_IS_6345())
                 mask = CKCTL_6345_ALL_SAFE_EN;
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 356b05583e1..0e74a13639c 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -68,6 +68,9 @@ void bcm63xx_machine_reboot(void)
 
         /* mask and clear all external irq */
         switch (bcm63xx_get_cpu_id()) {
+        case BCM6328_CPU_ID:
+                perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
+                break;
         case BCM6338_CPU_ID:
                 perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
                 break;
@@ -95,9 +98,13 @@ void bcm63xx_machine_reboot(void)
                 bcm6348_a1_reboot();
 
         printk(KERN_INFO "triggering watchdog soft-reset...\n");
-        reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
-        reg |= SYS_PLL_SOFT_RESET;
-        bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
+        if (BCMCPU_IS_6328()) {
+                bcm_wdt_writel(1, WDT_SOFTRESET_REG);
+        } else {
+                reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+                reg |= SYS_PLL_SOFT_RESET;
+                bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
+        }
         while (1)
                 ;
 }