Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits)
  m68knommu: fix broken setting of irq_chip and handler
  m68knommu: switch to using -mcpu= flags for ColdFire targets
  m68knommu: arch/m68knommu/Kconfig whitespace cleanup
  m68knommu: create optimal separate instruction and data cache for ColdFire
  m68knommu: support ColdFire caches that do copyback and write-through
  m68knommu: support version 2 ColdFire split cache
  m68knommu: make cache push code ColdFire generic
  m68knommu: clean up ColdFire cache control code
  m68knommu: move inclusion of ColdFire v4 cache registers
  m68knommu: merge bit definitions for version 3 ColdFire cache controller
  m68knommu: create bit definitions for the version 2 ColdFire cache controller
  m68knommu: remove empty __iounmap() it is no used
  m68knommu: remove kernel_map() code, it is not used
  m68knommu: remove do_page_fault(), it is not used
  m68knommu: use user stack pointer hardware on some ColdFire cores
  m68knommu: remove command line printing DEBUG
  m68knommu: remove fasthandler interrupt code
  m68knommu: move UART addressing to part specific includes
  m68knommu: fix clock rate value reported for ColdFire 54xx parts
  m68knommu: move ColdFire CPU names into their headers
  ...

14 files changed, 212 insertions, 243 deletions

diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index fa9f746cf4a..704e7b92334 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -75,6 +75,16 @@ config GENERIC_CLOCKEVENTS
 config NO_IOPORT
         def_bool y
 
+config COLDFIRE_SW_A7
+        bool
+        default n
+
+config HAVE_CACHE_SPLIT
+        bool
+
+config HAVE_CACHE_CB
+        bool
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
@@ -107,69 +117,90 @@ config M68360
 
 config M5206
         bool "MCF5206"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206 processor support.
 
 config M5206e
         bool "MCF5206e"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5206e processor support.
 
 config M520x
         bool "MCF520x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
            Freescale Coldfire 5207/5208 processor support.
 
 config M523x
         bool "MCF523x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Freescale Coldfire 5230/1/2/4/5 processor support
 
 config M5249
         bool "MCF5249"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5249 processor support.
 
 config M5271
         bool "MCF5271"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5270/5271 processor support.
 
 config M5272
         bool "MCF5272"
+        select COLDFIRE_SW_A7
         help
           Motorola ColdFire 5272 processor support.
 
 config M5275
         bool "MCF5275"
+        select HAVE_CACHE_SPLIT
         help
           Freescale (Motorola) ColdFire 5274/5275 processor support.
 
 config M528x
         bool "MCF528x"
         select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
         help
           Motorola ColdFire 5280/5282 processor support.
 
 config M5307
         bool "MCF5307"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5307 processor support.
 
 config M532x
         bool "MCF532x"
+        select HAVE_CACHE_CB
         help
           Freescale (Motorola) ColdFire 532x processor support.
 
 config M5407
         bool "MCF5407"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
         help
           Motorola ColdFire 5407 processor support.
 
+config M547x
+        bool "MCF547x"
+        select HAVE_CACHE_CB
+        help
+          Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
+
 config M548x
         bool "MCF548x"
+        select HAVE_CACHE_CB
         help
           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 
@@ -181,9 +212,14 @@ config M527x
         select GENERIC_CLOCKEVENTS
         default y
 
+config M54xx
+        bool
+        depends on (M548x || M547x)
+        default y
+
 config COLDFIRE
         bool
-        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M548x)
+        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         default y
@@ -230,6 +266,46 @@ config OLDMASK
           Build support for the older revision ColdFire 5307 silicon.
           Specifically this is the 1H55J mask revision.
 
+if HAVE_CACHE_SPLIT
+choice
+        prompt "Split Cache Configuration"
+        default CACHE_I
+
+config CACHE_I
+        bool "Instruction"
+        help
+          Use all of the ColdFire CPU cache memory as an instruction cache.
+
+config CACHE_D
+        bool "Data"
+        help
+          Use all of the ColdFire CPU cache memory as a data cache.
+
+config CACHE_BOTH
+        bool "Both"
+        help
+          Split the ColdFire CPU cache, and use half as an instruction cache
+          and half as a data cache.
+endchoice
+endif
+
+if HAVE_CACHE_CB
+choice
+        prompt "Data cache mode"
+        default CACHE_WRITETHRU
+
+config CACHE_WRITETHRU
+        bool "Write-through"
+        help
+          The ColdFire CPU cache is set into Write-through mode.
+
+config CACHE_COPYBACK
+        bool "Copy-back"
+        help
+          The ColdFire CPU cache is set into Copy-back mode.
+endchoice
+endif
+
 comment "Platform"
 
 config PILOT3
@@ -245,16 +321,16 @@ config XCOPILOT_BUGS
           Support the bugs of Xcopilot.
 
 config UC5272
-        bool 'Arcturus Networks uC5272 dimm board support'
-        depends on M5272
-        help
-          Support for the Arcturus Networks uC5272 dimm board.
+        bool 'Arcturus Networks uC5272 dimm board support'
+        depends on M5272
+        help
+          Support for the Arcturus Networks uC5272 dimm board.
 
 config UC5282
-       bool "Arcturus Networks uC5282 board support"
-          depends on M528x
-       help
-          Support for the Arcturus Networks uC5282 dimm board.
+        bool "Arcturus Networks uC5282 board support"
+        depends on M528x
+        help
+          Support for the Arcturus Networks uC5282 dimm board.
 
 config UCSIMM
         bool "uCsimm module support"
@@ -279,7 +355,7 @@ config DIRECT_IO_ACCESS
         depends on (UCSIMM || UCDIMM || DRAGEN2)
         help
           Disable the CPU internal registers protection in user mode,
-          to allow a user application to read/write them.
+          to allow a user application to read/write them.
 
 config INIT_LCD
         bool "Initialize LCD"
@@ -517,7 +593,7 @@ config EMAC_INC
         depends on (SOM5282EM)
 
 config SNEHA
-        bool
+        bool
         default y
         depends on CPU16B
 
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index 026ef16fa68..589613fed31 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -25,7 +25,7 @@ platform-$(CONFIG_M528x)	:= 528x
 platform-$(CONFIG_M5307)        := 5307
 platform-$(CONFIG_M532x)        := 532x
 platform-$(CONFIG_M5407)        := 5407
-platform-$(CONFIG_M548x)        := 548x
+platform-$(CONFIG_M54xx)        := 54xx
 PLATFORM := $(platform-y)
 
 board-$(CONFIG_PILOT)           := pilot
@@ -74,7 +74,7 @@ cpuclass-$(CONFIG_M528x)	:= coldfire
 cpuclass-$(CONFIG_M5307)        := coldfire
 cpuclass-$(CONFIG_M532x)        := coldfire
 cpuclass-$(CONFIG_M5407)        := coldfire
-cpuclass-$(CONFIG_M548x)        := coldfire
+cpuclass-$(CONFIG_M54xx)        := coldfire
 cpuclass-$(CONFIG_M68328)       := 68328
 cpuclass-$(CONFIG_M68EZ328)     := 68328
 cpuclass-$(CONFIG_M68VZ328)     := 68328
@@ -91,18 +91,18 @@ export PLATFORM BOARD MODEL CPUCLASS
 # Some CFLAG additions based on specific CPU type.
 #
 cflags-$(CONFIG_M5206)          := $(call cc-option,-mcpu=5206,-m5200)
-cflags-$(CONFIG_M5206e)         := $(call cc-option,-m5206e,-m5200)
+cflags-$(CONFIG_M5206e)         := $(call cc-option,-mcpu=5206e,-m5200)
 cflags-$(CONFIG_M520x)          := $(call cc-option,-mcpu=5208,-m5200)
 cflags-$(CONFIG_M523x)          := $(call cc-option,-mcpu=523x,-m5307)
 cflags-$(CONFIG_M5249)          := $(call cc-option,-mcpu=5249,-m5200)
 cflags-$(CONFIG_M5271)          := $(call cc-option,-mcpu=5271,-m5307)
 cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5272,-m5307)
 cflags-$(CONFIG_M5275)          := $(call cc-option,-mcpu=5275,-m5307)
-cflags-$(CONFIG_M528x)          := $(call cc-option,-m528x,-m5307)
-cflags-$(CONFIG_M5307)          := $(call cc-option,-m5307,-m5200)
+cflags-$(CONFIG_M528x)          := $(call cc-option,-mcpu=528x,-m5307)
+cflags-$(CONFIG_M5307)          := $(call cc-option,-mcpu=5307,-m5200)
 cflags-$(CONFIG_M532x)          := $(call cc-option,-mcpu=532x,-m5307)
-cflags-$(CONFIG_M5407)          := $(call cc-option,-m5407,-m5200)
-cflags-$(CONFIG_M548x)          := $(call cc-option,-m5407,-m5200)
+cflags-$(CONFIG_M5407)          := $(call cc-option,-mcpu=5407,-m5200)
+cflags-$(CONFIG_M54xx)          := $(call cc-option,-mcpu=5475,-m5200)
 cflags-$(CONFIG_M68328)         := -m68000
 cflags-$(CONFIG_M68EZ328)       := -m68000
 cflags-$(CONFIG_M68VZ328)       := -m68000
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index c684adf5dc4..16b2de7f510 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -55,55 +55,29 @@ void (*mach_halt)(void);
 void (*mach_power_off)(void);
 
 #ifdef CONFIG_M68328
-        #define CPU "MC68328"
+#define CPU_NAME        "MC68328"
 #endif
 #ifdef CONFIG_M68EZ328
-        #define CPU "MC68EZ328"
+#define CPU_NAME        "MC68EZ328"
 #endif
 #ifdef CONFIG_M68VZ328
-        #define CPU "MC68VZ328"
+#define CPU_NAME        "MC68VZ328"
 #endif
 #ifdef CONFIG_M68360
-        #define CPU "MC68360"
+#define CPU_NAME        "MC68360"
 #endif
-#if defined(CONFIG_M5206)
-        #define CPU "COLDFIRE(m5206)"
+#ifndef CPU_NAME
+#define CPU_NAME        "UNKNOWN"
 #endif
-#if defined(CONFIG_M5206e)
-        #define CPU "COLDFIRE(m5206e)"
-#endif
-#if defined(CONFIG_M520x)
-        #define CPU "COLDFIRE(m520x)"
-#endif
-#if defined(CONFIG_M523x)
-        #define CPU "COLDFIRE(m523x)"
-#endif
-#if defined(CONFIG_M5249)
-        #define CPU "COLDFIRE(m5249)"
-#endif
-#if defined(CONFIG_M5271)
-        #define CPU "COLDFIRE(m5270/5271)"
-#endif
-#if defined(CONFIG_M5272)
-        #define CPU "COLDFIRE(m5272)"
-#endif
-#if defined(CONFIG_M5275)
-        #define CPU "COLDFIRE(m5274/5275)"
-#endif
-#if defined(CONFIG_M528x)
-        #define CPU "COLDFIRE(m5280/5282)"
-#endif
-#if defined(CONFIG_M5307)
-        #define CPU "COLDFIRE(m5307)"
-#endif
-#if defined(CONFIG_M532x)
-        #define CPU "COLDFIRE(m532x)"
-#endif
-#if defined(CONFIG_M5407)
-        #define CPU "COLDFIRE(m5407)"
-#endif
-#ifndef CPU
-        #define CPU "UNKNOWN"
+
+/*
+ * Different cores have different instruction execution timings.
+ * The old/traditional 68000 cores are basically all the same, at 16.
+ * The ColdFire cores vary a little, their values are defined in their
+ * headers. We default to the standard 68000 value here.
+ */
+#ifndef CPU_INSTR_PER_JIFFY
+#define CPU_INSTR_PER_JIFFY     16
 #endif
 
 extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
@@ -208,7 +182,7 @@ void __init setup_arch(char **cmdline_p)
         command_line[sizeof(command_line) - 1] = 0;
 #endif /* CONFIG_UBOOT */
 
-        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n");
+        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
 
 #ifdef CONFIG_UCDIMM
         printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
@@ -257,11 +231,6 @@ void __init setup_arch(char **cmdline_p)
         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
         boot_command_line[COMMAND_LINE_SIZE-1] = 0;
 
-#ifdef DEBUG
-        if (strlen(*cmdline_p))
-                printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
-#endif
-
 #if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
         conswitchp = &dummy_con;
 #endif
@@ -303,15 +272,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         char *cpu, *mmu, *fpu;
         u_long clockfreq;
 
-        cpu = CPU;
+        cpu = CPU_NAME;
         mmu = "none";
         fpu = "none";
-
-#ifdef CONFIG_COLDFIRE
-        clockfreq = (loops_per_jiffy * HZ) * 3;
-#else
-        clockfreq = (loops_per_jiffy * HZ) * 16;
-#endif
+        clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
 
         seq_printf(m, "CPU:\t\t%s\n"
                       "MMU:\t\t%s\n"
diff --git a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile
index fc91f254f51..b54ab6b4b52 100644
--- a/arch/m68knommu/mm/Makefile
+++ b/arch/m68knommu/mm/Makefile
@@ -2,4 +2,4 @@
 # Makefile for the linux m68knommu specific parts of the memory manager.
 #
 
-obj-y += init.o fault.o memory.o kmap.o
+obj-y += init.o kmap.o
diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c
deleted file mode 100644
index bc05cf74d9c..00000000000
--- a/arch/m68knommu/mm/fault.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/fault.c
- *
- *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
- *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/fault.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/ptrace.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-
-extern void die_if_kernel(char *, struct pt_regs *, long);
-
-/*
- * This routine handles page faults.  It determines the problem, and
- * then passes it off to one of the appropriate routines.
- *
- * error_code:
- *      bit 0 == 0 means no page found, 1 means protection fault
- *      bit 1 == 0 means read, 1 means write
- *
- * If this routine detects a bad access, it returns 1, otherwise it
- * returns 0.
- */
-asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
-                              unsigned long error_code)
-{
-#ifdef DEBUG
-        printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n",
-                regs->sr, regs->pc, address, error_code);
-#endif
-
-        /*
-         * Oops. The kernel tried to access some bad page. We'll have to
-         * terminate things with extreme prejudice.
-         */
-        if ((unsigned long) address < PAGE_SIZE)
-                printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
-        else
-                printk(KERN_ALERT "Unable to handle kernel access");
-        printk(KERN_ALERT " at virtual address %08lx\n", address);
-        die_if_kernel("Oops", regs, error_code);
-        do_exit(SIGKILL);
-
-        return 1;
-}
-
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c
index 902c1dfda9e..ece8d5ad4e6 100644
--- a/arch/m68knommu/mm/kmap.c
+++ b/arch/m68knommu/mm/kmap.c
@@ -36,15 +36,6 @@ void iounmap(void *addr)
 }
 
 /*
- * __iounmap unmaps nearly everything, so be careful
- * it doesn't free currently pointer/page tables anymore but it
- * wans't used anyway and might be added later.
- */
-void __iounmap(void *addr, unsigned long size)
-{
-}
-
-/*
  * Set new cache mode for some kernel address space.
  * The caller must push data for that range itself, if such data may already
  * be in the cache.
diff --git a/arch/m68knommu/mm/memory.c b/arch/m68knommu/mm/memory.c
deleted file mode 100644
index 8f7949e786d..00000000000
--- a/arch/m68knommu/mm/memory.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  linux/arch/m68knommu/mm/memory.c
- *
- *  Copyright (C) 1998  Kenneth Albanowski <kjahds@kjahds.com>,
- *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
- *
- *  Based on:
- *
- *  linux/arch/m68k/mm/memory.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/types.h>
-
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-/*
- * Map some physical address range into the kernel address space.
- */
-
-unsigned long kernel_map(unsigned long paddr, unsigned long size,
-                         int nocacheflag, unsigned long *memavailp )
-{
-        return paddr;
-}
-
diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile
index e6035e7a2d3..e6035e7a2d3 100644
--- a/arch/m68knommu/platform/548x/Makefile
+++ b/arch/m68knommu/platform/54xx/Makefile
diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c
index 9888846bd1c..78130984db9 100644
--- a/arch/m68knommu/platform/548x/config.c
+++ b/arch/m68knommu/platform/54xx/config.c
@@ -1,7 +1,7 @@
 /***************************************************************************/
 
 /*
- *      linux/arch/m68knommu/platform/548x/config.c
+ *      linux/arch/m68knommu/platform/54xx/config.c
  *
  *      Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
  */
@@ -15,13 +15,13 @@
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
-#include <asm/m548xsim.h>
+#include <asm/m54xxsim.h>
 #include <asm/mcfuart.h>
-#include <asm/m548xgpt.h>
+#include <asm/m54xxgpt.h>
 
 /***************************************************************************/
 
-static struct mcf_platform_uart m548x_uart_platform[] = {
+static struct mcf_platform_uart m54xx_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
                 .irq            = 64 + 35,
@@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = {
         },
 };
 
-static struct platform_device m548x_uart = {
+static struct platform_device m54xx_uart = {
         .name                   = "mcfuart",
         .id                     = 0,
-        .dev.platform_data      = m548x_uart_platform,
+        .dev.platform_data      = m54xx_uart_platform,
 };
 
-static struct platform_device *m548x_devices[] __initdata = {
-        &m548x_uart,
+static struct platform_device *m54xx_devices[] __initdata = {
+        &m54xx_uart,
 };
 
 
 /***************************************************************************/
 
-static void __init m548x_uart_init_line(int line, int irq)
+static void __init m54xx_uart_init_line(int line, int irq)
 {
         int rts_cts;
 
@@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq)
                                                 MCF_MBAR + MCF_PAR_PSC(line));
 }
 
-static void __init m548x_uarts_init(void)
+static void __init m54xx_uarts_init(void)
 {
-        const int nrlines = ARRAY_SIZE(m548x_uart_platform);
+        const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
         int line;
 
         for (line = 0; (line < nrlines); line++)
-                m548x_uart_init_line(line, m548x_uart_platform[line].irq);
+                m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
 }
 
 /***************************************************************************/
 
-static void mcf548x_reset(void)
+static void mcf54xx_reset(void)
 {
         /* disable interrupts and enable the watchdog */
         asm("movew #0x2700, %sr\n");
@@ -97,8 +97,8 @@ static void mcf548x_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mach_reset = mcf548x_reset;
-        m548x_uarts_init();
+        mach_reset = mcf54xx_reset;
+        m54xx_uarts_init();
 }
 
 /***************************************************************************/
@@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
 
-        platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices));
+        platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
         return 0;
 }
 
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 865852806a1..2a3af193ccd 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -179,8 +179,8 @@ void __init init_IRQ(void)
         IMR = ~0;
 
         for (i = 0; (i < NR_IRQS); i++) {
-                set_irq_chip(irq, &intc_irq_chip);
-                set_irq_handler(irq, handle_level_irq);
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
         }
 }
 
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index 45f501fa452..a8967baabd7 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -14,7 +14,7 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-$(CONFIG_COLDFIRE)  += clk.o dma.o entry.o vectors.o
+obj-$(CONFIG_COLDFIRE)  += cache.o clk.o dma.o entry.o vectors.o
 obj-$(CONFIG_M5206)     += timers.o intc.o
 obj-$(CONFIG_M5206e)    += timers.o intc.o
 obj-$(CONFIG_M520x)     += pit.o intc-simr.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_M528x)	+= pit.o intc-2.o
 obj-$(CONFIG_M5307)     += timers.o intc.o
 obj-$(CONFIG_M532x)     += timers.o intc-simr.o
 obj-$(CONFIG_M5407)     += timers.o intc.o
-obj-$(CONFIG_M548x)     += sltimers.o intc-2.o
+obj-$(CONFIG_M54xx)     += sltimers.o intc-2.o
 
 obj-y                   += pinmux.o gpio.o
 extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c
new file mode 100644
index 00000000000..235d3c4f4f0
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
+/***************************************************************************/
+
+/*
+ *      cache.c -- general ColdFire Cache maintainence code
+ *
+ *      Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+#ifdef CACHE_PUSH
+/***************************************************************************/
+
+/*
+ *      Use cpushl to push all dirty cache lines back to memory.
+ *      Older versions of GAS don't seem to know how to generate the
+ *      ColdFire cpushl instruction... Oh well, bit stuff it for now.
+ */
+
+void mcf_cache_push(void)
+{
+        __asm__ __volatile__ (
+                "clrl   %%d0\n\t"
+                "1:\n\t"
+                "movel  %%d0,%%a0\n\t"
+                "2:\n\t"
+                ".word  0xf468\n\t"
+                "addl   %0,%%a0\n\t"
+                "cmpl   %1,%%a0\n\t"
+                "blt    2b\n\t"
+                "addql  #1,%%d0\n\t"
+                "cmpil  %2,%%d0\n\t"
+                "bne    1b\n\t"
+                : /* No output */
+                : "i" (CACHE_LINE_SIZE),
+                  "i" (DCACHE_SIZE / CACHE_WAYS),
+                  "i" (CACHE_WAYS)
+                : "d0", "a0" );
+}
+
+/***************************************************************************/
+#endif /* CACHE_PUSH */
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index e1debc8285e..4ddfc3da70d 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -36,13 +36,16 @@
 #include <asm/asm-offsets.h>
 #include <asm/entry.h>
 
+#ifdef CONFIG_COLDFIRE_SW_A7
+/*
+ *      Define software copies of the supervisor and user stack pointers.
+ */
 .bss
-
 sw_ksp:
 .long   0
-
 sw_usp:
 .long   0
+#endif /* CONFIG_COLDFIRE_SW_A7 */
 
 .text
 
@@ -51,7 +54,6 @@ sw_usp:
 .globl ret_from_exception
 .globl ret_from_signal
 .globl sys_call_table
-.globl ret_from_interrupt
 .globl inthandler
 .globl fasthandler
 
@@ -140,20 +142,7 @@ Luser_return:
         jne     Lwork_to_do             /* still work to do */
 
 Lreturn:
-        move    #0x2700,%sr             /* disable intrs */
-        movel   sw_usp,%a0              /* get usp */
-        movel   %sp@(PT_OFF_PC),%a0@-   /* copy exception program counter */
-        movel   %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */
-        moveml  %sp@,%d1-%d5/%a0-%a2
-        lea     %sp@(32),%sp            /* space for 8 regs */
-        movel   %sp@+,%d0
-        addql   #4,%sp                  /* orig d0 */
-        addl    %sp@+,%sp               /* stk adj */
-        addql   #8,%sp                  /* remove exception */
-        movel   %sp,sw_ksp              /* save ksp */
-        subql   #8,sw_usp               /* set exception */
-        movel   sw_usp,%sp              /* restore usp */
-        rte
+        RESTORE_USER
 
 Lwork_to_do:
         movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
@@ -191,31 +180,7 @@ ENTRY(inthandler)
         jbsr    do_IRQ                  /* call high level irq handler */
         lea     %sp@(8),%sp             /* pop args off stack */
 
-        bra     ret_from_interrupt      /* this was fallthrough */
-
-/*
- * This is the fast interrupt handler (for certain hardware interrupt
- * sources). Unlike the normal interrupt handler it just uses the
- * current stack (doesn't care if it is user or kernel). It also
- * doesn't bother doing the bottom half handlers.
- */
-ENTRY(fasthandler)
-        SAVE_LOCAL
-
-        movew   %sp@(PT_OFF_FORMATVEC),%d0
-        andl    #0x03fc,%d0             /* mask out vector only */
-
-        movel   %sp,%sp@-               /* push regs arg */
-        lsrl    #2,%d0                  /* calculate real vector # */
-        movel   %d0,%sp@-               /* push vector number */
-        jbsr    do_IRQ                  /* call high level irq handler */
-        lea     %sp@(8),%sp             /* pop args off stack */
-
-        RESTORE_LOCAL
-
-ENTRY(ret_from_interrupt)
-        /* the fasthandler is confusing me, haven't seen any user */
-        jmp     ret_from_exception
+        bra     ret_from_exception
 
 /*
  * Beware - when entering resume, prev (the current task) is
@@ -226,9 +191,8 @@ ENTRY(ret_from_interrupt)
  */
 ENTRY(resume)
         movel   %a0, %d1                        /* get prev thread in d1 */
-
-        movel   sw_usp,%d0                      /* save usp */
-        movel   %d0,%a0@(TASK_THREAD+THREAD_USP)
+        RDUSP
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
 
         SAVE_SWITCH_STACK
         movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
@@ -236,5 +200,5 @@ ENTRY(resume)
         RESTORE_SWITCH_STACK
 
         movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
-        movel   %a0, sw_usp
+        WRUSP
         rts
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
index 0b2d7c7adf7..d5977909ae5 100644
--- a/arch/m68knommu/platform/coldfire/head.S
+++ b/arch/m68knommu/platform/coldfire/head.S
@@ -3,7 +3,7 @@
 /*
  *      head.S -- common startup code for ColdFire CPUs.
  *
- *      (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
+ *      (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
  */
 
 /*****************************************************************************/
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <asm/asm-offsets.h>
 #include <asm/coldfire.h>
-#include <asm/mcfcache.h>
 #include <asm/mcfsim.h>
 #include <asm/thread_info.h>
 
@@ -173,10 +172,27 @@ _start:
 
         /*
          *      Now that we know what the memory is, lets enable cache
-         *      and get things moving. This is Coldfire CPU specific.
+         *      and get things moving. This is Coldfire CPU specific. Not
+         *      all version cores have identical cache register setup. But
+         *      it is very similar. Define the exact settings in the headers
+         *      then the code here is the same for all.
          */
-        CACHE_ENABLE                            /* enable CPU cache */
-
+        movel   #CACHE_INIT,%d0                 /* invalidate whole cache */
+        movec   %d0,%CACR
+        nop
+        movel   #ACR0_MODE,%d0                  /* set RAM region for caching */
+        movec   %d0,%ACR0
+        movel   #ACR1_MODE,%d0                  /* anything else to cache? */
+        movec   %d0,%ACR1
+#ifdef ACR2_MODE
+        movel   #ACR2_MODE,%d0
+        movec   %d0,%ACR2
+        movel   #ACR3_MODE,%d0
+        movec   %d0,%ACR3
+#endif
+        movel   #CACHE_MODE,%d0                 /* enable cache */
+        movec   %d0,%CACR
+        nop
 
 #ifdef CONFIG_ROMFS_FS
         /*