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authorHirokazu Takata <takata@linux-m32r.org>2008-11-27 12:46:48 -0500
committerHirokazu Takata <takata@linux-m32r.org>2009-04-16 21:05:01 -0400
commitfe4e719d82c4052751d2287de4bd18bd04e93685 (patch)
tree3a120e25626becf138f523a356422c0cdf9804c7 /arch/m32r/include/asm/cachectl.h
parent20d9207849d5abe60461841b3c3724f6e7c9d33e (diff)
m32r: move include/asm-m32r headers to arch/m32r/include/asm
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Diffstat (limited to 'arch/m32r/include/asm/cachectl.h')
-rw-r--r--arch/m32r/include/asm/cachectl.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h
new file mode 100644
index 00000000000..2aab8f6fff4
--- /dev/null
+++ b/arch/m32r/include/asm/cachectl.h
@@ -0,0 +1,26 @@
1/*
2 * cachectl.h -- defines for M32R cache control system calls
3 *
4 * Copyright (C) 2003 by Kazuhiro Inaoka
5 */
6#ifndef __ASM_M32R_CACHECTL
7#define __ASM_M32R_CACHECTL
8
9/*
10 * Options for cacheflush system call
11 *
12 * cacheflush() is currently fluch_cache_all().
13 */
14#define ICACHE (1<<0) /* flush instruction cache */
15#define DCACHE (1<<1) /* writeback and flush data cache */
16#define BCACHE (ICACHE|DCACHE) /* flush both caches */
17
18/*
19 * Caching modes for the cachectl(2) call
20 *
21 * cachectl(2) is currently not supported and returns ENOSYS.
22 */
23#define CACHEABLE 0 /* make pages cacheable */
24#define UNCACHEABLE 1 /* make pages uncacheable */
25
26#endif /* __ASM_M32R_CACHECTL */