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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/ia64/include/asm
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/ia64/include/asm')
-rw-r--r--arch/ia64/include/asm/Kbuild17
-rw-r--r--arch/ia64/include/asm/acpi.h3
-rw-r--r--arch/ia64/include/asm/atomic.h5
-rw-r--r--arch/ia64/include/asm/barrier.h68
-rw-r--r--arch/ia64/include/asm/cputime.h73
-rw-r--r--arch/ia64/include/asm/device.h3
-rw-r--r--arch/ia64/include/asm/dma-mapping.h19
-rw-r--r--arch/ia64/include/asm/futex.h10
-rw-r--r--arch/ia64/include/asm/gcc_intrin.h615
-rw-r--r--arch/ia64/include/asm/gpio.h59
-rw-r--r--arch/ia64/include/asm/hpsim.h2
-rw-r--r--arch/ia64/include/asm/hugetlb.h4
-rw-r--r--arch/ia64/include/asm/intrinsics.h243
-rw-r--r--arch/ia64/include/asm/io.h3
-rw-r--r--arch/ia64/include/asm/iommu.h2
-rw-r--r--arch/ia64/include/asm/iosapic.h11
-rw-r--r--arch/ia64/include/asm/irq_remapping.h4
-rw-r--r--arch/ia64/include/asm/irqflags.h2
-rw-r--r--arch/ia64/include/asm/kexec.h1
-rw-r--r--arch/ia64/include/asm/kvm_host.h6
-rw-r--r--arch/ia64/include/asm/machvec.h2
-rw-r--r--arch/ia64/include/asm/machvec_dig.h2
-rw-r--r--arch/ia64/include/asm/machvec_dig_vtd.h2
-rw-r--r--arch/ia64/include/asm/machvec_hpsim.h2
-rw-r--r--arch/ia64/include/asm/machvec_hpzx1.h2
-rw-r--r--arch/ia64/include/asm/machvec_hpzx1_swiotlb.h2
-rw-r--r--arch/ia64/include/asm/machvec_sn2.h2
-rw-r--r--arch/ia64/include/asm/machvec_uv.h2
-rw-r--r--arch/ia64/include/asm/machvec_xen.h2
-rw-r--r--arch/ia64/include/asm/mca_asm.h2
-rw-r--r--arch/ia64/include/asm/mman.h12
-rw-r--r--arch/ia64/include/asm/module.h6
-rw-r--r--arch/ia64/include/asm/numa.h2
-rw-r--r--arch/ia64/include/asm/page.h10
-rw-r--r--arch/ia64/include/asm/param.h22
-rw-r--r--arch/ia64/include/asm/paravirt.h6
-rw-r--r--arch/ia64/include/asm/parport.h5
-rw-r--r--arch/ia64/include/asm/pci.h20
-rw-r--r--arch/ia64/include/asm/perfmon.h171
-rw-r--r--arch/ia64/include/asm/pgtable.h1
-rw-r--r--arch/ia64/include/asm/processor.h32
-rw-r--r--arch/ia64/include/asm/ptrace.h254
-rw-r--r--arch/ia64/include/asm/sal.h1
-rw-r--r--arch/ia64/include/asm/siginfo.h118
-rw-r--r--arch/ia64/include/asm/signal.h124
-rw-r--r--arch/ia64/include/asm/smp.h2
-rw-r--r--arch/ia64/include/asm/sn/pda.h1
-rw-r--r--arch/ia64/include/asm/spinlock.h1
-rw-r--r--arch/ia64/include/asm/switch_to.h79
-rw-r--r--arch/ia64/include/asm/termios.h46
-rw-r--r--arch/ia64/include/asm/thread_info.h25
-rw-r--r--arch/ia64/include/asm/topology.h25
-rw-r--r--arch/ia64/include/asm/types.h21
-rw-r--r--arch/ia64/include/asm/unistd.h323
-rw-r--r--arch/ia64/include/asm/ustack.h11
-rw-r--r--arch/ia64/include/asm/uv/uv.h1
-rw-r--r--arch/ia64/include/asm/xen/interface.h12
57 files changed, 2136 insertions, 365 deletions
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index 05b03ecd793..241d1c53ba6 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -1,5 +1,14 @@
1include include/asm-generic/Kbuild.asm
1 2
2generic-y += clkdev.h 3header-y += break.h
3generic-y += exec.h 4header-y += fpu.h
4generic-y += kvm_para.h 5header-y += gcc_intrin.h
5generic-y += trace_clock.h 6header-y += ia64regs.h
7header-y += intel_intrin.h
8header-y += intrinsics.h
9header-y += perfmon.h
10header-y += perfmon_default_smpl.h
11header-y += ptrace_offsets.h
12header-y += rse.h
13header-y += ucontext.h
14header-y += ustack.h
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index 359e68a03ca..a06dfb13d51 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -32,6 +32,7 @@
32 32
33#include <linux/init.h> 33#include <linux/init.h>
34#include <linux/numa.h> 34#include <linux/numa.h>
35#include <asm/system.h>
35#include <asm/numa.h> 36#include <asm/numa.h>
36 37
37#define COMPILER_DEPENDENT_INT64 long 38#define COMPILER_DEPENDENT_INT64 long
@@ -153,7 +154,7 @@ extern int additional_cpus;
153#else 154#else
154#define MAX_PXM_DOMAINS (256) 155#define MAX_PXM_DOMAINS (256)
155#endif 156#endif
156extern int pxm_to_nid_map[MAX_PXM_DOMAINS]; 157extern int __devinitdata pxm_to_nid_map[MAX_PXM_DOMAINS];
157extern int __initdata nid_to_pxm_map[MAX_NUMNODES]; 158extern int __initdata nid_to_pxm_map[MAX_NUMNODES];
158#endif 159#endif
159 160
diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h
index 6e6fe1839f5..3fad89ee01c 100644
--- a/arch/ia64/include/asm/atomic.h
+++ b/arch/ia64/include/asm/atomic.h
@@ -15,10 +15,11 @@
15#include <linux/types.h> 15#include <linux/types.h>
16 16
17#include <asm/intrinsics.h> 17#include <asm/intrinsics.h>
18#include <asm/system.h>
18 19
19 20
20#define ATOMIC_INIT(i) { (i) } 21#define ATOMIC_INIT(i) ((atomic_t) { (i) })
21#define ATOMIC64_INIT(i) { (i) } 22#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
22 23
23#define atomic_read(v) (*(volatile int *)&(v)->counter) 24#define atomic_read(v) (*(volatile int *)&(v)->counter)
24#define atomic64_read(v) (*(volatile long *)&(v)->counter) 25#define atomic64_read(v) (*(volatile long *)&(v)->counter)
diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
deleted file mode 100644
index 60576e06b6f..00000000000
--- a/arch/ia64/include/asm/barrier.h
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * Memory barrier definitions. This is based on information published
3 * in the Processor Abstraction Layer and the System Abstraction Layer
4 * manual.
5 *
6 * Copyright (C) 1998-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
9 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
10 */
11#ifndef _ASM_IA64_BARRIER_H
12#define _ASM_IA64_BARRIER_H
13
14#include <linux/compiler.h>
15
16/*
17 * Macros to force memory ordering. In these descriptions, "previous"
18 * and "subsequent" refer to program order; "visible" means that all
19 * architecturally visible effects of a memory access have occurred
20 * (at a minimum, this means the memory has been read or written).
21 *
22 * wmb(): Guarantees that all preceding stores to memory-
23 * like regions are visible before any subsequent
24 * stores and that all following stores will be
25 * visible only after all previous stores.
26 * rmb(): Like wmb(), but for reads.
27 * mb(): wmb()/rmb() combo, i.e., all previous memory
28 * accesses are visible before all subsequent
29 * accesses and vice versa. This is also known as
30 * a "fence."
31 *
32 * Note: "mb()" and its variants cannot be used as a fence to order
33 * accesses to memory mapped I/O registers. For that, mf.a needs to
34 * be used. However, we don't want to always use mf.a because (a)
35 * it's (presumably) much slower than mf and (b) mf.a is supported for
36 * sequential memory pages only.
37 */
38#define mb() ia64_mf()
39#define rmb() mb()
40#define wmb() mb()
41#define read_barrier_depends() do { } while(0)
42
43#ifdef CONFIG_SMP
44# define smp_mb() mb()
45# define smp_rmb() rmb()
46# define smp_wmb() wmb()
47# define smp_read_barrier_depends() read_barrier_depends()
48#else
49# define smp_mb() barrier()
50# define smp_rmb() barrier()
51# define smp_wmb() barrier()
52# define smp_read_barrier_depends() do { } while(0)
53#endif
54
55/*
56 * XXX check on this ---I suspect what Linus really wants here is
57 * acquire vs release semantics but we can't discuss this stuff with
58 * Linus just yet. Grrr...
59 */
60#define set_mb(var, value) do { (var) = (value); mb(); } while (0)
61
62/*
63 * The group barrier in front of the rsm & ssm are necessary to ensure
64 * that none of the previous instructions in the same group are
65 * affected by the rsm/ssm.
66 */
67
68#endif /* _ASM_IA64_BARRIER_H */
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 7fcf7f08ab0..6073b187528 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -26,53 +26,59 @@
26#include <linux/jiffies.h> 26#include <linux/jiffies.h>
27#include <asm/processor.h> 27#include <asm/processor.h>
28 28
29typedef u64 __nocast cputime_t; 29typedef u64 cputime_t;
30typedef u64 __nocast cputime64_t; 30typedef u64 cputime64_t;
31 31
32#define cputime_zero ((cputime_t)0)
32#define cputime_one_jiffy jiffies_to_cputime(1) 33#define cputime_one_jiffy jiffies_to_cputime(1)
34#define cputime_max ((~((cputime_t)0) >> 1) - 1)
35#define cputime_add(__a, __b) ((__a) + (__b))
36#define cputime_sub(__a, __b) ((__a) - (__b))
37#define cputime_div(__a, __n) ((__a) / (__n))
38#define cputime_halve(__a) ((__a) >> 1)
39#define cputime_eq(__a, __b) ((__a) == (__b))
40#define cputime_gt(__a, __b) ((__a) > (__b))
41#define cputime_ge(__a, __b) ((__a) >= (__b))
42#define cputime_lt(__a, __b) ((__a) < (__b))
43#define cputime_le(__a, __b) ((__a) <= (__b))
44
45#define cputime64_zero ((cputime64_t)0)
46#define cputime64_add(__a, __b) ((__a) + (__b))
47#define cputime64_sub(__a, __b) ((__a) - (__b))
48#define cputime_to_cputime64(__ct) (__ct)
33 49
34/* 50/*
35 * Convert cputime <-> jiffies (HZ) 51 * Convert cputime <-> jiffies (HZ)
36 */ 52 */
37#define cputime_to_jiffies(__ct) \ 53#define cputime_to_jiffies(__ct) ((__ct) / (NSEC_PER_SEC / HZ))
38 ((__force u64)(__ct) / (NSEC_PER_SEC / HZ)) 54#define jiffies_to_cputime(__jif) ((__jif) * (NSEC_PER_SEC / HZ))
39#define jiffies_to_cputime(__jif) \ 55#define cputime64_to_jiffies64(__ct) ((__ct) / (NSEC_PER_SEC / HZ))
40 (__force cputime_t)((__jif) * (NSEC_PER_SEC / HZ)) 56#define jiffies64_to_cputime64(__jif) ((__jif) * (NSEC_PER_SEC / HZ))
41#define cputime64_to_jiffies64(__ct) \
42 ((__force u64)(__ct) / (NSEC_PER_SEC / HZ))
43#define jiffies64_to_cputime64(__jif) \
44 (__force cputime64_t)((__jif) * (NSEC_PER_SEC / HZ))
45 57
46/* 58/*
47 * Convert cputime <-> microseconds 59 * Convert cputime <-> microseconds
48 */ 60 */
49#define cputime_to_usecs(__ct) \ 61#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC)
50 ((__force u64)(__ct) / NSEC_PER_USEC) 62#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC)
51#define usecs_to_cputime(__usecs) \
52 (__force cputime_t)((__usecs) * NSEC_PER_USEC)
53#define usecs_to_cputime64(__usecs) \
54 (__force cputime64_t)((__usecs) * NSEC_PER_USEC)
55 63
56/* 64/*
57 * Convert cputime <-> seconds 65 * Convert cputime <-> seconds
58 */ 66 */
59#define cputime_to_secs(__ct) \ 67#define cputime_to_secs(__ct) ((__ct) / NSEC_PER_SEC)
60 ((__force u64)(__ct) / NSEC_PER_SEC) 68#define secs_to_cputime(__secs) ((__secs) * NSEC_PER_SEC)
61#define secs_to_cputime(__secs) \
62 (__force cputime_t)((__secs) * NSEC_PER_SEC)
63 69
64/* 70/*
65 * Convert cputime <-> timespec (nsec) 71 * Convert cputime <-> timespec (nsec)
66 */ 72 */
67static inline cputime_t timespec_to_cputime(const struct timespec *val) 73static inline cputime_t timespec_to_cputime(const struct timespec *val)
68{ 74{
69 u64 ret = val->tv_sec * NSEC_PER_SEC + val->tv_nsec; 75 cputime_t ret = val->tv_sec * NSEC_PER_SEC;
70 return (__force cputime_t) ret; 76 return (ret + val->tv_nsec);
71} 77}
72static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val) 78static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val)
73{ 79{
74 val->tv_sec = (__force u64) ct / NSEC_PER_SEC; 80 val->tv_sec = ct / NSEC_PER_SEC;
75 val->tv_nsec = (__force u64) ct % NSEC_PER_SEC; 81 val->tv_nsec = ct % NSEC_PER_SEC;
76} 82}
77 83
78/* 84/*
@@ -80,30 +86,25 @@ static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val)
80 */ 86 */
81static inline cputime_t timeval_to_cputime(struct timeval *val) 87static inline cputime_t timeval_to_cputime(struct timeval *val)
82{ 88{
83 u64 ret = val->tv_sec * NSEC_PER_SEC + val->tv_usec * NSEC_PER_USEC; 89 cputime_t ret = val->tv_sec * NSEC_PER_SEC;
84 return (__force cputime_t) ret; 90 return (ret + val->tv_usec * NSEC_PER_USEC);
85} 91}
86static inline void cputime_to_timeval(const cputime_t ct, struct timeval *val) 92static inline void cputime_to_timeval(const cputime_t ct, struct timeval *val)
87{ 93{
88 val->tv_sec = (__force u64) ct / NSEC_PER_SEC; 94 val->tv_sec = ct / NSEC_PER_SEC;
89 val->tv_usec = ((__force u64) ct % NSEC_PER_SEC) / NSEC_PER_USEC; 95 val->tv_usec = (ct % NSEC_PER_SEC) / NSEC_PER_USEC;
90} 96}
91 97
92/* 98/*
93 * Convert cputime <-> clock (USER_HZ) 99 * Convert cputime <-> clock (USER_HZ)
94 */ 100 */
95#define cputime_to_clock_t(__ct) \ 101#define cputime_to_clock_t(__ct) ((__ct) / (NSEC_PER_SEC / USER_HZ))
96 ((__force u64)(__ct) / (NSEC_PER_SEC / USER_HZ)) 102#define clock_t_to_cputime(__x) ((__x) * (NSEC_PER_SEC / USER_HZ))
97#define clock_t_to_cputime(__x) \
98 (__force cputime_t)((__x) * (NSEC_PER_SEC / USER_HZ))
99 103
100/* 104/*
101 * Convert cputime64 to clock. 105 * Convert cputime64 to clock.
102 */ 106 */
103#define cputime64_to_clock_t(__ct) \ 107#define cputime64_to_clock_t(__ct) cputime_to_clock_t((cputime_t)__ct)
104 cputime_to_clock_t((__force cputime_t)__ct)
105
106extern void arch_vtime_task_switch(struct task_struct *tsk);
107 108
108#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ 109#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
109#endif /* __IA64_CPUTIME_H */ 110#endif /* __IA64_CPUTIME_H */
diff --git a/arch/ia64/include/asm/device.h b/arch/ia64/include/asm/device.h
index f69c32ffbe6..d05e78f6db9 100644
--- a/arch/ia64/include/asm/device.h
+++ b/arch/ia64/include/asm/device.h
@@ -7,6 +7,9 @@
7#define _ASM_IA64_DEVICE_H 7#define _ASM_IA64_DEVICE_H
8 8
9struct dev_archdata { 9struct dev_archdata {
10#ifdef CONFIG_ACPI
11 void *acpi_handle;
12#endif
10#ifdef CONFIG_INTEL_IOMMU 13#ifdef CONFIG_INTEL_IOMMU
11 void *iommu; /* hook for IOMMU specific extension */ 14 void *iommu; /* hook for IOMMU specific extension */
12#endif 15#endif
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index cf3ab7e784b..4336d080b24 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -23,29 +23,23 @@ extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
23extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int, 23extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
24 enum dma_data_direction); 24 enum dma_data_direction);
25 25
26#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) 26static inline void *dma_alloc_coherent(struct device *dev, size_t size,
27 27 dma_addr_t *daddr, gfp_t gfp)
28static inline void *dma_alloc_attrs(struct device *dev, size_t size,
29 dma_addr_t *daddr, gfp_t gfp,
30 struct dma_attrs *attrs)
31{ 28{
32 struct dma_map_ops *ops = platform_dma_get_ops(dev); 29 struct dma_map_ops *ops = platform_dma_get_ops(dev);
33 void *caddr; 30 void *caddr;
34 31
35 caddr = ops->alloc(dev, size, daddr, gfp, attrs); 32 caddr = ops->alloc_coherent(dev, size, daddr, gfp);
36 debug_dma_alloc_coherent(dev, size, *daddr, caddr); 33 debug_dma_alloc_coherent(dev, size, *daddr, caddr);
37 return caddr; 34 return caddr;
38} 35}
39 36
40#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) 37static inline void dma_free_coherent(struct device *dev, size_t size,
41 38 void *caddr, dma_addr_t daddr)
42static inline void dma_free_attrs(struct device *dev, size_t size,
43 void *caddr, dma_addr_t daddr,
44 struct dma_attrs *attrs)
45{ 39{
46 struct dma_map_ops *ops = platform_dma_get_ops(dev); 40 struct dma_map_ops *ops = platform_dma_get_ops(dev);
47 debug_dma_free_coherent(dev, size, caddr, daddr); 41 debug_dma_free_coherent(dev, size, caddr, daddr);
48 ops->free(dev, size, caddr, daddr, attrs); 42 ops->free_coherent(dev, size, caddr, daddr);
49} 43}
50 44
51#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 45#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
@@ -58,7 +52,6 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr) 52static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
59{ 53{
60 struct dma_map_ops *ops = platform_dma_get_ops(dev); 54 struct dma_map_ops *ops = platform_dma_get_ops(dev);
61 debug_dma_mapping_error(dev, daddr);
62 return ops->mapping_error(dev, daddr); 55 return ops->mapping_error(dev, daddr);
63} 56}
64 57
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index d2bf1fd5e44..8428525ddb2 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -4,6 +4,7 @@
4#include <linux/futex.h> 4#include <linux/futex.h>
5#include <linux/uaccess.h> 5#include <linux/uaccess.h>
6#include <asm/errno.h> 6#include <asm/errno.h>
7#include <asm/system.h>
7 8
8#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \ 9#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
9do { \ 10do { \
@@ -106,16 +107,15 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
106 return -EFAULT; 107 return -EFAULT;
107 108
108 { 109 {
109 register unsigned long r8 __asm ("r8"); 110 register unsigned long r8 __asm ("r8") = 0;
110 unsigned long prev; 111 unsigned long prev;
111 __asm__ __volatile__( 112 __asm__ __volatile__(
112 " mf;; \n" 113 " mf;; \n"
113 " mov %0=r0 \n" 114 " mov ar.ccv=%3;; \n"
114 " mov ar.ccv=%4;; \n" 115 "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
115 "[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n"
116 " .xdata4 \"__ex_table\", 1b-., 2f-. \n" 116 " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
117 "[2:]" 117 "[2:]"
118 : "=r" (r8), "=r" (prev) 118 : "=r" (prev)
119 : "r" (uaddr), "r" (newval), 119 : "r" (uaddr), "r" (newval),
120 "rO" ((long) (unsigned) oldval) 120 "rO" ((long) (unsigned) oldval)
121 : "memory"); 121 : "memory");
diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h
index f9495b1757a..21ddee54ada 100644
--- a/arch/ia64/include/asm/gcc_intrin.h
+++ b/arch/ia64/include/asm/gcc_intrin.h
@@ -1,12 +1,621 @@
1#ifndef _ASM_IA64_GCC_INTRIN_H
2#define _ASM_IA64_GCC_INTRIN_H
1/* 3/*
2 * 4 *
3 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com> 5 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
4 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com> 6 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
5 */ 7 */
6#ifndef _ASM_IA64_GCC_INTRIN_H
7#define _ASM_IA64_GCC_INTRIN_H
8 8
9#include <uapi/asm/gcc_intrin.h> 9#include <linux/types.h>
10#include <linux/compiler.h>
11
12/* define this macro to get some asm stmts included in 'c' files */
13#define ASM_SUPPORTED
14
15/* Optimization barrier */
16/* The "volatile" is due to gcc bugs */
17#define ia64_barrier() asm volatile ("":::"memory")
18
19#define ia64_stop() asm volatile (";;"::)
20
21#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
22
23#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
24
25#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
26
27#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
28
29extern void ia64_bad_param_for_setreg (void);
30extern void ia64_bad_param_for_getreg (void);
10 31
32#ifdef __KERNEL__
11register unsigned long ia64_r13 asm ("r13") __used; 33register unsigned long ia64_r13 asm ("r13") __used;
34#endif
35
36#define ia64_native_setreg(regnum, val) \
37({ \
38 switch (regnum) { \
39 case _IA64_REG_PSR_L: \
40 asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
41 break; \
42 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
43 asm volatile ("mov ar%0=%1" :: \
44 "i" (regnum - _IA64_REG_AR_KR0), \
45 "r"(val): "memory"); \
46 break; \
47 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
48 asm volatile ("mov cr%0=%1" :: \
49 "i" (regnum - _IA64_REG_CR_DCR), \
50 "r"(val): "memory" ); \
51 break; \
52 case _IA64_REG_SP: \
53 asm volatile ("mov r12=%0" :: \
54 "r"(val): "memory"); \
55 break; \
56 case _IA64_REG_GP: \
57 asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
58 break; \
59 default: \
60 ia64_bad_param_for_setreg(); \
61 break; \
62 } \
63})
64
65#define ia64_native_getreg(regnum) \
66({ \
67 __u64 ia64_intri_res; \
68 \
69 switch (regnum) { \
70 case _IA64_REG_GP: \
71 asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
72 break; \
73 case _IA64_REG_IP: \
74 asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
75 break; \
76 case _IA64_REG_PSR: \
77 asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
78 break; \
79 case _IA64_REG_TP: /* for current() */ \
80 ia64_intri_res = ia64_r13; \
81 break; \
82 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
83 asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
84 : "i"(regnum - _IA64_REG_AR_KR0)); \
85 break; \
86 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
87 asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
88 : "i" (regnum - _IA64_REG_CR_DCR)); \
89 break; \
90 case _IA64_REG_SP: \
91 asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
92 break; \
93 default: \
94 ia64_bad_param_for_getreg(); \
95 break; \
96 } \
97 ia64_intri_res; \
98})
99
100#define ia64_hint_pause 0
101
102#define ia64_hint(mode) \
103({ \
104 switch (mode) { \
105 case ia64_hint_pause: \
106 asm volatile ("hint @pause" ::: "memory"); \
107 break; \
108 } \
109})
110
111
112/* Integer values for mux1 instruction */
113#define ia64_mux1_brcst 0
114#define ia64_mux1_mix 8
115#define ia64_mux1_shuf 9
116#define ia64_mux1_alt 10
117#define ia64_mux1_rev 11
118
119#define ia64_mux1(x, mode) \
120({ \
121 __u64 ia64_intri_res; \
122 \
123 switch (mode) { \
124 case ia64_mux1_brcst: \
125 asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
126 break; \
127 case ia64_mux1_mix: \
128 asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
129 break; \
130 case ia64_mux1_shuf: \
131 asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
132 break; \
133 case ia64_mux1_alt: \
134 asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
135 break; \
136 case ia64_mux1_rev: \
137 asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
138 break; \
139 } \
140 ia64_intri_res; \
141})
142
143#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
144# define ia64_popcnt(x) __builtin_popcountl(x)
145#else
146# define ia64_popcnt(x) \
147 ({ \
148 __u64 ia64_intri_res; \
149 asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
150 \
151 ia64_intri_res; \
152 })
153#endif
154
155#define ia64_getf_exp(x) \
156({ \
157 long ia64_intri_res; \
158 \
159 asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
160 \
161 ia64_intri_res; \
162})
163
164#define ia64_shrp(a, b, count) \
165({ \
166 __u64 ia64_intri_res; \
167 asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
168 ia64_intri_res; \
169})
170
171#define ia64_ldfs(regnum, x) \
172({ \
173 register double __f__ asm ("f"#regnum); \
174 asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
175})
176
177#define ia64_ldfd(regnum, x) \
178({ \
179 register double __f__ asm ("f"#regnum); \
180 asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
181})
182
183#define ia64_ldfe(regnum, x) \
184({ \
185 register double __f__ asm ("f"#regnum); \
186 asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
187})
188
189#define ia64_ldf8(regnum, x) \
190({ \
191 register double __f__ asm ("f"#regnum); \
192 asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
193})
194
195#define ia64_ldf_fill(regnum, x) \
196({ \
197 register double __f__ asm ("f"#regnum); \
198 asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
199})
200
201#define ia64_st4_rel_nta(m, val) \
202({ \
203 asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
204})
205
206#define ia64_stfs(x, regnum) \
207({ \
208 register double __f__ asm ("f"#regnum); \
209 asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
210})
211
212#define ia64_stfd(x, regnum) \
213({ \
214 register double __f__ asm ("f"#regnum); \
215 asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
216})
217
218#define ia64_stfe(x, regnum) \
219({ \
220 register double __f__ asm ("f"#regnum); \
221 asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
222})
223
224#define ia64_stf8(x, regnum) \
225({ \
226 register double __f__ asm ("f"#regnum); \
227 asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
228})
229
230#define ia64_stf_spill(x, regnum) \
231({ \
232 register double __f__ asm ("f"#regnum); \
233 asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
234})
235
236#define ia64_fetchadd4_acq(p, inc) \
237({ \
238 \
239 __u64 ia64_intri_res; \
240 asm volatile ("fetchadd4.acq %0=[%1],%2" \
241 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
242 : "memory"); \
243 \
244 ia64_intri_res; \
245})
246
247#define ia64_fetchadd4_rel(p, inc) \
248({ \
249 __u64 ia64_intri_res; \
250 asm volatile ("fetchadd4.rel %0=[%1],%2" \
251 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
252 : "memory"); \
253 \
254 ia64_intri_res; \
255})
256
257#define ia64_fetchadd8_acq(p, inc) \
258({ \
259 \
260 __u64 ia64_intri_res; \
261 asm volatile ("fetchadd8.acq %0=[%1],%2" \
262 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
263 : "memory"); \
264 \
265 ia64_intri_res; \
266})
267
268#define ia64_fetchadd8_rel(p, inc) \
269({ \
270 __u64 ia64_intri_res; \
271 asm volatile ("fetchadd8.rel %0=[%1],%2" \
272 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
273 : "memory"); \
274 \
275 ia64_intri_res; \
276})
277
278#define ia64_xchg1(ptr,x) \
279({ \
280 __u64 ia64_intri_res; \
281 asm volatile ("xchg1 %0=[%1],%2" \
282 : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
283 ia64_intri_res; \
284})
285
286#define ia64_xchg2(ptr,x) \
287({ \
288 __u64 ia64_intri_res; \
289 asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
290 : "r" (ptr), "r" (x) : "memory"); \
291 ia64_intri_res; \
292})
293
294#define ia64_xchg4(ptr,x) \
295({ \
296 __u64 ia64_intri_res; \
297 asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
298 : "r" (ptr), "r" (x) : "memory"); \
299 ia64_intri_res; \
300})
301
302#define ia64_xchg8(ptr,x) \
303({ \
304 __u64 ia64_intri_res; \
305 asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
306 : "r" (ptr), "r" (x) : "memory"); \
307 ia64_intri_res; \
308})
309
310#define ia64_cmpxchg1_acq(ptr, new, old) \
311({ \
312 __u64 ia64_intri_res; \
313 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
314 asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
315 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
316 ia64_intri_res; \
317})
318
319#define ia64_cmpxchg1_rel(ptr, new, old) \
320({ \
321 __u64 ia64_intri_res; \
322 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
323 asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
324 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
325 ia64_intri_res; \
326})
327
328#define ia64_cmpxchg2_acq(ptr, new, old) \
329({ \
330 __u64 ia64_intri_res; \
331 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
332 asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
333 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
334 ia64_intri_res; \
335})
336
337#define ia64_cmpxchg2_rel(ptr, new, old) \
338({ \
339 __u64 ia64_intri_res; \
340 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
341 \
342 asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
343 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
344 ia64_intri_res; \
345})
346
347#define ia64_cmpxchg4_acq(ptr, new, old) \
348({ \
349 __u64 ia64_intri_res; \
350 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
351 asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
352 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
353 ia64_intri_res; \
354})
355
356#define ia64_cmpxchg4_rel(ptr, new, old) \
357({ \
358 __u64 ia64_intri_res; \
359 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
360 asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
361 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
362 ia64_intri_res; \
363})
364
365#define ia64_cmpxchg8_acq(ptr, new, old) \
366({ \
367 __u64 ia64_intri_res; \
368 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
369 asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
370 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
371 ia64_intri_res; \
372})
373
374#define ia64_cmpxchg8_rel(ptr, new, old) \
375({ \
376 __u64 ia64_intri_res; \
377 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
378 \
379 asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
380 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
381 ia64_intri_res; \
382})
383
384#define ia64_mf() asm volatile ("mf" ::: "memory")
385#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
386
387#define ia64_invala() asm volatile ("invala" ::: "memory")
388
389#define ia64_native_thash(addr) \
390({ \
391 unsigned long ia64_intri_res; \
392 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
393 ia64_intri_res; \
394})
395
396#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
397#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
398
399#ifdef HAVE_SERIALIZE_DIRECTIVE
400# define ia64_dv_serialize_data() asm volatile (".serialize.data");
401# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction");
402#else
403# define ia64_dv_serialize_data()
404# define ia64_dv_serialize_instruction()
405#endif
406
407#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
408
409#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
410
411#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
412
413
414#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
415 :: "r"(trnum), "r"(addr) : "memory")
416
417#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
418 :: "r"(trnum), "r"(addr) : "memory")
419
420#define ia64_tpa(addr) \
421({ \
422 unsigned long ia64_pa; \
423 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
424 ia64_pa; \
425})
426
427#define __ia64_set_dbr(index, val) \
428 asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
429
430#define ia64_set_ibr(index, val) \
431 asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
432
433#define ia64_set_pkr(index, val) \
434 asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
435
436#define ia64_set_pmc(index, val) \
437 asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
438
439#define ia64_set_pmd(index, val) \
440 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
441
442#define ia64_native_set_rr(index, val) \
443 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
444
445#define ia64_native_get_cpuid(index) \
446({ \
447 unsigned long ia64_intri_res; \
448 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
449 ia64_intri_res; \
450})
451
452#define __ia64_get_dbr(index) \
453({ \
454 unsigned long ia64_intri_res; \
455 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
456 ia64_intri_res; \
457})
458
459#define ia64_get_ibr(index) \
460({ \
461 unsigned long ia64_intri_res; \
462 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
463 ia64_intri_res; \
464})
465
466#define ia64_get_pkr(index) \
467({ \
468 unsigned long ia64_intri_res; \
469 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
470 ia64_intri_res; \
471})
472
473#define ia64_get_pmc(index) \
474({ \
475 unsigned long ia64_intri_res; \
476 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
477 ia64_intri_res; \
478})
479
480
481#define ia64_native_get_pmd(index) \
482({ \
483 unsigned long ia64_intri_res; \
484 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
485 ia64_intri_res; \
486})
487
488#define ia64_native_get_rr(index) \
489({ \
490 unsigned long ia64_intri_res; \
491 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
492 ia64_intri_res; \
493})
494
495#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
496
497
498#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
499
500#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
501#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
502#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
503#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
504
505#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
506
507#define ia64_native_ptcga(addr, size) \
508do { \
509 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
510 ia64_dv_serialize_data(); \
511} while (0)
512
513#define ia64_ptcl(addr, size) \
514do { \
515 asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
516 ia64_dv_serialize_data(); \
517} while (0)
518
519#define ia64_ptri(addr, size) \
520 asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
521
522#define ia64_ptrd(addr, size) \
523 asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
524
525#define ia64_ttag(addr) \
526({ \
527 __u64 ia64_intri_res; \
528 asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
529 ia64_intri_res; \
530})
531
532
533/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
534
535#define ia64_lfhint_none 0
536#define ia64_lfhint_nt1 1
537#define ia64_lfhint_nt2 2
538#define ia64_lfhint_nta 3
539
540#define ia64_lfetch(lfhint, y) \
541({ \
542 switch (lfhint) { \
543 case ia64_lfhint_none: \
544 asm volatile ("lfetch [%0]" : : "r"(y)); \
545 break; \
546 case ia64_lfhint_nt1: \
547 asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
548 break; \
549 case ia64_lfhint_nt2: \
550 asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
551 break; \
552 case ia64_lfhint_nta: \
553 asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
554 break; \
555 } \
556})
557
558#define ia64_lfetch_excl(lfhint, y) \
559({ \
560 switch (lfhint) { \
561 case ia64_lfhint_none: \
562 asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
563 break; \
564 case ia64_lfhint_nt1: \
565 asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
566 break; \
567 case ia64_lfhint_nt2: \
568 asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
569 break; \
570 case ia64_lfhint_nta: \
571 asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
572 break; \
573 } \
574})
575
576#define ia64_lfetch_fault(lfhint, y) \
577({ \
578 switch (lfhint) { \
579 case ia64_lfhint_none: \
580 asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
581 break; \
582 case ia64_lfhint_nt1: \
583 asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
584 break; \
585 case ia64_lfhint_nt2: \
586 asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
587 break; \
588 case ia64_lfhint_nta: \
589 asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
590 break; \
591 } \
592})
593
594#define ia64_lfetch_fault_excl(lfhint, y) \
595({ \
596 switch (lfhint) { \
597 case ia64_lfhint_none: \
598 asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
599 break; \
600 case ia64_lfhint_nt1: \
601 asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
602 break; \
603 case ia64_lfhint_nt2: \
604 asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
605 break; \
606 case ia64_lfhint_nta: \
607 asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
608 break; \
609 } \
610})
611
612#define ia64_native_intrin_local_irq_restore(x) \
613do { \
614 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
615 "(p6) ssm psr.i;" \
616 "(p7) rsm psr.i;;" \
617 "(p6) srlz.d" \
618 :: "r"((x)) : "p6", "p7", "memory"); \
619} while (0)
620
12#endif /* _ASM_IA64_GCC_INTRIN_H */ 621#endif /* _ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/asm/gpio.h b/arch/ia64/include/asm/gpio.h
index b3799d88ffc..590a20debc4 100644
--- a/arch/ia64/include/asm/gpio.h
+++ b/arch/ia64/include/asm/gpio.h
@@ -1,4 +1,55 @@
1#ifndef __LINUX_GPIO_H 1/*
2#warning Include linux/gpio.h instead of asm/gpio.h 2 * Generic GPIO API implementation for IA-64.
3#include <linux/gpio.h> 3 *
4#endif 4 * A stright copy of that for PowerPC which was:
5 *
6 * Copyright (c) 2007-2008 MontaVista Software, Inc.
7 *
8 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef _ASM_IA64_GPIO_H
17#define _ASM_IA64_GPIO_H
18
19#include <linux/errno.h>
20#include <asm-generic/gpio.h>
21
22#ifdef CONFIG_GPIOLIB
23
24/*
25 * We don't (yet) implement inlined/rapid versions for on-chip gpios.
26 * Just call gpiolib.
27 */
28static inline int gpio_get_value(unsigned int gpio)
29{
30 return __gpio_get_value(gpio);
31}
32
33static inline void gpio_set_value(unsigned int gpio, int value)
34{
35 __gpio_set_value(gpio, value);
36}
37
38static inline int gpio_cansleep(unsigned int gpio)
39{
40 return __gpio_cansleep(gpio);
41}
42
43static inline int gpio_to_irq(unsigned int gpio)
44{
45 return __gpio_to_irq(gpio);
46}
47
48static inline int irq_to_gpio(unsigned int irq)
49{
50 return -EINVAL;
51}
52
53#endif /* CONFIG_GPIOLIB */
54
55#endif /* _ASM_IA64_GPIO_H */
diff --git a/arch/ia64/include/asm/hpsim.h b/arch/ia64/include/asm/hpsim.h
index 0fe50225daa..892ab198a9d 100644
--- a/arch/ia64/include/asm/hpsim.h
+++ b/arch/ia64/include/asm/hpsim.h
@@ -10,7 +10,7 @@ int simcons_register(void);
10struct tty_driver; 10struct tty_driver;
11extern struct tty_driver *hp_simserial_driver; 11extern struct tty_driver *hp_simserial_driver;
12 12
13extern int hpsim_get_irq(int intr); 13void ia64_ssc_connect_irq(long intr, long irq);
14void ia64_ctl_trace(long on); 14void ia64_ctl_trace(long on);
15 15
16#endif 16#endif
diff --git a/arch/ia64/include/asm/hugetlb.h b/arch/ia64/include/asm/hugetlb.h
index 94eaa5bd5d0..da55c63728e 100644
--- a/arch/ia64/include/asm/hugetlb.h
+++ b/arch/ia64/include/asm/hugetlb.h
@@ -77,8 +77,4 @@ static inline void arch_release_hugepage(struct page *page)
77{ 77{
78} 78}
79 79
80static inline void arch_clear_hugepage_flags(struct page *page)
81{
82}
83
84#endif /* _ASM_IA64_HUGETLB_H */ 80#endif /* _ASM_IA64_HUGETLB_H */
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index 20477ea111b..111ed522289 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -1,25 +1,246 @@
1#ifndef _ASM_IA64_INTRINSICS_H
2#define _ASM_IA64_INTRINSICS_H
3
1/* 4/*
2 * Compiler-dependent intrinsics. 5 * Compiler-dependent intrinsics.
3 * 6 *
4 * Copyright (C) 2002-2003 Hewlett-Packard Co 7 * Copyright (C) 2002-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com> 8 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */ 9 */
7#ifndef _ASM_IA64_INTRINSICS_H
8#define _ASM_IA64_INTRINSICS_H
9 10
11#ifndef __ASSEMBLY__
12
13#include <linux/types.h>
14/* include compiler specific intrinsics */
15#include <asm/ia64regs.h>
16#ifdef __INTEL_COMPILER
17# include <asm/intel_intrin.h>
18#else
19# include <asm/gcc_intrin.h>
20#endif
21
22#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
23
24#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
25do { \
26 ia64_native_set_rr(0x0000000000000000UL, (val0)); \
27 ia64_native_set_rr(0x2000000000000000UL, (val1)); \
28 ia64_native_set_rr(0x4000000000000000UL, (val2)); \
29 ia64_native_set_rr(0x6000000000000000UL, (val3)); \
30 ia64_native_set_rr(0x8000000000000000UL, (val4)); \
31} while (0)
32
33/*
34 * Force an unresolved reference if someone tries to use
35 * ia64_fetch_and_add() with a bad value.
36 */
37extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
38extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
39
40#define IA64_FETCHADD(tmp,v,n,sz,sem) \
41({ \
42 switch (sz) { \
43 case 4: \
44 tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
45 break; \
46 \
47 case 8: \
48 tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
49 break; \
50 \
51 default: \
52 __bad_size_for_ia64_fetch_and_add(); \
53 } \
54})
55
56#define ia64_fetchadd(i,v,sem) \
57({ \
58 __u64 _tmp; \
59 volatile __typeof__(*(v)) *_v = (v); \
60 /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
61 if ((i) == -16) \
62 IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
63 else if ((i) == -8) \
64 IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
65 else if ((i) == -4) \
66 IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
67 else if ((i) == -1) \
68 IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
69 else if ((i) == 1) \
70 IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
71 else if ((i) == 4) \
72 IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
73 else if ((i) == 8) \
74 IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
75 else if ((i) == 16) \
76 IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
77 else \
78 _tmp = __bad_increment_for_ia64_fetch_and_add(); \
79 (__typeof__(*(v))) (_tmp); /* return old value */ \
80})
81
82#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
83
84/*
85 * This function doesn't exist, so you'll get a linker error if
86 * something tries to do an invalid xchg().
87 */
88extern void ia64_xchg_called_with_bad_pointer (void);
89
90#define __xchg(x,ptr,size) \
91({ \
92 unsigned long __xchg_result; \
93 \
94 switch (size) { \
95 case 1: \
96 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
97 break; \
98 \
99 case 2: \
100 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
101 break; \
102 \
103 case 4: \
104 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
105 break; \
106 \
107 case 8: \
108 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
109 break; \
110 default: \
111 ia64_xchg_called_with_bad_pointer(); \
112 } \
113 __xchg_result; \
114})
115
116#define xchg(ptr,x) \
117 ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
118
119/*
120 * Atomic compare and exchange. Compare OLD with MEM, if identical,
121 * store NEW in MEM. Return the initial value in MEM. Success is
122 * indicated by comparing RETURN with OLD.
123 */
124
125#define __HAVE_ARCH_CMPXCHG 1
126
127/*
128 * This function doesn't exist, so you'll get a linker error
129 * if something tries to do an invalid cmpxchg().
130 */
131extern long ia64_cmpxchg_called_with_bad_pointer (void);
132
133#define ia64_cmpxchg(sem,ptr,old,new,size) \
134({ \
135 __u64 _o_, _r_; \
136 \
137 switch (size) { \
138 case 1: _o_ = (__u8 ) (long) (old); break; \
139 case 2: _o_ = (__u16) (long) (old); break; \
140 case 4: _o_ = (__u32) (long) (old); break; \
141 case 8: _o_ = (__u64) (long) (old); break; \
142 default: break; \
143 } \
144 switch (size) { \
145 case 1: \
146 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
147 break; \
148 \
149 case 2: \
150 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
151 break; \
152 \
153 case 4: \
154 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
155 break; \
156 \
157 case 8: \
158 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
159 break; \
160 \
161 default: \
162 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
163 break; \
164 } \
165 (__typeof__(old)) _r_; \
166})
167
168#define cmpxchg_acq(ptr, o, n) \
169 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
170#define cmpxchg_rel(ptr, o, n) \
171 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
172
173/* for compatibility with other platforms: */
174#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
175#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
176
177#define cmpxchg_local cmpxchg
178#define cmpxchg64_local cmpxchg64
179
180#ifdef CONFIG_IA64_DEBUG_CMPXCHG
181# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
182# define CMPXCHG_BUGCHECK(v) \
183 do { \
184 if (_cmpxchg_bugcheck_count-- <= 0) { \
185 void *ip; \
186 extern int printk(const char *fmt, ...); \
187 ip = (void *) ia64_getreg(_IA64_REG_IP); \
188 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
189 break; \
190 } \
191 } while (0)
192#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
193# define CMPXCHG_BUGCHECK_DECL
194# define CMPXCHG_BUGCHECK(v)
195#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
196
197#endif
198
199#ifdef __KERNEL__
10#include <asm/paravirt_privop.h> 200#include <asm/paravirt_privop.h>
11#include <uapi/asm/intrinsics.h> 201#endif
12 202
13#ifndef __ASSEMBLY__ 203#ifndef __ASSEMBLY__
14#if defined(CONFIG_PARAVIRT) 204#if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)
15# undef IA64_INTRINSIC_API 205#ifdef ASM_SUPPORTED
16# undef IA64_INTRINSIC_MACRO 206# define IA64_INTRINSIC_API(name) paravirt_ ## name
17# ifdef ASM_SUPPORTED 207#else
18# define IA64_INTRINSIC_API(name) paravirt_ ## name 208# define IA64_INTRINSIC_API(name) pv_cpu_ops.name
19# else 209#endif
20# define IA64_INTRINSIC_API(name) pv_cpu_ops.name
21# endif
22#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name 210#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
211#else
212#define IA64_INTRINSIC_API(name) ia64_native_ ## name
213#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
23#endif 214#endif
215
216/************************************************/
217/* Instructions paravirtualized for correctness */
218/************************************************/
219/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
220/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
221 * is not currently used (though it may be in a long-format VHPT system!)
222 */
223#define ia64_fc IA64_INTRINSIC_API(fc)
224#define ia64_thash IA64_INTRINSIC_API(thash)
225#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
226#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
227
228
229/************************************************/
230/* Instructions paravirtualized for performance */
231/************************************************/
232#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
233#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
234#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
235#define ia64_setreg IA64_INTRINSIC_API(setreg)
236#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
237#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
238#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
239#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
240#define ia64_intrin_local_irq_restore \
241 IA64_INTRINSIC_API(intrin_local_irq_restore)
242#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
243
24#endif /* !__ASSEMBLY__ */ 244#endif /* !__ASSEMBLY__ */
245
25#endif /* _ASM_IA64_INTRINSICS_H */ 246#endif /* _ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index 74a7cc3293b..e5a6c3530c6 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -71,6 +71,7 @@ extern unsigned int num_io_spaces;
71#include <asm/intrinsics.h> 71#include <asm/intrinsics.h>
72#include <asm/machvec.h> 72#include <asm/machvec.h>
73#include <asm/page.h> 73#include <asm/page.h>
74#include <asm/system.h>
74#include <asm-generic/iomap.h> 75#include <asm-generic/iomap.h>
75 76
76/* 77/*
@@ -90,7 +91,7 @@ phys_to_virt (unsigned long address)
90 91
91#define ARCH_HAS_VALID_PHYS_ADDR_RANGE 92#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
92extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size); 93extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
93extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */ 94extern int valid_phys_addr_range (unsigned long addr, size_t count); /* efi.c */
94extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); 95extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count);
95 96
96/* 97/*
diff --git a/arch/ia64/include/asm/iommu.h b/arch/ia64/include/asm/iommu.h
index 105c93b00b1..b6a809fa299 100644
--- a/arch/ia64/include/asm/iommu.h
+++ b/arch/ia64/include/asm/iommu.h
@@ -11,10 +11,12 @@ extern void no_iommu_init(void);
11extern int force_iommu, no_iommu; 11extern int force_iommu, no_iommu;
12extern int iommu_pass_through; 12extern int iommu_pass_through;
13extern int iommu_detected; 13extern int iommu_detected;
14extern int iommu_group_mf;
14#else 15#else
15#define iommu_pass_through (0) 16#define iommu_pass_through (0)
16#define no_iommu (1) 17#define no_iommu (1)
17#define iommu_detected (0) 18#define iommu_detected (0)
19#define iommu_group_mf (0)
18#endif 20#endif
19extern void iommu_dma_init(void); 21extern void iommu_dma_init(void);
20extern void machvec_init(const char *name); 22extern void machvec_init(const char *name);
diff --git a/arch/ia64/include/asm/iosapic.h b/arch/ia64/include/asm/iosapic.h
index 94c89a2d97f..b9c102e15f2 100644
--- a/arch/ia64/include/asm/iosapic.h
+++ b/arch/ia64/include/asm/iosapic.h
@@ -87,13 +87,18 @@ static inline void iosapic_eoi(char __iomem *iosapic, u32 vector)
87} 87}
88 88
89extern void __init iosapic_system_init (int pcat_compat); 89extern void __init iosapic_system_init (int pcat_compat);
90extern int iosapic_init (unsigned long address, unsigned int gsi_base); 90extern int __devinit iosapic_init (unsigned long address,
91 unsigned int gsi_base);
92#ifdef CONFIG_HOTPLUG
91extern int iosapic_remove (unsigned int gsi_base); 93extern int iosapic_remove (unsigned int gsi_base);
94#else
95#define iosapic_remove(gsi_base) (-EINVAL)
96#endif /* CONFIG_HOTPLUG */
92extern int gsi_to_irq (unsigned int gsi); 97extern int gsi_to_irq (unsigned int gsi);
93extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, 98extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity,
94 unsigned long trigger); 99 unsigned long trigger);
95extern void iosapic_unregister_intr (unsigned int irq); 100extern void iosapic_unregister_intr (unsigned int irq);
96extern void iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, 101extern void __devinit iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
97 unsigned long polarity, 102 unsigned long polarity,
98 unsigned long trigger); 103 unsigned long trigger);
99extern int __init iosapic_register_platform_intr (u32 int_type, 104extern int __init iosapic_register_platform_intr (u32 int_type,
@@ -104,7 +109,7 @@ extern int __init iosapic_register_platform_intr (u32 int_type,
104 unsigned long trigger); 109 unsigned long trigger);
105 110
106#ifdef CONFIG_NUMA 111#ifdef CONFIG_NUMA
107extern void map_iosapic_to_node (unsigned int, int); 112extern void __devinit map_iosapic_to_node (unsigned int, int);
108#endif 113#endif
109#else 114#else
110#define iosapic_system_init(pcat_compat) do { } while (0) 115#define iosapic_system_init(pcat_compat) do { } while (0)
diff --git a/arch/ia64/include/asm/irq_remapping.h b/arch/ia64/include/asm/irq_remapping.h
deleted file mode 100644
index a8687b1d890..00000000000
--- a/arch/ia64/include/asm/irq_remapping.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __IA64_INTR_REMAPPING_H
2#define __IA64_INTR_REMAPPING_H
3#define irq_remapping_enabled 0
4#endif
diff --git a/arch/ia64/include/asm/irqflags.h b/arch/ia64/include/asm/irqflags.h
index 2b68d856dc7..f82d6be2ecd 100644
--- a/arch/ia64/include/asm/irqflags.h
+++ b/arch/ia64/include/asm/irqflags.h
@@ -10,8 +10,6 @@
10#ifndef _ASM_IA64_IRQFLAGS_H 10#ifndef _ASM_IA64_IRQFLAGS_H
11#define _ASM_IA64_IRQFLAGS_H 11#define _ASM_IA64_IRQFLAGS_H
12 12
13#include <asm/pal.h>
14
15#ifdef CONFIG_IA64_DEBUG_IRQ 13#ifdef CONFIG_IA64_DEBUG_IRQ
16extern unsigned long last_cli_ip; 14extern unsigned long last_cli_ip;
17static inline void arch_maybe_save_ip(unsigned long flags) 15static inline void arch_maybe_save_ip(unsigned long flags)
diff --git a/arch/ia64/include/asm/kexec.h b/arch/ia64/include/asm/kexec.h
index aea2b81b03a..e1d58f819d7 100644
--- a/arch/ia64/include/asm/kexec.h
+++ b/arch/ia64/include/asm/kexec.h
@@ -1,7 +1,6 @@
1#ifndef _ASM_IA64_KEXEC_H 1#ifndef _ASM_IA64_KEXEC_H
2#define _ASM_IA64_KEXEC_H 2#define _ASM_IA64_KEXEC_H
3 3
4#include <asm/setup.h>
5 4
6/* Maximum physical address we can use pages from */ 5/* Maximum physical address we can use pages from */
7#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) 6#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 6d6a5ac48d8..2689ee54a1c 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -365,7 +365,6 @@ struct thash_cb {
365}; 365};
366 366
367struct kvm_vcpu_stat { 367struct kvm_vcpu_stat {
368 u32 halt_wakeup;
369}; 368};
370 369
371struct kvm_vcpu_arch { 370struct kvm_vcpu_arch {
@@ -449,8 +448,6 @@ struct kvm_vcpu_arch {
449 char log_buf[VMM_LOG_LEN]; 448 char log_buf[VMM_LOG_LEN];
450 union context host; 449 union context host;
451 union context guest; 450 union context guest;
452
453 char mmio_data[8];
454}; 451};
455 452
456struct kvm_vm_stat { 453struct kvm_vm_stat {
@@ -462,9 +459,6 @@ struct kvm_sal_data {
462 unsigned long boot_gp; 459 unsigned long boot_gp;
463}; 460};
464 461
465struct kvm_arch_memory_slot {
466};
467
468struct kvm_arch { 462struct kvm_arch {
469 spinlock_t dirty_log_lock; 463 spinlock_t dirty_log_lock;
470 464
diff --git a/arch/ia64/include/asm/machvec.h b/arch/ia64/include/asm/machvec.h
index 2d1ad4b11a8..367d299d993 100644
--- a/arch/ia64/include/asm/machvec.h
+++ b/arch/ia64/include/asm/machvec.h
@@ -120,7 +120,7 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
120# ifdef MACHVEC_PLATFORM_HEADER 120# ifdef MACHVEC_PLATFORM_HEADER
121# include MACHVEC_PLATFORM_HEADER 121# include MACHVEC_PLATFORM_HEADER
122# else 122# else
123# define ia64_platform_name ia64_mv.name 123# define platform_name ia64_mv.name
124# define platform_setup ia64_mv.setup 124# define platform_setup ia64_mv.setup
125# define platform_cpu_init ia64_mv.cpu_init 125# define platform_cpu_init ia64_mv.cpu_init
126# define platform_irq_init ia64_mv.irq_init 126# define platform_irq_init ia64_mv.irq_init
diff --git a/arch/ia64/include/asm/machvec_dig.h b/arch/ia64/include/asm/machvec_dig.h
index 1f7403a2fbe..8a0752f4098 100644
--- a/arch/ia64/include/asm/machvec_dig.h
+++ b/arch/ia64/include/asm/machvec_dig.h
@@ -10,7 +10,7 @@ extern ia64_mv_setup_t dig_setup;
10 * platform's machvec structure. When compiling a non-generic kernel, 10 * platform's machvec structure. When compiling a non-generic kernel,
11 * the macros are used directly. 11 * the macros are used directly.
12 */ 12 */
13#define ia64_platform_name "dig" 13#define platform_name "dig"
14#define platform_setup dig_setup 14#define platform_setup dig_setup
15 15
16#endif /* _ASM_IA64_MACHVEC_DIG_h */ 16#endif /* _ASM_IA64_MACHVEC_DIG_h */
diff --git a/arch/ia64/include/asm/machvec_dig_vtd.h b/arch/ia64/include/asm/machvec_dig_vtd.h
index 44308b4c3f6..6ab1de5c45e 100644
--- a/arch/ia64/include/asm/machvec_dig_vtd.h
+++ b/arch/ia64/include/asm/machvec_dig_vtd.h
@@ -11,7 +11,7 @@ extern ia64_mv_dma_init pci_iommu_alloc;
11 * platform's machvec structure. When compiling a non-generic kernel, 11 * platform's machvec structure. When compiling a non-generic kernel,
12 * the macros are used directly. 12 * the macros are used directly.
13 */ 13 */
14#define ia64_platform_name "dig_vtd" 14#define platform_name "dig_vtd"
15#define platform_setup dig_setup 15#define platform_setup dig_setup
16#define platform_dma_init pci_iommu_alloc 16#define platform_dma_init pci_iommu_alloc
17 17
diff --git a/arch/ia64/include/asm/machvec_hpsim.h b/arch/ia64/include/asm/machvec_hpsim.h
index e7571127936..cf72fc87fdf 100644
--- a/arch/ia64/include/asm/machvec_hpsim.h
+++ b/arch/ia64/include/asm/machvec_hpsim.h
@@ -11,7 +11,7 @@ extern ia64_mv_irq_init_t hpsim_irq_init;
11 * platform's machvec structure. When compiling a non-generic kernel, 11 * platform's machvec structure. When compiling a non-generic kernel,
12 * the macros are used directly. 12 * the macros are used directly.
13 */ 13 */
14#define ia64_platform_name "hpsim" 14#define platform_name "hpsim"
15#define platform_setup hpsim_setup 15#define platform_setup hpsim_setup
16#define platform_irq_init hpsim_irq_init 16#define platform_irq_init hpsim_irq_init
17 17
diff --git a/arch/ia64/include/asm/machvec_hpzx1.h b/arch/ia64/include/asm/machvec_hpzx1.h
index c74d3159e9e..3bd83d78a41 100644
--- a/arch/ia64/include/asm/machvec_hpzx1.h
+++ b/arch/ia64/include/asm/machvec_hpzx1.h
@@ -11,7 +11,7 @@ extern ia64_mv_dma_init sba_dma_init;
11 * platform's machvec structure. When compiling a non-generic kernel, 11 * platform's machvec structure. When compiling a non-generic kernel,
12 * the macros are used directly. 12 * the macros are used directly.
13 */ 13 */
14#define ia64_platform_name "hpzx1" 14#define platform_name "hpzx1"
15#define platform_setup dig_setup 15#define platform_setup dig_setup
16#define platform_dma_init sba_dma_init 16#define platform_dma_init sba_dma_init
17 17
diff --git a/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h b/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
index 906ef621077..1091ac39740 100644
--- a/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
+++ b/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
@@ -11,7 +11,7 @@ extern ia64_mv_dma_get_ops hwsw_dma_get_ops;
11 * platform's machvec structure. When compiling a non-generic kernel, 11 * platform's machvec structure. When compiling a non-generic kernel,
12 * the macros are used directly. 12 * the macros are used directly.
13 */ 13 */
14#define ia64_platform_name "hpzx1_swiotlb" 14#define platform_name "hpzx1_swiotlb"
15#define platform_setup dig_setup 15#define platform_setup dig_setup
16#define platform_dma_init machvec_noop 16#define platform_dma_init machvec_noop
17#define platform_dma_get_ops hwsw_dma_get_ops 17#define platform_dma_get_ops hwsw_dma_get_ops
diff --git a/arch/ia64/include/asm/machvec_sn2.h b/arch/ia64/include/asm/machvec_sn2.h
index ece9fa85be8..f061a30aac4 100644
--- a/arch/ia64/include/asm/machvec_sn2.h
+++ b/arch/ia64/include/asm/machvec_sn2.h
@@ -71,7 +71,7 @@ extern ia64_mv_pci_fixup_bus_t sn_pci_fixup_bus;
71 * platform's machvec structure. When compiling a non-generic kernel, 71 * platform's machvec structure. When compiling a non-generic kernel,
72 * the macros are used directly. 72 * the macros are used directly.
73 */ 73 */
74#define ia64_platform_name "sn2" 74#define platform_name "sn2"
75#define platform_setup sn_setup 75#define platform_setup sn_setup
76#define platform_cpu_init sn_cpu_init 76#define platform_cpu_init sn_cpu_init
77#define platform_irq_init sn_irq_init 77#define platform_irq_init sn_irq_init
diff --git a/arch/ia64/include/asm/machvec_uv.h b/arch/ia64/include/asm/machvec_uv.h
index 2c50853f35a..2931447f381 100644
--- a/arch/ia64/include/asm/machvec_uv.h
+++ b/arch/ia64/include/asm/machvec_uv.h
@@ -20,7 +20,7 @@ extern ia64_mv_setup_t uv_setup;
20 * platform's machvec structure. When compiling a non-generic kernel, 20 * platform's machvec structure. When compiling a non-generic kernel,
21 * the macros are used directly. 21 * the macros are used directly.
22 */ 22 */
23#define ia64_platform_name "uv" 23#define platform_name "uv"
24#define platform_setup uv_setup 24#define platform_setup uv_setup
25 25
26#endif /* _ASM_IA64_MACHVEC_UV_H */ 26#endif /* _ASM_IA64_MACHVEC_UV_H */
diff --git a/arch/ia64/include/asm/machvec_xen.h b/arch/ia64/include/asm/machvec_xen.h
index 8b8bd0eb392..55f9228056c 100644
--- a/arch/ia64/include/asm/machvec_xen.h
+++ b/arch/ia64/include/asm/machvec_xen.h
@@ -13,7 +13,7 @@ extern ia64_mv_send_ipi_t xen_platform_send_ipi;
13 * platform's machvec structure. When compiling a non-generic kernel, 13 * platform's machvec structure. When compiling a non-generic kernel,
14 * the macros are used directly. 14 * the macros are used directly.
15 */ 15 */
16#define ia64_platform_name "xen" 16#define platform_name "xen"
17#define platform_setup dig_setup 17#define platform_setup dig_setup
18#define platform_cpu_init xen_cpu_init 18#define platform_cpu_init xen_cpu_init
19#define platform_irq_init xen_irq_init 19#define platform_irq_init xen_irq_init
diff --git a/arch/ia64/include/asm/mca_asm.h b/arch/ia64/include/asm/mca_asm.h
index 13c1d4994d4..dd2a5b13439 100644
--- a/arch/ia64/include/asm/mca_asm.h
+++ b/arch/ia64/include/asm/mca_asm.h
@@ -15,8 +15,6 @@
15#ifndef _ASM_IA64_MCA_ASM_H 15#ifndef _ASM_IA64_MCA_ASM_H
16#define _ASM_IA64_MCA_ASM_H 16#define _ASM_IA64_MCA_ASM_H
17 17
18#include <asm/percpu.h>
19
20#define PSR_IC 13 18#define PSR_IC 13
21#define PSR_I 14 19#define PSR_I 14
22#define PSR_DT 17 20#define PSR_DT 17
diff --git a/arch/ia64/include/asm/mman.h b/arch/ia64/include/asm/mman.h
index fdd5f5229f7..4459028e5aa 100644
--- a/arch/ia64/include/asm/mman.h
+++ b/arch/ia64/include/asm/mman.h
@@ -1,17 +1,23 @@
1#ifndef _ASM_IA64_MMAN_H
2#define _ASM_IA64_MMAN_H
3
1/* 4/*
2 * Based on <asm-i386/mman.h>. 5 * Based on <asm-i386/mman.h>.
3 * 6 *
4 * Modified 1998-2000, 2002 7 * Modified 1998-2000, 2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */ 9 */
7#ifndef _ASM_IA64_MMAN_H
8#define _ASM_IA64_MMAN_H
9 10
10#include <uapi/asm/mman.h> 11#include <asm-generic/mman.h>
12
13#define MAP_GROWSUP 0x0200 /* register stack-like segment */
11 14
15#ifdef __KERNEL__
12#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
13#define arch_mmap_check ia64_mmap_check 17#define arch_mmap_check ia64_mmap_check
14int ia64_mmap_check(unsigned long addr, unsigned long len, 18int ia64_mmap_check(unsigned long addr, unsigned long len,
15 unsigned long flags); 19 unsigned long flags);
16#endif 20#endif
21#endif
22
17#endif /* _ASM_IA64_MMAN_H */ 23#endif /* _ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/asm/module.h b/arch/ia64/include/asm/module.h
index dfba22a872c..908eaef42a0 100644
--- a/arch/ia64/include/asm/module.h
+++ b/arch/ia64/include/asm/module.h
@@ -1,8 +1,6 @@
1#ifndef _ASM_IA64_MODULE_H 1#ifndef _ASM_IA64_MODULE_H
2#define _ASM_IA64_MODULE_H 2#define _ASM_IA64_MODULE_H
3 3
4#include <asm-generic/module.h>
5
6/* 4/*
7 * IA-64-specific support for kernel module loader. 5 * IA-64-specific support for kernel module loader.
8 * 6 *
@@ -31,6 +29,10 @@ struct mod_arch_specific {
31 unsigned int next_got_entry; /* index of next available got entry */ 29 unsigned int next_got_entry; /* index of next available got entry */
32}; 30};
33 31
32#define Elf_Shdr Elf64_Shdr
33#define Elf_Sym Elf64_Sym
34#define Elf_Ehdr Elf64_Ehdr
35
34#define MODULE_PROC_FAMILY "ia64" 36#define MODULE_PROC_FAMILY "ia64"
35#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \ 37#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \
36 "gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__) 38 "gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
diff --git a/arch/ia64/include/asm/numa.h b/arch/ia64/include/asm/numa.h
index 2e27ef17565..6a8a27cfae3 100644
--- a/arch/ia64/include/asm/numa.h
+++ b/arch/ia64/include/asm/numa.h
@@ -59,7 +59,7 @@ extern struct node_cpuid_s node_cpuid[NR_CPUS];
59 */ 59 */
60 60
61extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; 61extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
62#define node_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)]) 62#define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)])
63 63
64extern int paddr_to_nid(unsigned long paddr); 64extern int paddr_to_nid(unsigned long paddr);
65 65
diff --git a/arch/ia64/include/asm/page.h b/arch/ia64/include/asm/page.h
index f1e1b2e3cdb..961a16f43e6 100644
--- a/arch/ia64/include/asm/page.h
+++ b/arch/ia64/include/asm/page.h
@@ -221,14 +221,4 @@ get_order (unsigned long size)
221 (((current->personality & READ_IMPLIES_EXEC) != 0) \ 221 (((current->personality & READ_IMPLIES_EXEC) != 0) \
222 ? VM_EXEC : 0)) 222 ? VM_EXEC : 0))
223 223
224#define GATE_ADDR RGN_BASE(RGN_GATE)
225
226/*
227 * 0xa000000000000000+2*PERCPU_PAGE_SIZE
228 * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
229 */
230#define KERNEL_START (GATE_ADDR+__IA64_UL_CONST(0x100000000))
231#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
232#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
233
234#endif /* _ASM_IA64_PAGE_H */ 224#endif /* _ASM_IA64_PAGE_H */
diff --git a/arch/ia64/include/asm/param.h b/arch/ia64/include/asm/param.h
index 1295913d6a8..0964c32c135 100644
--- a/arch/ia64/include/asm/param.h
+++ b/arch/ia64/include/asm/param.h
@@ -1,3 +1,6 @@
1#ifndef _ASM_IA64_PARAM_H
2#define _ASM_IA64_PARAM_H
3
1/* 4/*
2 * Fundamental kernel parameters. 5 * Fundamental kernel parameters.
3 * 6 *
@@ -6,12 +9,25 @@
6 * Modified 1998, 1999, 2002-2003 9 * Modified 1998, 1999, 2002-2003
7 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 10 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
8 */ 11 */
9#ifndef _ASM_IA64_PARAM_H
10#define _ASM_IA64_PARAM_H
11 12
12#include <uapi/asm/param.h> 13#define EXEC_PAGESIZE 65536
14
15#ifndef NOGROUP
16# define NOGROUP (-1)
17#endif
13 18
19#define MAXHOSTNAMELEN 64 /* max length of hostname */
20
21#ifdef __KERNEL__
14# define HZ CONFIG_HZ 22# define HZ CONFIG_HZ
15# define USER_HZ HZ 23# define USER_HZ HZ
16# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ 24# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
25#else
26 /*
27 * Technically, this is wrong, but some old apps still refer to it. The proper way to
28 * get the HZ value is via sysconf(_SC_CLK_TCK).
29 */
30# define HZ 1024
31#endif
32
17#endif /* _ASM_IA64_PARAM_H */ 33#endif /* _ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/asm/paravirt.h b/arch/ia64/include/asm/paravirt.h
index b149b88ea79..32551d304cd 100644
--- a/arch/ia64/include/asm/paravirt.h
+++ b/arch/ia64/include/asm/paravirt.h
@@ -281,9 +281,9 @@ paravirt_init_missing_ticks_accounting(int cpu)
281 pv_time_ops.init_missing_ticks_accounting(cpu); 281 pv_time_ops.init_missing_ticks_accounting(cpu);
282} 282}
283 283
284struct static_key; 284struct jump_label_key;
285extern struct static_key paravirt_steal_enabled; 285extern struct jump_label_key paravirt_steal_enabled;
286extern struct static_key paravirt_steal_rq_enabled; 286extern struct jump_label_key paravirt_steal_rq_enabled;
287 287
288static inline int 288static inline int
289paravirt_do_steal_accounting(unsigned long *new_itm) 289paravirt_do_steal_accounting(unsigned long *new_itm)
diff --git a/arch/ia64/include/asm/parport.h b/arch/ia64/include/asm/parport.h
index 638b4d271b9..67e16adfcd2 100644
--- a/arch/ia64/include/asm/parport.h
+++ b/arch/ia64/include/asm/parport.h
@@ -9,9 +9,10 @@
9#ifndef _ASM_IA64_PARPORT_H 9#ifndef _ASM_IA64_PARPORT_H
10#define _ASM_IA64_PARPORT_H 1 10#define _ASM_IA64_PARPORT_H 1
11 11
12static int parport_pc_find_isa_ports(int autoirq, int autodma); 12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13 13
14static int parport_pc_find_nonpci_ports(int autoirq, int autodma) 14static int __devinit
15parport_pc_find_nonpci_ports (int autoirq, int autodma)
15{ 16{
16 return parport_pc_find_isa_ports(autoirq, autodma); 17 return parport_pc_find_isa_ports(autoirq, autodma);
17} 18}
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 5e04b591e42..127dd7be346 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -11,14 +11,6 @@
11#include <asm/scatterlist.h> 11#include <asm/scatterlist.h>
12#include <asm/hw_irq.h> 12#include <asm/hw_irq.h>
13 13
14struct pci_vector_struct {
15 __u16 segment; /* PCI Segment number */
16 __u16 bus; /* PCI Bus number */
17 __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
18 __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
19 __u32 irq; /* IRQ assigned */
20};
21
22/* 14/*
23 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus 15 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
24 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the 16 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
@@ -51,6 +43,12 @@ extern unsigned long ia64_max_iommu_merge_mask;
51#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) 43#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
52 44
53static inline void 45static inline void
46pcibios_set_master (struct pci_dev *dev)
47{
48 /* No special bus mastering setup handling */
49}
50
51static inline void
54pcibios_penalize_isa_irq (int irq, int active) 52pcibios_penalize_isa_irq (int irq, int active)
55{ 53{
56 /* We don't do dynamic PCI IRQ allocation */ 54 /* We don't do dynamic PCI IRQ allocation */
@@ -116,6 +114,12 @@ static inline int pci_proc_domain(struct pci_bus *bus)
116 return (pci_domain_nr(bus) != 0); 114 return (pci_domain_nr(bus) != 0);
117} 115}
118 116
117extern void pcibios_resource_to_bus(struct pci_dev *dev,
118 struct pci_bus_region *region, struct resource *res);
119
120extern void pcibios_bus_to_resource(struct pci_dev *dev,
121 struct resource *res, struct pci_bus_region *region);
122
119static inline struct resource * 123static inline struct resource *
120pcibios_select_root(struct pci_dev *pdev, struct resource *res) 124pcibios_select_root(struct pci_dev *pdev, struct resource *res)
121{ 125{
diff --git a/arch/ia64/include/asm/perfmon.h b/arch/ia64/include/asm/perfmon.h
index 15476dd3a8b..d551183fee9 100644
--- a/arch/ia64/include/asm/perfmon.h
+++ b/arch/ia64/include/asm/perfmon.h
@@ -2,12 +2,179 @@
2 * Copyright (C) 2001-2003 Hewlett-Packard Co 2 * Copyright (C) 2001-2003 Hewlett-Packard Co
3 * Stephane Eranian <eranian@hpl.hp.com> 3 * Stephane Eranian <eranian@hpl.hp.com>
4 */ 4 */
5
5#ifndef _ASM_IA64_PERFMON_H 6#ifndef _ASM_IA64_PERFMON_H
6#define _ASM_IA64_PERFMON_H 7#define _ASM_IA64_PERFMON_H
7 8
8#include <uapi/asm/perfmon.h> 9/*
10 * perfmon commands supported on all CPU models
11 */
12#define PFM_WRITE_PMCS 0x01
13#define PFM_WRITE_PMDS 0x02
14#define PFM_READ_PMDS 0x03
15#define PFM_STOP 0x04
16#define PFM_START 0x05
17#define PFM_ENABLE 0x06 /* obsolete */
18#define PFM_DISABLE 0x07 /* obsolete */
19#define PFM_CREATE_CONTEXT 0x08
20#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */
21#define PFM_RESTART 0x0a
22#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */
23#define PFM_GET_FEATURES 0x0c
24#define PFM_DEBUG 0x0d
25#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */
26#define PFM_GET_PMC_RESET_VAL 0x0f
27#define PFM_LOAD_CONTEXT 0x10
28#define PFM_UNLOAD_CONTEXT 0x11
29
30/*
31 * PMU model specific commands (may not be supported on all PMU models)
32 */
33#define PFM_WRITE_IBRS 0x20
34#define PFM_WRITE_DBRS 0x21
35
36/*
37 * context flags
38 */
39#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */
40#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */
41#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */
42
43/*
44 * event set flags
45 */
46#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */
47
48/*
49 * PMC flags
50 */
51#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */
52#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
53
54/*
55 * PMD/PMC/IBR/DBR return flags (ignored on input)
56 *
57 * Those flags are used on output and must be checked in case EAGAIN is returned
58 * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
59 */
60#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
61#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */
62#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
63
64#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0)
65
66typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */
67
68/*
69 * Request structure used to define a context
70 */
71typedef struct {
72 pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */
73 unsigned long ctx_flags; /* noblock/block */
74 unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */
75 unsigned short ctx_reserved1; /* for future use */
76 int ctx_fd; /* return arg: unique identification for context */
77 void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */
78 unsigned long ctx_reserved2[11];/* for future use */
79} pfarg_context_t;
80
81/*
82 * Request structure used to write/read a PMC or PMD
83 */
84typedef struct {
85 unsigned int reg_num; /* which register */
86 unsigned short reg_set; /* event set for this register */
87 unsigned short reg_reserved1; /* for future use */
88
89 unsigned long reg_value; /* initial pmc/pmd value */
90 unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */
91
92 unsigned long reg_long_reset; /* reset after buffer overflow notification */
93 unsigned long reg_short_reset; /* reset after counter overflow */
94
95 unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */
96 unsigned long reg_random_seed; /* seed value when randomization is used */
97 unsigned long reg_random_mask; /* bitmask used to limit random value */
98 unsigned long reg_last_reset_val;/* return: PMD last reset value */
99
100 unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */
101 unsigned long reg_smpl_eventid; /* opaque sampling event identifier */
102
103 unsigned long reg_reserved2[3]; /* for future use */
104} pfarg_reg_t;
105
106typedef struct {
107 unsigned int dbreg_num; /* which debug register */
108 unsigned short dbreg_set; /* event set for this register */
109 unsigned short dbreg_reserved1; /* for future use */
110 unsigned long dbreg_value; /* value for debug register */
111 unsigned long dbreg_flags; /* return: dbreg error */
112 unsigned long dbreg_reserved2[1]; /* for future use */
113} pfarg_dbreg_t;
114
115typedef struct {
116 unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */
117 unsigned int ft_reserved; /* reserved for future use */
118 unsigned long reserved[4]; /* for future use */
119} pfarg_features_t;
120
121typedef struct {
122 pid_t load_pid; /* process to load the context into */
123 unsigned short load_set; /* first event set to load */
124 unsigned short load_reserved1; /* for future use */
125 unsigned long load_reserved2[3]; /* for future use */
126} pfarg_load_t;
127
128typedef struct {
129 int msg_type; /* generic message header */
130 int msg_ctx_fd; /* generic message header */
131 unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */
132 unsigned short msg_active_set; /* active set at the time of overflow */
133 unsigned short msg_reserved1; /* for future use */
134 unsigned int msg_reserved2; /* for future use */
135 unsigned long msg_tstamp; /* for perf tuning/debug */
136} pfm_ovfl_msg_t;
137
138typedef struct {
139 int msg_type; /* generic message header */
140 int msg_ctx_fd; /* generic message header */
141 unsigned long msg_tstamp; /* for perf tuning */
142} pfm_end_msg_t;
143
144typedef struct {
145 int msg_type; /* type of the message */
146 int msg_ctx_fd; /* unique identifier for the context */
147 unsigned long msg_tstamp; /* for perf tuning */
148} pfm_gen_msg_t;
149
150#define PFM_MSG_OVFL 1 /* an overflow happened */
151#define PFM_MSG_END 2 /* task to which context was attached ended */
152
153typedef union {
154 pfm_ovfl_msg_t pfm_ovfl_msg;
155 pfm_end_msg_t pfm_end_msg;
156 pfm_gen_msg_t pfm_gen_msg;
157} pfm_msg_t;
158
159/*
160 * Define the version numbers for both perfmon as a whole and the sampling buffer format.
161 */
162#define PFM_VERSION_MAJ 2U
163#define PFM_VERSION_MIN 0U
164#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
165#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff)
166#define PFM_VERSION_MINOR(x) ((x) & 0xffff)
9 167
10 168
169/*
170 * miscellaneous architected definitions
171 */
172#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */
173#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
174#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
175
176#ifdef __KERNEL__
177
11extern long perfmonctl(int fd, int cmd, void *arg, int narg); 178extern long perfmonctl(int fd, int cmd, void *arg, int narg);
12 179
13typedef struct { 180typedef struct {
@@ -107,4 +274,6 @@ typedef struct {
107extern pfm_sysctl_t pfm_sysctl; 274extern pfm_sysctl_t pfm_sysctl;
108 275
109 276
277#endif /* __KERNEL__ */
278
110#endif /* _ASM_IA64_PERFMON_H */ 279#endif /* _ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/asm/pgtable.h b/arch/ia64/include/asm/pgtable.h
index 815810cbbed..1a97af31ef1 100644
--- a/arch/ia64/include/asm/pgtable.h
+++ b/arch/ia64/include/asm/pgtable.h
@@ -16,6 +16,7 @@
16#include <asm/mman.h> 16#include <asm/mman.h>
17#include <asm/page.h> 17#include <asm/page.h>
18#include <asm/processor.h> 18#include <asm/processor.h>
19#include <asm/system.h>
19#include <asm/types.h> 20#include <asm/types.h>
20 21
21#define IA64_MAX_PHYS_BITS 50 /* max. number of physical address bits (architected) */ 22#define IA64_MAX_PHYS_BITS 50 /* max. number of physical address bits (architected) */
diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h
index e0a899a1a8a..d9f397fae03 100644
--- a/arch/ia64/include/asm/processor.h
+++ b/arch/ia64/include/asm/processor.h
@@ -19,9 +19,6 @@
19#include <asm/ptrace.h> 19#include <asm/ptrace.h>
20#include <asm/ustack.h> 20#include <asm/ustack.h>
21 21
22#define __ARCH_WANT_UNLOCKED_CTXSW
23#define ARCH_HAS_PREFETCH_SWITCH_STACK
24
25#define IA64_NUM_PHYS_STACK_REG 96 22#define IA64_NUM_PHYS_STACK_REG 96
26#define IA64_NUM_DBG_REGS 8 23#define IA64_NUM_DBG_REGS 8
27 24
@@ -34,7 +31,8 @@
34 * each (assuming 8KB page size), for a total of 8TB of user virtual 31 * each (assuming 8KB page size), for a total of 8TB of user virtual
35 * address space. 32 * address space.
36 */ 33 */
37#define TASK_SIZE DEFAULT_TASK_SIZE 34#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size)
35#define TASK_SIZE TASK_SIZE_OF(current)
38 36
39/* 37/*
40 * This decides where the kernel will search for a free chunk of vm 38 * This decides where the kernel will search for a free chunk of vm
@@ -279,6 +277,7 @@ struct thread_struct {
279 __u8 pad[3]; 277 __u8 pad[3];
280 __u64 ksp; /* kernel stack pointer */ 278 __u64 ksp; /* kernel stack pointer */
281 __u64 map_base; /* base address for get_unmapped_area() */ 279 __u64 map_base; /* base address for get_unmapped_area() */
280 __u64 task_size; /* limit for task size */
282 __u64 rbs_bot; /* the base address for the RBS */ 281 __u64 rbs_bot; /* the base address for the RBS */
283 int last_fph_cpu; /* CPU that may hold the contents of f32-f127 */ 282 int last_fph_cpu; /* CPU that may hold the contents of f32-f127 */
284 283
@@ -301,6 +300,7 @@ struct thread_struct {
301 .ksp = 0, \ 300 .ksp = 0, \
302 .map_base = DEFAULT_MAP_BASE, \ 301 .map_base = DEFAULT_MAP_BASE, \
303 .rbs_bot = STACK_TOP - DEFAULT_USER_STACK_SIZE, \ 302 .rbs_bot = STACK_TOP - DEFAULT_USER_STACK_SIZE, \
303 .task_size = DEFAULT_TASK_SIZE, \
304 .last_fph_cpu = -1, \ 304 .last_fph_cpu = -1, \
305 INIT_THREAD_PM \ 305 INIT_THREAD_PM \
306 .dbr = {0, }, \ 306 .dbr = {0, }, \
@@ -309,6 +309,7 @@ struct thread_struct {
309} 309}
310 310
311#define start_thread(regs,new_ip,new_sp) do { \ 311#define start_thread(regs,new_ip,new_sp) do { \
312 set_fs(USER_DS); \
312 regs->cr_ipsr = ((regs->cr_ipsr | (IA64_PSR_BITS_TO_SET | IA64_PSR_CPL)) \ 313 regs->cr_ipsr = ((regs->cr_ipsr | (IA64_PSR_BITS_TO_SET | IA64_PSR_CPL)) \
313 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_RI | IA64_PSR_IS)); \ 314 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_RI | IA64_PSR_IS)); \
314 regs->cr_iip = new_ip; \ 315 regs->cr_iip = new_ip; \
@@ -340,6 +341,25 @@ struct task_struct;
340 */ 341 */
341#define release_thread(dead_task) 342#define release_thread(dead_task)
342 343
344/* Prepare to copy thread state - unlazy all lazy status */
345#define prepare_to_copy(tsk) do { } while (0)
346
347/*
348 * This is the mechanism for creating a new kernel thread.
349 *
350 * NOTE 1: Only a kernel-only process (ie the swapper or direct
351 * descendants who haven't done an "execve()") should use this: it
352 * will work within a system call from a "real" process, but the
353 * process memory space will not be free'd until both the parent and
354 * the child have exited.
355 *
356 * NOTE 2: This MUST NOT be an inlined function. Otherwise, we get
357 * into trouble in init/main.c when the child thread returns to
358 * do_basic_setup() and the timing is such that free_initmem() has
359 * been called already.
360 */
361extern pid_t kernel_thread (int (*fn)(void *), void *arg, unsigned long flags);
362
343/* Get wait channel for task P. */ 363/* Get wait channel for task P. */
344extern unsigned long get_wchan (struct task_struct *p); 364extern unsigned long get_wchan (struct task_struct *p);
345 365
@@ -701,10 +721,6 @@ extern unsigned long boot_option_idle_override;
701enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT, 721enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT,
702 IDLE_NOMWAIT, IDLE_POLL}; 722 IDLE_NOMWAIT, IDLE_POLL};
703 723
704void default_idle(void);
705
706#define ia64_platform_is(x) (strcmp(x, ia64_platform_name) == 0)
707
708#endif /* !__ASSEMBLY__ */ 724#endif /* !__ASSEMBLY__ */
709 725
710#endif /* _ASM_IA64_PROCESSOR_H */ 726#endif /* _ASM_IA64_PROCESSOR_H */
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 845143990a1..f5cb27614e3 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -1,3 +1,6 @@
1#ifndef _ASM_IA64_PTRACE_H
2#define _ASM_IA64_PTRACE_H
3
1/* 4/*
2 * Copyright (C) 1998-2004 Hewlett-Packard Co 5 * Copyright (C) 1998-2004 Hewlett-Packard Co
3 * David Mosberger-Tang <davidm@hpl.hp.com> 6 * David Mosberger-Tang <davidm@hpl.hp.com>
@@ -12,13 +15,52 @@
12 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack" 15 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
13 * 16 *
14 */ 17 */
15#ifndef _ASM_IA64_PTRACE_H 18/*
16#define _ASM_IA64_PTRACE_H 19 * When a user process is blocked, its state looks as follows:
20 *
21 * +----------------------+ ------- IA64_STK_OFFSET
22 * | | ^
23 * | struct pt_regs | |
24 * | | |
25 * +----------------------+ |
26 * | | |
27 * | memory stack | |
28 * | (growing downwards) | |
29 * //.....................// |
30 * |
31 * //.....................// |
32 * | | |
33 * +----------------------+ |
34 * | struct switch_stack | |
35 * | | |
36 * +----------------------+ |
37 * | | |
38 * //.....................// |
39 * |
40 * //.....................// |
41 * | | |
42 * | register stack | |
43 * | (growing upwards) | |
44 * | | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
48 * | | | |
49 * | struct task_struct | | |
50 * current -> | | | |
51 * +----------------------+ -------
52 *
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
55 */
56
57
58#include <asm/fpu.h>
17 59
60#ifdef __KERNEL__
18#ifndef ASM_OFFSETS_C 61#ifndef ASM_OFFSETS_C
19#include <asm/asm-offsets.h> 62#include <asm/asm-offsets.h>
20#endif 63#endif
21#include <uapi/asm/ptrace.h>
22 64
23/* 65/*
24 * Base-2 logarithm of number of pages to allocate per task structure 66 * Base-2 logarithm of number of pages to allocate per task structure
@@ -39,8 +81,155 @@
39 81
40#define KERNEL_STACK_SIZE IA64_STK_OFFSET 82#define KERNEL_STACK_SIZE IA64_STK_OFFSET
41 83
84#endif /* __KERNEL__ */
85
42#ifndef __ASSEMBLY__ 86#ifndef __ASSEMBLY__
43 87
88/*
89 * This struct defines the way the registers are saved on system
90 * calls.
91 *
92 * We don't save all floating point register because the kernel
93 * is compiled to use only a very small subset, so the other are
94 * untouched.
95 *
96 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
97 * (because the memory stack pointer MUST ALWAYS be aligned this way)
98 *
99 */
100struct pt_regs {
101 /* The following registers are saved by SAVE_MIN: */
102 unsigned long b6; /* scratch */
103 unsigned long b7; /* scratch */
104
105 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
106 unsigned long ar_ssd; /* reserved for future use (scratch) */
107
108 unsigned long r8; /* scratch (return value register 0) */
109 unsigned long r9; /* scratch (return value register 1) */
110 unsigned long r10; /* scratch (return value register 2) */
111 unsigned long r11; /* scratch (return value register 3) */
112
113 unsigned long cr_ipsr; /* interrupted task's psr */
114 unsigned long cr_iip; /* interrupted task's instruction pointer */
115 /*
116 * interrupted task's function state; if bit 63 is cleared, it
117 * contains syscall's ar.pfs.pfm:
118 */
119 unsigned long cr_ifs;
120
121 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
122 unsigned long ar_pfs; /* prev function state */
123 unsigned long ar_rsc; /* RSE configuration */
124 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
125 unsigned long ar_rnat; /* RSE NaT */
126 unsigned long ar_bspstore; /* RSE bspstore */
127
128 unsigned long pr; /* 64 predicate registers (1 bit each) */
129 unsigned long b0; /* return pointer (bp) */
130 unsigned long loadrs; /* size of dirty partition << 16 */
131
132 unsigned long r1; /* the gp pointer */
133 unsigned long r12; /* interrupted task's memory stack pointer */
134 unsigned long r13; /* thread pointer */
135
136 unsigned long ar_fpsr; /* floating point status (preserved) */
137 unsigned long r15; /* scratch */
138
139 /* The remaining registers are NOT saved for system calls. */
140
141 unsigned long r14; /* scratch */
142 unsigned long r2; /* scratch */
143 unsigned long r3; /* scratch */
144
145 /* The following registers are saved by SAVE_REST: */
146 unsigned long r16; /* scratch */
147 unsigned long r17; /* scratch */
148 unsigned long r18; /* scratch */
149 unsigned long r19; /* scratch */
150 unsigned long r20; /* scratch */
151 unsigned long r21; /* scratch */
152 unsigned long r22; /* scratch */
153 unsigned long r23; /* scratch */
154 unsigned long r24; /* scratch */
155 unsigned long r25; /* scratch */
156 unsigned long r26; /* scratch */
157 unsigned long r27; /* scratch */
158 unsigned long r28; /* scratch */
159 unsigned long r29; /* scratch */
160 unsigned long r30; /* scratch */
161 unsigned long r31; /* scratch */
162
163 unsigned long ar_ccv; /* compare/exchange value (scratch) */
164
165 /*
166 * Floating point registers that the kernel considers scratch:
167 */
168 struct ia64_fpreg f6; /* scratch */
169 struct ia64_fpreg f7; /* scratch */
170 struct ia64_fpreg f8; /* scratch */
171 struct ia64_fpreg f9; /* scratch */
172 struct ia64_fpreg f10; /* scratch */
173 struct ia64_fpreg f11; /* scratch */
174};
175
176/*
177 * This structure contains the addition registers that need to
178 * preserved across a context switch. This generally consists of
179 * "preserved" registers.
180 */
181struct switch_stack {
182 unsigned long caller_unat; /* user NaT collection register (preserved) */
183 unsigned long ar_fpsr; /* floating-point status register */
184
185 struct ia64_fpreg f2; /* preserved */
186 struct ia64_fpreg f3; /* preserved */
187 struct ia64_fpreg f4; /* preserved */
188 struct ia64_fpreg f5; /* preserved */
189
190 struct ia64_fpreg f12; /* scratch, but untouched by kernel */
191 struct ia64_fpreg f13; /* scratch, but untouched by kernel */
192 struct ia64_fpreg f14; /* scratch, but untouched by kernel */
193 struct ia64_fpreg f15; /* scratch, but untouched by kernel */
194 struct ia64_fpreg f16; /* preserved */
195 struct ia64_fpreg f17; /* preserved */
196 struct ia64_fpreg f18; /* preserved */
197 struct ia64_fpreg f19; /* preserved */
198 struct ia64_fpreg f20; /* preserved */
199 struct ia64_fpreg f21; /* preserved */
200 struct ia64_fpreg f22; /* preserved */
201 struct ia64_fpreg f23; /* preserved */
202 struct ia64_fpreg f24; /* preserved */
203 struct ia64_fpreg f25; /* preserved */
204 struct ia64_fpreg f26; /* preserved */
205 struct ia64_fpreg f27; /* preserved */
206 struct ia64_fpreg f28; /* preserved */
207 struct ia64_fpreg f29; /* preserved */
208 struct ia64_fpreg f30; /* preserved */
209 struct ia64_fpreg f31; /* preserved */
210
211 unsigned long r4; /* preserved */
212 unsigned long r5; /* preserved */
213 unsigned long r6; /* preserved */
214 unsigned long r7; /* preserved */
215
216 unsigned long b0; /* so we can force a direct return in copy_thread */
217 unsigned long b1;
218 unsigned long b2;
219 unsigned long b3;
220 unsigned long b4;
221 unsigned long b5;
222
223 unsigned long ar_pfs; /* previous function state */
224 unsigned long ar_lc; /* loop counter (preserved) */
225 unsigned long ar_unat; /* NaT bits for r4-r7 */
226 unsigned long ar_rnat; /* RSE NaT collection register */
227 unsigned long ar_bspstore; /* RSE dirty base (preserved) */
228 unsigned long pr; /* 64 predicate registers (1 bit each) */
229};
230
231#ifdef __KERNEL__
232
44#include <asm/current.h> 233#include <asm/current.h>
45#include <asm/page.h> 234#include <asm/page.h>
46 235
@@ -57,18 +246,7 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
57 return regs->ar_bspstore; 246 return regs->ar_bspstore;
58} 247}
59 248
60static inline int is_syscall_success(struct pt_regs *regs) 249#define regs_return_value(regs) ((regs)->r8)
61{
62 return regs->r10 != -1;
63}
64
65static inline long regs_return_value(struct pt_regs *regs)
66{
67 if (is_syscall_success(regs))
68 return regs->r8;
69 else
70 return -regs->r8;
71}
72 250
73/* Conserve space in histogram by encoding slot bits in address 251/* Conserve space in histogram by encoding slot bits in address
74 * bits 2 and 3 rather than bits 0 and 1. 252 * bits 2 and 3 rather than bits 0 and 1.
@@ -78,11 +256,6 @@ static inline long regs_return_value(struct pt_regs *regs)
78 unsigned long __ip = instruction_pointer(regs); \ 256 unsigned long __ip = instruction_pointer(regs); \
79 (__ip & ~3UL) + ((__ip & 3UL) << 2); \ 257 (__ip & ~3UL) + ((__ip & 3UL) << 2); \
80}) 258})
81/*
82 * Why not default? Because user_stack_pointer() on ia64 gives register
83 * stack backing store instead...
84 */
85#define current_user_stack_pointer() (current_pt_regs()->r12)
86 259
87 /* given a pointer to a task_struct, return the user's pt_regs */ 260 /* given a pointer to a task_struct, return the user's pt_regs */
88# define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1) 261# define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
@@ -147,5 +320,46 @@ static inline long regs_return_value(struct pt_regs *regs)
147 #define arch_has_single_step() (1) 320 #define arch_has_single_step() (1)
148 #define arch_has_block_step() (1) 321 #define arch_has_block_step() (1)
149 322
323#endif /* !__KERNEL__ */
324
325/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
326struct pt_all_user_regs {
327 unsigned long nat;
328 unsigned long cr_iip;
329 unsigned long cfm;
330 unsigned long cr_ipsr;
331 unsigned long pr;
332
333 unsigned long gr[32];
334 unsigned long br[8];
335 unsigned long ar[128];
336 struct ia64_fpreg fr[128];
337};
338
150#endif /* !__ASSEMBLY__ */ 339#endif /* !__ASSEMBLY__ */
340
341/* indices to application-registers array in pt_all_user_regs */
342#define PT_AUR_RSC 16
343#define PT_AUR_BSP 17
344#define PT_AUR_BSPSTORE 18
345#define PT_AUR_RNAT 19
346#define PT_AUR_CCV 32
347#define PT_AUR_UNAT 36
348#define PT_AUR_FPSR 40
349#define PT_AUR_PFS 64
350#define PT_AUR_LC 65
351#define PT_AUR_EC 66
352
353/*
354 * The numbers chosen here are somewhat arbitrary but absolutely MUST
355 * not overlap with any of the number assigned in <linux/ptrace.h>.
356 */
357#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
358#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
359#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
360#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
361#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
362
363#define PTRACE_OLDSETOPTIONS 21
364
151#endif /* _ASM_IA64_PTRACE_H */ 365#endif /* _ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/asm/sal.h b/arch/ia64/include/asm/sal.h
index e504f382115..d19ddba4e32 100644
--- a/arch/ia64/include/asm/sal.h
+++ b/arch/ia64/include/asm/sal.h
@@ -40,6 +40,7 @@
40#include <linux/efi.h> 40#include <linux/efi.h>
41 41
42#include <asm/pal.h> 42#include <asm/pal.h>
43#include <asm/system.h>
43#include <asm/fpu.h> 44#include <asm/fpu.h>
44 45
45extern spinlock_t sal_lock; 46extern spinlock_t sal_lock;
diff --git a/arch/ia64/include/asm/siginfo.h b/arch/ia64/include/asm/siginfo.h
index 6f2e2dd0f28..c8fcaa2ac48 100644
--- a/arch/ia64/include/asm/siginfo.h
+++ b/arch/ia64/include/asm/siginfo.h
@@ -1,14 +1,124 @@
1#ifndef _ASM_IA64_SIGINFO_H
2#define _ASM_IA64_SIGINFO_H
3
1/* 4/*
2 * Based on <asm-i386/siginfo.h>. 5 * Based on <asm-i386/siginfo.h>.
3 * 6 *
4 * Modified 1998-2002 7 * Modified 1998-2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */ 9 */
7#ifndef _ASM_IA64_SIGINFO_H
8#define _ASM_IA64_SIGINFO_H
9 10
11#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
12
13#define HAVE_ARCH_SIGINFO_T
14#define HAVE_ARCH_COPY_SIGINFO
15#define HAVE_ARCH_COPY_SIGINFO_TO_USER
16
17#include <asm-generic/siginfo.h>
18
19typedef struct siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23 int __pad0;
24
25 union {
26 int _pad[SI_PAD_SIZE];
27
28 /* kill() */
29 struct {
30 pid_t _pid; /* sender's pid */
31 uid_t _uid; /* sender's uid */
32 } _kill;
33
34 /* POSIX.1b timers */
35 struct {
36 timer_t _tid; /* timer id */
37 int _overrun; /* overrun count */
38 char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
39 sigval_t _sigval; /* must overlay ._rt._sigval! */
40 int _sys_private; /* not to be passed to user */
41 } _timer;
42
43 /* POSIX.1b signals */
44 struct {
45 pid_t _pid; /* sender's pid */
46 uid_t _uid; /* sender's uid */
47 sigval_t _sigval;
48 } _rt;
49
50 /* SIGCHLD */
51 struct {
52 pid_t _pid; /* which child */
53 uid_t _uid; /* sender's uid */
54 int _status; /* exit code */
55 clock_t _utime;
56 clock_t _stime;
57 } _sigchld;
58
59 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
60 struct {
61 void __user *_addr; /* faulting insn/memory ref. */
62 int _imm; /* immediate value for "break" */
63 unsigned int _flags; /* see below */
64 unsigned long _isr; /* isr */
65 short _addr_lsb; /* lsb of faulting address */
66 } _sigfault;
67
68 /* SIGPOLL */
69 struct {
70 long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
71 int _fd;
72 } _sigpoll;
73 } _sifields;
74} siginfo_t;
75
76#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */
77#define si_flags _sifields._sigfault._flags
78/*
79 * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
80 * si_code is non-zero and __ISR_VALID is set in si_flags.
81 */
82#define si_isr _sifields._sigfault._isr
83
84/*
85 * Flag values for si_flags:
86 */
87#define __ISR_VALID_BIT 0
88#define __ISR_VALID (1 << __ISR_VALID_BIT)
89
90/*
91 * SIGILL si_codes
92 */
93#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */
94#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */
95#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */
96#undef NSIGILL
97#define NSIGILL 11
98
99/*
100 * SIGFPE si_codes
101 */
102#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */
103#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */
104#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */
105#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */
106#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */
107#undef NSIGFPE
108#define NSIGFPE 13
109
110/*
111 * SIGSEGV si_codes
112 */
113#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
114#undef NSIGSEGV
115#define NSIGSEGV 3
116
117#undef NSIGTRAP
118#define NSIGTRAP 4
119
120#ifdef __KERNEL__
10#include <linux/string.h> 121#include <linux/string.h>
11#include <uapi/asm/siginfo.h>
12 122
13static inline void 123static inline void
14copy_siginfo (siginfo_t *to, siginfo_t *from) 124copy_siginfo (siginfo_t *to, siginfo_t *from)
@@ -20,4 +130,6 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
20 memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld)); 130 memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
21} 131}
22 132
133#endif /* __KERNEL__ */
134
23#endif /* _ASM_IA64_SIGINFO_H */ 135#endif /* _ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/asm/signal.h b/arch/ia64/include/asm/signal.h
index 3a1b20e74c5..b166248d49a 100644
--- a/arch/ia64/include/asm/signal.h
+++ b/arch/ia64/include/asm/signal.h
@@ -1,3 +1,6 @@
1#ifndef _ASM_IA64_SIGNAL_H
2#define _ASM_IA64_SIGNAL_H
3
1/* 4/*
2 * Modified 1998-2001, 2003 5 * Modified 1998-2001, 2003
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
@@ -5,18 +8,129 @@
5 * Unfortunately, this file is being included by bits/signal.h in 8 * Unfortunately, this file is being included by bits/signal.h in
6 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness. 9 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness.
7 */ 10 */
8#ifndef _ASM_IA64_SIGNAL_H
9#define _ASM_IA64_SIGNAL_H
10 11
11#include <uapi/asm/signal.h> 12#define SIGHUP 1
13#define SIGINT 2
14#define SIGQUIT 3
15#define SIGILL 4
16#define SIGTRAP 5
17#define SIGABRT 6
18#define SIGIOT 6
19#define SIGBUS 7
20#define SIGFPE 8
21#define SIGKILL 9
22#define SIGUSR1 10
23#define SIGSEGV 11
24#define SIGUSR2 12
25#define SIGPIPE 13
26#define SIGALRM 14
27#define SIGTERM 15
28#define SIGSTKFLT 16
29#define SIGCHLD 17
30#define SIGCONT 18
31#define SIGSTOP 19
32#define SIGTSTP 20
33#define SIGTTIN 21
34#define SIGTTOU 22
35#define SIGURG 23
36#define SIGXCPU 24
37#define SIGXFSZ 25
38#define SIGVTALRM 26
39#define SIGPROF 27
40#define SIGWINCH 28
41#define SIGIO 29
42#define SIGPOLL SIGIO
43/*
44#define SIGLOST 29
45*/
46#define SIGPWR 30
47#define SIGSYS 31
48/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
49#define SIGUNUSED 31
50
51/* These should not be considered constants from userland. */
52#define SIGRTMIN 32
53#define SIGRTMAX _NSIG
54
55/*
56 * SA_FLAGS values:
57 *
58 * SA_ONSTACK indicates that a registered stack_t will be used.
59 * SA_RESTART flag to get restarting signals (which were the default long ago)
60 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
61 * SA_RESETHAND clears the handler when the signal is delivered.
62 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
63 * SA_NODEFER prevents the current signal from being masked in the handler.
64 *
65 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
66 * Unix names RESETHAND and NODEFER respectively.
67 */
68#define SA_NOCLDSTOP 0x00000001
69#define SA_NOCLDWAIT 0x00000002
70#define SA_SIGINFO 0x00000004
71#define SA_ONSTACK 0x08000000
72#define SA_RESTART 0x10000000
73#define SA_NODEFER 0x40000000
74#define SA_RESETHAND 0x80000000
75
76#define SA_NOMASK SA_NODEFER
77#define SA_ONESHOT SA_RESETHAND
78
79#define SA_RESTORER 0x04000000
12 80
81/*
82 * sigaltstack controls
83 */
84#define SS_ONSTACK 1
85#define SS_DISABLE 2
86
87/*
88 * The minimum stack size needs to be fairly large because we want to
89 * be sure that an app compiled for today's CPUs will continue to run
90 * on all future CPU models. The CPU model matters because the signal
91 * frame needs to have space for the complete machine state, including
92 * all physical stacked registers. The number of physical stacked
93 * registers is CPU model dependent, but given that the width of
94 * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
95 * more than 16KB of space.
96 */
97#if 1
98 /*
99 * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
100 * in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the
101 * incorrect value and fix libc only.
102 */
103# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */
104#else
105# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */
106#endif
107#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */
108
109#ifdef __KERNEL__
13 110
14#define _NSIG 64 111#define _NSIG 64
15#define _NSIG_BPW 64 112#define _NSIG_BPW 64
16#define _NSIG_WORDS (_NSIG / _NSIG_BPW) 113#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
17 114
115#endif /* __KERNEL__ */
116
117#include <asm-generic/signal-defs.h>
118
18# ifndef __ASSEMBLY__ 119# ifndef __ASSEMBLY__
19 120
121# include <linux/types.h>
122
123/* Avoid too many header ordering problems. */
124struct siginfo;
125
126typedef struct sigaltstack {
127 void __user *ss_sp;
128 int ss_flags;
129 size_t ss_size;
130} stack_t;
131
132#ifdef __KERNEL__
133
20/* Most things should be clean enough to redefine this at will, if care 134/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */ 135 is taken to make libc match. */
22 136
@@ -38,5 +152,9 @@ struct k_sigaction {
38 152
39# include <asm/sigcontext.h> 153# include <asm/sigcontext.h>
40 154
155#define ptrace_signal_deliver(regs, cookie) do { } while (0)
156
157#endif /* __KERNEL__ */
158
41# endif /* !__ASSEMBLY__ */ 159# endif /* !__ASSEMBLY__ */
42#endif /* _ASM_IA64_SIGNAL_H */ 160#endif /* _ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/asm/smp.h b/arch/ia64/include/asm/smp.h
index fea21e98602..0b3b3997dec 100644
--- a/arch/ia64/include/asm/smp.h
+++ b/arch/ia64/include/asm/smp.h
@@ -55,7 +55,7 @@ extern struct smp_boot_data {
55 int cpu_phys_id[NR_CPUS]; 55 int cpu_phys_id[NR_CPUS];
56} smp_boot_data __initdata; 56} smp_boot_data __initdata;
57 57
58extern char no_int_routing; 58extern char no_int_routing __devinitdata;
59 59
60extern cpumask_t cpu_core_map[NR_CPUS]; 60extern cpumask_t cpu_core_map[NR_CPUS];
61DECLARE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 61DECLARE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
diff --git a/arch/ia64/include/asm/sn/pda.h b/arch/ia64/include/asm/sn/pda.h
index 22ae358c8d1..1c5108d44d8 100644
--- a/arch/ia64/include/asm/sn/pda.h
+++ b/arch/ia64/include/asm/sn/pda.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/cache.h> 11#include <linux/cache.h>
12#include <asm/percpu.h> 12#include <asm/percpu.h>
13#include <asm/system.h>
13 14
14 15
15/* 16/*
diff --git a/arch/ia64/include/asm/spinlock.h b/arch/ia64/include/asm/spinlock.h
index 54ff557d474..b77768d35f9 100644
--- a/arch/ia64/include/asm/spinlock.h
+++ b/arch/ia64/include/asm/spinlock.h
@@ -15,6 +15,7 @@
15 15
16#include <linux/atomic.h> 16#include <linux/atomic.h>
17#include <asm/intrinsics.h> 17#include <asm/intrinsics.h>
18#include <asm/system.h>
18 19
19#define arch_spin_lock_init(x) ((x)->lock = 0) 20#define arch_spin_lock_init(x) ((x)->lock = 0)
20 21
diff --git a/arch/ia64/include/asm/switch_to.h b/arch/ia64/include/asm/switch_to.h
deleted file mode 100644
index d38c7ea5eea..00000000000
--- a/arch/ia64/include/asm/switch_to.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * Low-level task switching. This is based on information published in
3 * the Processor Abstraction Layer and the System Abstraction Layer
4 * manual.
5 *
6 * Copyright (C) 1998-2003 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
9 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
10 */
11#ifndef _ASM_IA64_SWITCH_TO_H
12#define _ASM_IA64_SWITCH_TO_H
13
14#include <linux/percpu.h>
15
16struct task_struct;
17
18/*
19 * Context switch from one thread to another. If the two threads have
20 * different address spaces, schedule() has already taken care of
21 * switching to the new address space by calling switch_mm().
22 *
23 * Disabling access to the fph partition and the debug-register
24 * context switch MUST be done before calling ia64_switch_to() since a
25 * newly created thread returns directly to
26 * ia64_ret_from_syscall_clear_r8.
27 */
28extern struct task_struct *ia64_switch_to (void *next_task);
29
30extern void ia64_save_extra (struct task_struct *task);
31extern void ia64_load_extra (struct task_struct *task);
32
33#ifdef CONFIG_PERFMON
34 DECLARE_PER_CPU(unsigned long, pfm_syst_info);
35# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1)
36#else
37# define PERFMON_IS_SYSWIDE() (0)
38#endif
39
40#define IA64_HAS_EXTRA_STATE(t) \
41 ((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \
42 || PERFMON_IS_SYSWIDE())
43
44#define __switch_to(prev,next,last) do { \
45 if (IA64_HAS_EXTRA_STATE(prev)) \
46 ia64_save_extra(prev); \
47 if (IA64_HAS_EXTRA_STATE(next)) \
48 ia64_load_extra(next); \
49 ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \
50 (last) = ia64_switch_to((next)); \
51} while (0)
52
53#ifdef CONFIG_SMP
54/*
55 * In the SMP case, we save the fph state when context-switching away from a thread that
56 * modified fph. This way, when the thread gets scheduled on another CPU, the CPU can
57 * pick up the state from task->thread.fph, avoiding the complication of having to fetch
58 * the latest fph state from another CPU. In other words: eager save, lazy restore.
59 */
60# define switch_to(prev,next,last) do { \
61 if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
62 ia64_psr(task_pt_regs(prev))->mfh = 0; \
63 (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
64 __ia64_save_fpu((prev)->thread.fph); \
65 } \
66 __switch_to(prev, next, last); \
67 /* "next" in old context is "current" in new context */ \
68 if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \
69 (task_cpu(current) != \
70 task_thread_info(current)->last_cpu))) { \
71 platform_migrate(current); \
72 task_thread_info(current)->last_cpu = task_cpu(current); \
73 } \
74} while (0)
75#else
76# define switch_to(prev,next,last) __switch_to(prev, next, last)
77#endif
78
79#endif /* _ASM_IA64_SWITCH_TO_H */
diff --git a/arch/ia64/include/asm/termios.h b/arch/ia64/include/asm/termios.h
index a42f870ca4f..689d218c0c2 100644
--- a/arch/ia64/include/asm/termios.h
+++ b/arch/ia64/include/asm/termios.h
@@ -1,14 +1,52 @@
1#ifndef _ASM_IA64_TERMIOS_H
2#define _ASM_IA64_TERMIOS_H
3
1/* 4/*
2 * Modified 1999 5 * Modified 1999
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
4 * 7 *
5 * 99/01/28 Added N_IRDA and N_SMSBLOCK 8 * 99/01/28 Added N_IRDA and N_SMSBLOCK
6 */ 9 */
7#ifndef _ASM_IA64_TERMIOS_H
8#define _ASM_IA64_TERMIOS_H
9 10
10#include <uapi/asm/termios.h> 11#include <asm/termbits.h>
12#include <asm/ioctls.h>
11 13
14struct winsize {
15 unsigned short ws_row;
16 unsigned short ws_col;
17 unsigned short ws_xpixel;
18 unsigned short ws_ypixel;
19};
20
21#define NCC 8
22struct termio {
23 unsigned short c_iflag; /* input mode flags */
24 unsigned short c_oflag; /* output mode flags */
25 unsigned short c_cflag; /* control mode flags */
26 unsigned short c_lflag; /* local mode flags */
27 unsigned char c_line; /* line discipline */
28 unsigned char c_cc[NCC]; /* control characters */
29};
30
31/* modem lines */
32#define TIOCM_LE 0x001
33#define TIOCM_DTR 0x002
34#define TIOCM_RTS 0x004
35#define TIOCM_ST 0x008
36#define TIOCM_SR 0x010
37#define TIOCM_CTS 0x020
38#define TIOCM_CAR 0x040
39#define TIOCM_RNG 0x080
40#define TIOCM_DSR 0x100
41#define TIOCM_CD TIOCM_CAR
42#define TIOCM_RI TIOCM_RNG
43#define TIOCM_OUT1 0x2000
44#define TIOCM_OUT2 0x4000
45#define TIOCM_LOOP 0x8000
46
47/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
48
49# ifdef __KERNEL__
12 50
13/* intr=^C quit=^\ erase=del kill=^U 51/* intr=^C quit=^\ erase=del kill=^U
14 eof=^D vtime=\0 vmin=\1 sxtc=\0 52 eof=^D vtime=\0 vmin=\1 sxtc=\0
@@ -54,4 +92,6 @@
54#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) 92#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
55#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) 93#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
56 94
95# endif /* __KERNEL__ */
96
57#endif /* _ASM_IA64_TERMIOS_H */ 97#endif /* _ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h
index ff2ae413658..ff0cc84e7bc 100644
--- a/arch/ia64/include/asm/thread_info.h
+++ b/arch/ia64/include/asm/thread_info.h
@@ -54,6 +54,8 @@ struct thread_info {
54 }, \ 54 }, \
55} 55}
56 56
57#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
58
57#ifndef ASM_OFFSETS_C 59#ifndef ASM_OFFSETS_C
58/* how to get the thread information struct from C */ 60/* how to get the thread information struct from C */
59#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) 61#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE))
@@ -82,6 +84,7 @@ struct thread_info {
82#endif 84#endif
83#define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET) 85#define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET)
84 86
87#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR
85#define alloc_task_struct_node(node) \ 88#define alloc_task_struct_node(node) \
86({ \ 89({ \
87 struct page *page = alloc_pages_node(node, GFP_KERNEL | __GFP_COMP, \ 90 struct page *page = alloc_pages_node(node, GFP_KERNEL | __GFP_COMP, \
@@ -106,9 +109,11 @@ struct thread_info {
106#define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */ 109#define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
107#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ 110#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
108#define TIF_NOTIFY_RESUME 6 /* resumption notification requested */ 111#define TIF_NOTIFY_RESUME 6 /* resumption notification requested */
112#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
109#define TIF_MEMDIE 17 /* is terminating due to OOM killer */ 113#define TIF_MEMDIE 17 /* is terminating due to OOM killer */
110#define TIF_MCA_INIT 18 /* this task is processing MCA or INIT */ 114#define TIF_MCA_INIT 18 /* this task is processing MCA or INIT */
111#define TIF_DB_DISABLED 19 /* debug trap disabled for fsyscall */ 115#define TIF_DB_DISABLED 19 /* debug trap disabled for fsyscall */
116#define TIF_FREEZE 20 /* is freezing for suspend */
112#define TIF_RESTORE_RSE 21 /* user RBS is newer than kernel RBS */ 117#define TIF_RESTORE_RSE 21 /* user RBS is newer than kernel RBS */
113 118
114#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 119#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
@@ -118,8 +123,10 @@ struct thread_info {
118#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 123#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
119#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 124#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
120#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 125#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
126#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
121#define _TIF_MCA_INIT (1 << TIF_MCA_INIT) 127#define _TIF_MCA_INIT (1 << TIF_MCA_INIT)
122#define _TIF_DB_DISABLED (1 << TIF_DB_DISABLED) 128#define _TIF_DB_DISABLED (1 << TIF_DB_DISABLED)
129#define _TIF_FREEZE (1 << TIF_FREEZE)
123#define _TIF_RESTORE_RSE (1 << TIF_RESTORE_RSE) 130#define _TIF_RESTORE_RSE (1 << TIF_RESTORE_RSE)
124 131
125/* "work to do on user-return" bits */ 132/* "work to do on user-return" bits */
@@ -139,23 +146,7 @@ static inline void set_restore_sigmask(void)
139{ 146{
140 struct thread_info *ti = current_thread_info(); 147 struct thread_info *ti = current_thread_info();
141 ti->status |= TS_RESTORE_SIGMASK; 148 ti->status |= TS_RESTORE_SIGMASK;
142 WARN_ON(!test_bit(TIF_SIGPENDING, &ti->flags)); 149 set_bit(TIF_SIGPENDING, &ti->flags);
143}
144static inline void clear_restore_sigmask(void)
145{
146 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
147}
148static inline bool test_restore_sigmask(void)
149{
150 return current_thread_info()->status & TS_RESTORE_SIGMASK;
151}
152static inline bool test_and_clear_restore_sigmask(void)
153{
154 struct thread_info *ti = current_thread_info();
155 if (!(ti->status & TS_RESTORE_SIGMASK))
156 return false;
157 ti->status &= ~TS_RESTORE_SIGMASK;
158 return true;
159} 150}
160#endif /* !__ASSEMBLY__ */ 151#endif /* !__ASSEMBLY__ */
161 152
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index a2496e449b7..09f646753d1 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -70,6 +70,31 @@ void build_cpu_to_node_map(void);
70 .nr_balance_failed = 0, \ 70 .nr_balance_failed = 0, \
71} 71}
72 72
73/* sched_domains SD_NODE_INIT for IA64 NUMA machines */
74#define SD_NODE_INIT (struct sched_domain) { \
75 .parent = NULL, \
76 .child = NULL, \
77 .groups = NULL, \
78 .min_interval = 8, \
79 .max_interval = 8*(min(num_online_cpus(), 32U)), \
80 .busy_factor = 64, \
81 .imbalance_pct = 125, \
82 .cache_nice_tries = 2, \
83 .busy_idx = 3, \
84 .idle_idx = 2, \
85 .newidle_idx = 0, \
86 .wake_idx = 0, \
87 .forkexec_idx = 0, \
88 .flags = SD_LOAD_BALANCE \
89 | SD_BALANCE_NEWIDLE \
90 | SD_BALANCE_EXEC \
91 | SD_BALANCE_FORK \
92 | SD_SERIALIZE, \
93 .last_balance = jiffies, \
94 .balance_interval = 64, \
95 .nr_balance_failed = 0, \
96}
97
73#endif /* CONFIG_NUMA */ 98#endif /* CONFIG_NUMA */
74 99
75#ifdef CONFIG_SMP 100#ifdef CONFIG_SMP
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index 4c351b169da..82b3939d271 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -1,3 +1,6 @@
1#ifndef _ASM_IA64_TYPES_H
2#define _ASM_IA64_TYPES_H
3
1/* 4/*
2 * This file is never included by application software unless explicitly 5 * This file is never included by application software unless explicitly
3 * requested (e.g., via linux/types.h) in which case the application is 6 * requested (e.g., via linux/types.h) in which case the application is
@@ -10,22 +13,34 @@
10 * Modified 1998-2000, 2002 13 * Modified 1998-2000, 2002
11 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 14 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
12 */ 15 */
13#ifndef _ASM_IA64_TYPES_H
14#define _ASM_IA64_TYPES_H
15 16
17#ifdef __KERNEL__
16#include <asm-generic/int-ll64.h> 18#include <asm-generic/int-ll64.h>
17#include <uapi/asm/types.h> 19#else
20#include <asm-generic/int-l64.h>
21#endif
18 22
19#ifdef __ASSEMBLY__ 23#ifdef __ASSEMBLY__
24# define __IA64_UL(x) (x)
25# define __IA64_UL_CONST(x) x
26
20#else 27#else
28# define __IA64_UL(x) ((unsigned long)(x))
29# define __IA64_UL_CONST(x) x##UL
30
31typedef unsigned int umode_t;
32
21/* 33/*
22 * These aren't exported outside the kernel to avoid name space clashes 34 * These aren't exported outside the kernel to avoid name space clashes
23 */ 35 */
36# ifdef __KERNEL__
24 37
25struct fnptr { 38struct fnptr {
26 unsigned long ip; 39 unsigned long ip;
27 unsigned long gp; 40 unsigned long gp;
28}; 41};
29 42
43# endif /* __KERNEL__ */
30#endif /* !__ASSEMBLY__ */ 44#endif /* !__ASSEMBLY__ */
45
31#endif /* _ASM_IA64_TYPES_H */ 46#endif /* _ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index c3cc42a15af..7c928da35b1 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -1,17 +1,331 @@
1#ifndef _ASM_IA64_UNISTD_H
2#define _ASM_IA64_UNISTD_H
3
1/* 4/*
2 * IA-64 Linux syscall numbers and inline-functions. 5 * IA-64 Linux syscall numbers and inline-functions.
3 * 6 *
4 * Copyright (C) 1998-2005 Hewlett-Packard Co 7 * Copyright (C) 1998-2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com> 8 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */ 9 */
7#ifndef _ASM_IA64_UNISTD_H
8#define _ASM_IA64_UNISTD_H
9 10
10#include <uapi/asm/unistd.h> 11#include <asm/break.h>
12
13#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL
14
15#define __NR_ni_syscall 1024
16#define __NR_exit 1025
17#define __NR_read 1026
18#define __NR_write 1027
19#define __NR_open 1028
20#define __NR_close 1029
21#define __NR_creat 1030
22#define __NR_link 1031
23#define __NR_unlink 1032
24#define __NR_execve 1033
25#define __NR_chdir 1034
26#define __NR_fchdir 1035
27#define __NR_utimes 1036
28#define __NR_mknod 1037
29#define __NR_chmod 1038
30#define __NR_chown 1039
31#define __NR_lseek 1040
32#define __NR_getpid 1041
33#define __NR_getppid 1042
34#define __NR_mount 1043
35#define __NR_umount 1044
36#define __NR_setuid 1045
37#define __NR_getuid 1046
38#define __NR_geteuid 1047
39#define __NR_ptrace 1048
40#define __NR_access 1049
41#define __NR_sync 1050
42#define __NR_fsync 1051
43#define __NR_fdatasync 1052
44#define __NR_kill 1053
45#define __NR_rename 1054
46#define __NR_mkdir 1055
47#define __NR_rmdir 1056
48#define __NR_dup 1057
49#define __NR_pipe 1058
50#define __NR_times 1059
51#define __NR_brk 1060
52#define __NR_setgid 1061
53#define __NR_getgid 1062
54#define __NR_getegid 1063
55#define __NR_acct 1064
56#define __NR_ioctl 1065
57#define __NR_fcntl 1066
58#define __NR_umask 1067
59#define __NR_chroot 1068
60#define __NR_ustat 1069
61#define __NR_dup2 1070
62#define __NR_setreuid 1071
63#define __NR_setregid 1072
64#define __NR_getresuid 1073
65#define __NR_setresuid 1074
66#define __NR_getresgid 1075
67#define __NR_setresgid 1076
68#define __NR_getgroups 1077
69#define __NR_setgroups 1078
70#define __NR_getpgid 1079
71#define __NR_setpgid 1080
72#define __NR_setsid 1081
73#define __NR_getsid 1082
74#define __NR_sethostname 1083
75#define __NR_setrlimit 1084
76#define __NR_getrlimit 1085
77#define __NR_getrusage 1086
78#define __NR_gettimeofday 1087
79#define __NR_settimeofday 1088
80#define __NR_select 1089
81#define __NR_poll 1090
82#define __NR_symlink 1091
83#define __NR_readlink 1092
84#define __NR_uselib 1093
85#define __NR_swapon 1094
86#define __NR_swapoff 1095
87#define __NR_reboot 1096
88#define __NR_truncate 1097
89#define __NR_ftruncate 1098
90#define __NR_fchmod 1099
91#define __NR_fchown 1100
92#define __NR_getpriority 1101
93#define __NR_setpriority 1102
94#define __NR_statfs 1103
95#define __NR_fstatfs 1104
96#define __NR_gettid 1105
97#define __NR_semget 1106
98#define __NR_semop 1107
99#define __NR_semctl 1108
100#define __NR_msgget 1109
101#define __NR_msgsnd 1110
102#define __NR_msgrcv 1111
103#define __NR_msgctl 1112
104#define __NR_shmget 1113
105#define __NR_shmat 1114
106#define __NR_shmdt 1115
107#define __NR_shmctl 1116
108/* also known as klogctl() in GNU libc: */
109#define __NR_syslog 1117
110#define __NR_setitimer 1118
111#define __NR_getitimer 1119
112/* 1120 was __NR_old_stat */
113/* 1121 was __NR_old_lstat */
114/* 1122 was __NR_old_fstat */
115#define __NR_vhangup 1123
116#define __NR_lchown 1124
117#define __NR_remap_file_pages 1125
118#define __NR_wait4 1126
119#define __NR_sysinfo 1127
120#define __NR_clone 1128
121#define __NR_setdomainname 1129
122#define __NR_uname 1130
123#define __NR_adjtimex 1131
124/* 1132 was __NR_create_module */
125#define __NR_init_module 1133
126#define __NR_delete_module 1134
127/* 1135 was __NR_get_kernel_syms */
128/* 1136 was __NR_query_module */
129#define __NR_quotactl 1137
130#define __NR_bdflush 1138
131#define __NR_sysfs 1139
132#define __NR_personality 1140
133#define __NR_afs_syscall 1141
134#define __NR_setfsuid 1142
135#define __NR_setfsgid 1143
136#define __NR_getdents 1144
137#define __NR_flock 1145
138#define __NR_readv 1146
139#define __NR_writev 1147
140#define __NR_pread64 1148
141#define __NR_pwrite64 1149
142#define __NR__sysctl 1150
143#define __NR_mmap 1151
144#define __NR_munmap 1152
145#define __NR_mlock 1153
146#define __NR_mlockall 1154
147#define __NR_mprotect 1155
148#define __NR_mremap 1156
149#define __NR_msync 1157
150#define __NR_munlock 1158
151#define __NR_munlockall 1159
152#define __NR_sched_getparam 1160
153#define __NR_sched_setparam 1161
154#define __NR_sched_getscheduler 1162
155#define __NR_sched_setscheduler 1163
156#define __NR_sched_yield 1164
157#define __NR_sched_get_priority_max 1165
158#define __NR_sched_get_priority_min 1166
159#define __NR_sched_rr_get_interval 1167
160#define __NR_nanosleep 1168
161#define __NR_nfsservctl 1169
162#define __NR_prctl 1170
163/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
164#define __NR_mmap2 1172
165#define __NR_pciconfig_read 1173
166#define __NR_pciconfig_write 1174
167#define __NR_perfmonctl 1175
168#define __NR_sigaltstack 1176
169#define __NR_rt_sigaction 1177
170#define __NR_rt_sigpending 1178
171#define __NR_rt_sigprocmask 1179
172#define __NR_rt_sigqueueinfo 1180
173#define __NR_rt_sigreturn 1181
174#define __NR_rt_sigsuspend 1182
175#define __NR_rt_sigtimedwait 1183
176#define __NR_getcwd 1184
177#define __NR_capget 1185
178#define __NR_capset 1186
179#define __NR_sendfile 1187
180#define __NR_getpmsg 1188
181#define __NR_putpmsg 1189
182#define __NR_socket 1190
183#define __NR_bind 1191
184#define __NR_connect 1192
185#define __NR_listen 1193
186#define __NR_accept 1194
187#define __NR_getsockname 1195
188#define __NR_getpeername 1196
189#define __NR_socketpair 1197
190#define __NR_send 1198
191#define __NR_sendto 1199
192#define __NR_recv 1200
193#define __NR_recvfrom 1201
194#define __NR_shutdown 1202
195#define __NR_setsockopt 1203
196#define __NR_getsockopt 1204
197#define __NR_sendmsg 1205
198#define __NR_recvmsg 1206
199#define __NR_pivot_root 1207
200#define __NR_mincore 1208
201#define __NR_madvise 1209
202#define __NR_stat 1210
203#define __NR_lstat 1211
204#define __NR_fstat 1212
205#define __NR_clone2 1213
206#define __NR_getdents64 1214
207#define __NR_getunwind 1215
208#define __NR_readahead 1216
209#define __NR_setxattr 1217
210#define __NR_lsetxattr 1218
211#define __NR_fsetxattr 1219
212#define __NR_getxattr 1220
213#define __NR_lgetxattr 1221
214#define __NR_fgetxattr 1222
215#define __NR_listxattr 1223
216#define __NR_llistxattr 1224
217#define __NR_flistxattr 1225
218#define __NR_removexattr 1226
219#define __NR_lremovexattr 1227
220#define __NR_fremovexattr 1228
221#define __NR_tkill 1229
222#define __NR_futex 1230
223#define __NR_sched_setaffinity 1231
224#define __NR_sched_getaffinity 1232
225#define __NR_set_tid_address 1233
226#define __NR_fadvise64 1234
227#define __NR_tgkill 1235
228#define __NR_exit_group 1236
229#define __NR_lookup_dcookie 1237
230#define __NR_io_setup 1238
231#define __NR_io_destroy 1239
232#define __NR_io_getevents 1240
233#define __NR_io_submit 1241
234#define __NR_io_cancel 1242
235#define __NR_epoll_create 1243
236#define __NR_epoll_ctl 1244
237#define __NR_epoll_wait 1245
238#define __NR_restart_syscall 1246
239#define __NR_semtimedop 1247
240#define __NR_timer_create 1248
241#define __NR_timer_settime 1249
242#define __NR_timer_gettime 1250
243#define __NR_timer_getoverrun 1251
244#define __NR_timer_delete 1252
245#define __NR_clock_settime 1253
246#define __NR_clock_gettime 1254
247#define __NR_clock_getres 1255
248#define __NR_clock_nanosleep 1256
249#define __NR_fstatfs64 1257
250#define __NR_statfs64 1258
251#define __NR_mbind 1259
252#define __NR_get_mempolicy 1260
253#define __NR_set_mempolicy 1261
254#define __NR_mq_open 1262
255#define __NR_mq_unlink 1263
256#define __NR_mq_timedsend 1264
257#define __NR_mq_timedreceive 1265
258#define __NR_mq_notify 1266
259#define __NR_mq_getsetattr 1267
260#define __NR_kexec_load 1268
261#define __NR_vserver 1269
262#define __NR_waitid 1270
263#define __NR_add_key 1271
264#define __NR_request_key 1272
265#define __NR_keyctl 1273
266#define __NR_ioprio_set 1274
267#define __NR_ioprio_get 1275
268#define __NR_move_pages 1276
269#define __NR_inotify_init 1277
270#define __NR_inotify_add_watch 1278
271#define __NR_inotify_rm_watch 1279
272#define __NR_migrate_pages 1280
273#define __NR_openat 1281
274#define __NR_mkdirat 1282
275#define __NR_mknodat 1283
276#define __NR_fchownat 1284
277#define __NR_futimesat 1285
278#define __NR_newfstatat 1286
279#define __NR_unlinkat 1287
280#define __NR_renameat 1288
281#define __NR_linkat 1289
282#define __NR_symlinkat 1290
283#define __NR_readlinkat 1291
284#define __NR_fchmodat 1292
285#define __NR_faccessat 1293
286#define __NR_pselect6 1294
287#define __NR_ppoll 1295
288#define __NR_unshare 1296
289#define __NR_splice 1297
290#define __NR_set_robust_list 1298
291#define __NR_get_robust_list 1299
292#define __NR_sync_file_range 1300
293#define __NR_tee 1301
294#define __NR_vmsplice 1302
295#define __NR_fallocate 1303
296#define __NR_getcpu 1304
297#define __NR_epoll_pwait 1305
298#define __NR_utimensat 1306
299#define __NR_signalfd 1307
300#define __NR_timerfd 1308
301#define __NR_eventfd 1309
302#define __NR_timerfd_create 1310
303#define __NR_timerfd_settime 1311
304#define __NR_timerfd_gettime 1312
305#define __NR_signalfd4 1313
306#define __NR_eventfd2 1314
307#define __NR_epoll_create1 1315
308#define __NR_dup3 1316
309#define __NR_pipe2 1317
310#define __NR_inotify_init1 1318
311#define __NR_preadv 1319
312#define __NR_pwritev 1320
313#define __NR_rt_tgsigqueueinfo 1321
314#define __NR_recvmmsg 1322
315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
322#define __NR_setns 1330
323#define __NR_sendmmsg 1331
11 324
325#ifdef __KERNEL__
12 326
13 327
14#define NR_syscalls 312 /* length of syscall table */ 328#define NR_syscalls 308 /* length of syscall table */
15 329
16/* 330/*
17 * The following defines stop scripts/checksyscalls.sh from complaining about 331 * The following defines stop scripts/checksyscalls.sh from complaining about
@@ -65,4 +379,5 @@ asmlinkage long sys_rt_sigaction(int sig,
65#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall"))) 379#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
66 380
67#endif /* !__ASSEMBLY__ */ 381#endif /* !__ASSEMBLY__ */
382#endif /* __KERNEL__ */
68#endif /* _ASM_IA64_UNISTD_H */ 383#endif /* _ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/asm/ustack.h b/arch/ia64/include/asm/ustack.h
index b275401b96d..504167c35b8 100644
--- a/arch/ia64/include/asm/ustack.h
+++ b/arch/ia64/include/asm/ustack.h
@@ -1,11 +1,20 @@
1#ifndef _ASM_IA64_USTACK_H 1#ifndef _ASM_IA64_USTACK_H
2#define _ASM_IA64_USTACK_H 2#define _ASM_IA64_USTACK_H
3 3
4/*
5 * Constants for the user stack size
6 */
7
8#ifdef __KERNEL__
4#include <asm/page.h> 9#include <asm/page.h>
5#include <uapi/asm/ustack.h>
6 10
7/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */ 11/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */
8#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2) 12#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2)
9#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT) 13#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT)
10#define STACK_TOP_MAX STACK_TOP 14#define STACK_TOP_MAX STACK_TOP
15#endif
16
17/* Make a default stack size of 2GiB */
18#define DEFAULT_USER_STACK_SIZE (1UL << 31)
19
11#endif /* _ASM_IA64_USTACK_H */ 20#endif /* _ASM_IA64_USTACK_H */
diff --git a/arch/ia64/include/asm/uv/uv.h b/arch/ia64/include/asm/uv/uv.h
index 8f6cbaa742e..61b5bdfd980 100644
--- a/arch/ia64/include/asm/uv/uv.h
+++ b/arch/ia64/include/asm/uv/uv.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_IA64_UV_UV_H 1#ifndef _ASM_IA64_UV_UV_H
2#define _ASM_IA64_UV_UV_H 2#define _ASM_IA64_UV_UV_H
3 3
4#include <asm/system.h>
4#include <asm/sn/simulator.h> 5#include <asm/sn/simulator.h>
5 6
6static inline int is_uv_system(void) 7static inline int is_uv_system(void)
diff --git a/arch/ia64/include/asm/xen/interface.h b/arch/ia64/include/asm/xen/interface.h
index e88c5de2741..e951e740bdf 100644
--- a/arch/ia64/include/asm/xen/interface.h
+++ b/arch/ia64/include/asm/xen/interface.h
@@ -67,23 +67,17 @@
67#define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0) 67#define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0)
68 68
69#ifndef __ASSEMBLY__ 69#ifndef __ASSEMBLY__
70/* Explicitly size integers that represent pfns in the public interface
71 * with Xen so that we could have one ABI that works for 32 and 64 bit
72 * guests. */
73typedef unsigned long xen_pfn_t;
74typedef unsigned long xen_ulong_t;
75/* Guest handles for primitive C types. */ 70/* Guest handles for primitive C types. */
76__DEFINE_GUEST_HANDLE(uchar, unsigned char); 71__DEFINE_GUEST_HANDLE(uchar, unsigned char);
77__DEFINE_GUEST_HANDLE(uint, unsigned int); 72__DEFINE_GUEST_HANDLE(uint, unsigned int);
78__DEFINE_GUEST_HANDLE(ulong, unsigned long); 73__DEFINE_GUEST_HANDLE(ulong, unsigned long);
79 74__DEFINE_GUEST_HANDLE(u64, unsigned long);
80DEFINE_GUEST_HANDLE(char); 75DEFINE_GUEST_HANDLE(char);
81DEFINE_GUEST_HANDLE(int); 76DEFINE_GUEST_HANDLE(int);
82DEFINE_GUEST_HANDLE(long); 77DEFINE_GUEST_HANDLE(long);
83DEFINE_GUEST_HANDLE(void); 78DEFINE_GUEST_HANDLE(void);
84DEFINE_GUEST_HANDLE(uint64_t);
85DEFINE_GUEST_HANDLE(uint32_t);
86 79
80typedef unsigned long xen_pfn_t;
87DEFINE_GUEST_HANDLE(xen_pfn_t); 81DEFINE_GUEST_HANDLE(xen_pfn_t);
88#define PRI_xen_pfn "lx" 82#define PRI_xen_pfn "lx"
89#endif 83#endif
@@ -269,8 +263,6 @@ typedef struct xen_callback xen_callback_t;
269 263
270#endif /* !__ASSEMBLY__ */ 264#endif /* !__ASSEMBLY__ */
271 265
272#include <asm/pvclock-abi.h>
273
274/* Size of the shared_info area (this is not related to page size). */ 266/* Size of the shared_info area (this is not related to page size). */
275#define XSI_SHIFT 14 267#define XSI_SHIFT 14
276#define XSI_SIZE (1 << XSI_SHIFT) 268#define XSI_SIZE (1 << XSI_SHIFT)
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-26 19:08:15 -0400