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authorAndi Kleen <ak@suse.de>2006-03-08 20:57:25 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-08 21:10:31 -0500
commitf9262c12c0084ddba445a9a42e98994018e51400 (patch)
treeb54948e654e68c1e5263d955c76bf3a41dfa14da /arch/i386/kernel/io_apic.c
parent979ce809bab37cf438f0db22bfa732d01a84a8c2 (diff)
[PATCH] i386: port ATI timer fix from x86_64 to i386 II
ATI chipsets tend to generate double timer interrupts for the local APIC timer when both the 8254 and the IO-APIC timer pins are enabled. This is because they route it to both and the result is anded together and the CPU ends up processing it twice. This patch changes check_timer to disable the 8254 routing for interrupt 0. I think it would be safe on all chipsets actually (i tested it on a couple and it worked everywhere) and Windows seems to do it in a similar way, but to be conservative this patch only enables this mode on ATI (and adds options to enable/disable too) Ported over from a similar x86-64 change. I reused the ACPI earlyquirk infrastructure for the ATI bridge check, but tweaked it a bit to work even without ACPI. Inspired by a patch from Chuck Ebbert, but redone. Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: "Brown, Len" <len.brown@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/io_apic.c')
-rw-r--r--arch/i386/kernel/io_apic.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 235822b3f41..39d9a5fa907 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -51,6 +51,8 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
51 51
52static DEFINE_SPINLOCK(ioapic_lock); 52static DEFINE_SPINLOCK(ioapic_lock);
53 53
54int timer_over_8254 __initdata = 1;
55
54/* 56/*
55 * Is the SiS APIC rmw bug present ? 57 * Is the SiS APIC rmw bug present ?
56 * -1 = don't know, 0 = no, 1 = yes 58 * -1 = don't know, 0 = no, 1 = yes
@@ -2267,7 +2269,8 @@ static inline void check_timer(void)
2267 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); 2269 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
2268 init_8259A(1); 2270 init_8259A(1);
2269 timer_ack = 1; 2271 timer_ack = 1;
2270 enable_8259A_irq(0); 2272 if (timer_over_8254 > 0)
2273 enable_8259A_irq(0);
2271 2274
2272 pin1 = find_isa_irq_pin(0, mp_INT); 2275 pin1 = find_isa_irq_pin(0, mp_INT);
2273 apic1 = find_isa_irq_apic(0, mp_INT); 2276 apic1 = find_isa_irq_apic(0, mp_INT);
@@ -2392,6 +2395,20 @@ void __init setup_IO_APIC(void)
2392 print_IO_APIC(); 2395 print_IO_APIC();
2393} 2396}
2394 2397
2398static int __init setup_disable_8254_timer(char *s)
2399{
2400 timer_over_8254 = -1;
2401 return 1;
2402}
2403static int __init setup_enable_8254_timer(char *s)
2404{
2405 timer_over_8254 = 2;
2406 return 1;
2407}
2408
2409__setup("disable_8254_timer", setup_disable_8254_timer);
2410__setup("enable_8254_timer", setup_enable_8254_timer);
2411
2395/* 2412/*
2396 * Called after all the initialization is done. If we didnt find any 2413 * Called after all the initialization is done. If we didnt find any
2397 * APIC bugs then we can allow the modify fast path 2414 * APIC bugs then we can allow the modify fast path