Merge linux-2.6 with linux-acpi-2.6

6 files changed, 23 insertions, 31 deletions

diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 4553ffd94b1..46ce9b248f5 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -613,8 +613,8 @@ void __devinit cpu_init(void)
         memcpy(thread->tls_array, &per_cpu(cpu_gdt_table, cpu),
                 GDT_ENTRY_TLS_ENTRIES * 8);
 
-        __asm__ __volatile__("lgdt %0" : : "m" (cpu_gdt_descr[cpu]));
-        __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
+        load_gdt(&cpu_gdt_descr[cpu]);
+        load_idt(&idt_descr);
 
         /*
          * Delete NT
@@ -642,12 +642,12 @@ void __devinit cpu_init(void)
         asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
 
         /* Clear all 6 debug registers: */
-
-#define CD(register) set_debugreg(0, register)
-
-        CD(0); CD(1); CD(2); CD(3); /* no db4 and db5 */; CD(6); CD(7);
-
-#undef CD
+        set_debugreg(0, 0);
+        set_debugreg(0, 1);
+        set_debugreg(0, 2);
+        set_debugreg(0, 3);
+        set_debugreg(0, 6);
+        set_debugreg(0, 7);
 
         /*
          * Force FPU initialization:
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 04e3563da4f..bf02b5026e6 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -64,8 +64,6 @@ static int dont_scale_voltage;
 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
 
 
-#define __hlt()     __asm__ __volatile__("hlt": : :"memory")
-
 /* Clock ratios multiplied by 10 */
 static int clock_ratio[32];
 static int eblcr_table[32];
@@ -168,11 +166,9 @@ static void do_powersaver(union msr_longhaul *longhaul,
         outb(0xFE,0x21);        /* TMR0 only */
         outb(0xFF,0x80);        /* delay */
 
-        local_irq_enable();
-
-        __hlt();
+        safe_halt();
         wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
-        __hlt();
+        halt();
 
         local_irq_disable();
 
@@ -251,9 +247,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
                 bcr2.bits.CLOCKMUL = clock_ratio_index;
                 local_irq_disable();
                 wrmsrl (MSR_VIA_BCR2, bcr2.val);
-                local_irq_enable();
-
-                __hlt();
+                safe_halt();
 
                 /* Disable software clock multiplier */
                 rdmsrl (MSR_VIA_BCR2, bcr2.val);
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index ba4b01138c8..ff87cc22b32 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -132,11 +132,7 @@ static void __init set_cx86_memwb(void)
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
         /* set 'Not Write-through' */
         cr0 = 0x20000000;
-        __asm__("movl %%cr0,%%eax\n\t"
-                "orl %0,%%eax\n\t"
-                "movl %%eax,%%cr0\n"
-                : : "r" (cr0)
-                :"ax");
+        write_cr0(read_cr0() | cr0);
         /* CCR2 bit 2: lock NW bit and set WT1 */
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 );
 }
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c
index a2c33c1a46c..43601de0f63 100644
--- a/arch/i386/kernel/cpu/intel.c
+++ b/arch/i386/kernel/cpu/intel.c
@@ -82,16 +82,13 @@ static void __devinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
  */
 static int __devinit num_cpu_cores(struct cpuinfo_x86 *c)
 {
-        unsigned int eax;
+        unsigned int eax, ebx, ecx, edx;
 
         if (c->cpuid_level < 4)
                 return 1;
 
-        __asm__("cpuid"
-                : "=a" (eax)
-                : "0" (4), "c" (0)
-                : "bx", "dx");
-
+        /* Intel has a non-standard dependency on %ecx for this CPUID level. */
+        cpuid_count(4, 0, &eax, &ebx, &ecx, &edx);
         if (eax & 0x1f)
                 return ((eax >> 26) + 1);
         else
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index 6c55b50cf04..9e0d5f83cb9 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -305,6 +305,9 @@ static void __devinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
 {
         struct _cpuid4_info     *this_leaf;
         unsigned long num_threads_sharing;
+#ifdef CONFIG_X86_HT
+        struct cpuinfo_x86 *c = cpu_data + cpu;
+#endif
 
         this_leaf = CPUID4_INFO_IDX(cpu, index);
         num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
@@ -314,10 +317,12 @@ static void __devinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
 #ifdef CONFIG_X86_HT
         else if (num_threads_sharing == smp_num_siblings)
                 this_leaf->shared_cpu_map = cpu_sibling_map[cpu];
-#endif
+        else if (num_threads_sharing == (c->x86_num_cores * smp_num_siblings))
+                this_leaf->shared_cpu_map = cpu_core_map[cpu];
         else
-                printk(KERN_INFO "Number of CPUs sharing cache didn't match "
+                printk(KERN_DEBUG "Number of CPUs sharing cache didn't match "
                                 "any known set of CPUs\n");
+#endif
 }
 #else
 static void __init cache_shared_cpu_map_setup(unsigned int cpu, int index) {}
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index 764cac64e21..dd4ebd6af7e 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -561,7 +561,7 @@ struct mtrr_value {
 
 static struct mtrr_value * mtrr_state;
 
-static int mtrr_save(struct sys_device * sysdev, u32 state)
+static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
 {
         int i;
         int size = num_var_ranges * sizeof(struct mtrr_value);