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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
commitfcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch)
treea57612d1888735a2ec7972891b68c1ac5ec8faea /arch/cris/include/asm
parent8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff)
Added missing tegra files.HEADmaster
Diffstat (limited to 'arch/cris/include/asm')
-rw-r--r--arch/cris/include/asm/auxvec.h4
-rw-r--r--arch/cris/include/asm/bitsperlong.h1
-rw-r--r--arch/cris/include/asm/byteorder.h8
-rw-r--r--arch/cris/include/asm/errno.h6
-rw-r--r--arch/cris/include/asm/ethernet.h21
-rw-r--r--arch/cris/include/asm/etraxgpio.h239
-rw-r--r--arch/cris/include/asm/fcntl.h1
-rw-r--r--arch/cris/include/asm/ioctl.h1
-rw-r--r--arch/cris/include/asm/ioctls.h11
-rw-r--r--arch/cris/include/asm/ipcbuf.h29
-rw-r--r--arch/cris/include/asm/mman.h1
-rw-r--r--arch/cris/include/asm/module.h9
-rw-r--r--arch/cris/include/asm/msgbuf.h33
-rw-r--r--arch/cris/include/asm/param.h10
-rw-r--r--arch/cris/include/asm/poll.h1
-rw-r--r--arch/cris/include/asm/posix_types.h66
-rw-r--r--arch/cris/include/asm/resource.h6
-rw-r--r--arch/cris/include/asm/rs485.h18
-rw-r--r--arch/cris/include/asm/rtc.h107
-rw-r--r--arch/cris/include/asm/sembuf.h25
-rw-r--r--arch/cris/include/asm/setup.h6
-rw-r--r--arch/cris/include/asm/shmbuf.h42
-rw-r--r--arch/cris/include/asm/sigcontext.h24
-rw-r--r--arch/cris/include/asm/siginfo.h6
-rw-r--r--arch/cris/include/asm/socket.h69
-rw-r--r--arch/cris/include/asm/sockios.h13
-rw-r--r--arch/cris/include/asm/stat.h81
-rw-r--r--arch/cris/include/asm/statfs.h6
-rw-r--r--arch/cris/include/asm/sync_serial.h132
-rw-r--r--arch/cris/include/asm/system.h89
-rw-r--r--arch/cris/include/asm/termbits.h235
31 files changed, 1300 insertions, 0 deletions
diff --git a/arch/cris/include/asm/auxvec.h b/arch/cris/include/asm/auxvec.h
new file mode 100644
index 00000000000..cb30b01bf19
--- /dev/null
+++ b/arch/cris/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __ASMCRIS_AUXVEC_H
2#define __ASMCRIS_AUXVEC_H
3
4#endif
diff --git a/arch/cris/include/asm/bitsperlong.h b/arch/cris/include/asm/bitsperlong.h
new file mode 100644
index 00000000000..6dc0bb0c13b
--- /dev/null
+++ b/arch/cris/include/asm/bitsperlong.h
@@ -0,0 +1 @@
#include <asm-generic/bitsperlong.h>
diff --git a/arch/cris/include/asm/byteorder.h b/arch/cris/include/asm/byteorder.h
new file mode 100644
index 00000000000..bcd189798e2
--- /dev/null
+++ b/arch/cris/include/asm/byteorder.h
@@ -0,0 +1,8 @@
1#ifndef _CRIS_BYTEORDER_H
2#define _CRIS_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif
7
8
diff --git a/arch/cris/include/asm/errno.h b/arch/cris/include/asm/errno.h
new file mode 100644
index 00000000000..2bf5eb5fa77
--- /dev/null
+++ b/arch/cris/include/asm/errno.h
@@ -0,0 +1,6 @@
1#ifndef _CRIS_ERRNO_H
2#define _CRIS_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif
diff --git a/arch/cris/include/asm/ethernet.h b/arch/cris/include/asm/ethernet.h
new file mode 100644
index 00000000000..4d58652c3a4
--- /dev/null
+++ b/arch/cris/include/asm/ethernet.h
@@ -0,0 +1,21 @@
1/*
2 * ioctl defines for ethernet driver
3 *
4 * Copyright (c) 2001 Axis Communications AB
5 *
6 * Author: Mikael Starvik
7 *
8 */
9
10#ifndef _CRIS_ETHERNET_H
11#define _CRIS_ETHERNET_H
12#define SET_ETH_SPEED_AUTO SIOCDEVPRIVATE /* Auto neg speed */
13#define SET_ETH_SPEED_10 SIOCDEVPRIVATE+1 /* 10 Mbps */
14#define SET_ETH_SPEED_100 SIOCDEVPRIVATE+2 /* 100 Mbps. */
15#define SET_ETH_DUPLEX_AUTO SIOCDEVPRIVATE+3 /* Auto neg duplex */
16#define SET_ETH_DUPLEX_HALF SIOCDEVPRIVATE+4 /* Full duplex */
17#define SET_ETH_DUPLEX_FULL SIOCDEVPRIVATE+5 /* Half duplex */
18#define SET_ETH_ENABLE_LEDS SIOCDEVPRIVATE+6 /* Enable net LEDs */
19#define SET_ETH_DISABLE_LEDS SIOCDEVPRIVATE+7 /* Disable net LEDs */
20#define SET_ETH_AUTONEG SIOCDEVPRIVATE+8
21#endif /* _CRIS_ETHERNET_H */
diff --git a/arch/cris/include/asm/etraxgpio.h b/arch/cris/include/asm/etraxgpio.h
new file mode 100644
index 00000000000..461c089db76
--- /dev/null
+++ b/arch/cris/include/asm/etraxgpio.h
@@ -0,0 +1,239 @@
1/*
2 * The following devices are accessible using this driver using
3 * GPIO_MAJOR (120) and a couple of minor numbers.
4 *
5 * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10):
6 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
7 * /dev/gpiob minor 1, 8 bit GPIO, each bit can change direction
8 * /dev/leds minor 2, Access to leds depending on kernelconfig
9 * /dev/gpiog minor 3
10 * g0dir, g8_15dir, g16_23dir, g24 dir configurable in R_GEN_CONFIG
11 * g1-g7 and g25-g31 is both input and outputs but on different pins
12 * Also note that some bits change pins depending on what interfaces
13 * are enabled.
14 *
15 * For ETRAX FS (CONFIG_ETRAXFS):
16 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
17 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
18 * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
19 * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
20 * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction
21 * /dev/leds minor 2, Access to leds depending on kernelconfig
22 *
23 * For ARTPEC-3 (CONFIG_CRIS_MACH_ARTPEC3):
24 * /dev/gpioa minor 0, 32 bit GPIO, each bit can change direction
25 * /dev/gpiob minor 1, 32 bit GPIO, each bit can change direction
26 * /dev/gpioc minor 3, 16 bit GPIO, each bit can change direction
27 * /dev/gpiod minor 4, 32 bit GPIO, input only
28 * /dev/leds minor 2, Access to leds depending on kernelconfig
29 * /dev/pwm0 minor 16, PWM channel 0 on PA30
30 * /dev/pwm1 minor 17, PWM channel 1 on PA31
31 * /dev/pwm2 minor 18, PWM channel 2 on PB26
32 * /dev/ppwm minor 19, PPWM channel
33 *
34 */
35#ifndef _ASM_ETRAXGPIO_H
36#define _ASM_ETRAXGPIO_H
37
38#define GPIO_MINOR_FIRST 0
39
40#define ETRAXGPIO_IOCTYPE 43
41
42/* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */
43#ifdef CONFIG_ETRAX_ARCH_V10
44#define GPIO_MINOR_A 0
45#define GPIO_MINOR_B 1
46#define GPIO_MINOR_LEDS 2
47#define GPIO_MINOR_G 3
48#define GPIO_MINOR_LAST 3
49#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST
50#endif
51
52#ifdef CONFIG_ETRAXFS
53#define GPIO_MINOR_A 0
54#define GPIO_MINOR_B 1
55#define GPIO_MINOR_LEDS 2
56#define GPIO_MINOR_C 3
57#define GPIO_MINOR_D 4
58#define GPIO_MINOR_E 5
59#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
60#define GPIO_MINOR_V 6
61#define GPIO_MINOR_LAST 6
62#else
63#define GPIO_MINOR_LAST 5
64#endif
65#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST
66#endif
67
68#ifdef CONFIG_CRIS_MACH_ARTPEC3
69#define GPIO_MINOR_A 0
70#define GPIO_MINOR_B 1
71#define GPIO_MINOR_LEDS 2
72#define GPIO_MINOR_C 3
73#define GPIO_MINOR_D 4
74#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
75#define GPIO_MINOR_V 6
76#define GPIO_MINOR_LAST 6
77#else
78#define GPIO_MINOR_LAST 4
79#endif
80#define GPIO_MINOR_FIRST_PWM 16
81#define GPIO_MINOR_PWM0 (GPIO_MINOR_FIRST_PWM+0)
82#define GPIO_MINOR_PWM1 (GPIO_MINOR_FIRST_PWM+1)
83#define GPIO_MINOR_PWM2 (GPIO_MINOR_FIRST_PWM+2)
84#define GPIO_MINOR_PPWM (GPIO_MINOR_FIRST_PWM+3)
85#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PPWM
86#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST_PWM
87#endif
88
89
90
91/* supported ioctl _IOC_NR's */
92
93#define IO_READBITS 0x1 /* read and return current port bits (obsolete) */
94#define IO_SETBITS 0x2 /* set the bits marked by 1 in the argument */
95#define IO_CLRBITS 0x3 /* clear the bits marked by 1 in the argument */
96
97/* the alarm is waited for by select() */
98
99#define IO_HIGHALARM 0x4 /* set alarm on high for bits marked by 1 */
100#define IO_LOWALARM 0x5 /* set alarm on low for bits marked by 1 */
101#define IO_CLRALARM 0x6 /* clear alarm for bits marked by 1 */
102
103/* LED ioctl */
104#define IO_LEDACTIVE_SET 0x7 /* set active led
105 * 0=off, 1=green, 2=red, 3=yellow */
106
107/* GPIO direction ioctl's */
108#define IO_READDIR 0x8 /* Read direction 0=input 1=output (obsolete) */
109#define IO_SETINPUT 0x9 /* Set direction for bits set, 0=unchanged 1=input,
110 returns mask with current inputs (obsolete) */
111#define IO_SETOUTPUT 0xA /* Set direction for bits set, 0=unchanged 1=output,
112 returns mask with current outputs (obsolete)*/
113
114/* LED ioctl extended */
115#define IO_LED_SETBIT 0xB
116#define IO_LED_CLRBIT 0xC
117
118/* SHUTDOWN ioctl */
119#define IO_SHUTDOWN 0xD
120#define IO_GET_PWR_BT 0xE
121
122/* Bit toggling in driver settings */
123/* bit set in low byte0 is CLK mask (0x00FF),
124 bit set in byte1 is DATA mask (0xFF00)
125 msb, data_mask[7:0] , clk_mask[7:0]
126 */
127#define IO_CFG_WRITE_MODE 0xF
128#define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \
129 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) )
130
131/* The following 4 ioctl's take a pointer as argument and handles
132 * 32 bit ports (port G) properly.
133 * These replaces IO_READBITS,IO_SETINPUT AND IO_SETOUTPUT
134 */
135#define IO_READ_INBITS 0x10 /* *arg is result of reading the input pins */
136#define IO_READ_OUTBITS 0x11 /* *arg is result of reading the output shadow */
137#define IO_SETGET_INPUT 0x12 /* bits set in *arg is set to input, */
138 /* *arg updated with current input pins. */
139#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, */
140 /* *arg updated with current output pins. */
141
142/* The following ioctl's are applicable to the PWM channels only */
143
144#define IO_PWM_SET_MODE 0x20
145
146enum io_pwm_mode {
147 PWM_OFF = 0, /* disabled, deallocated */
148 PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */
149 PWM_FAST = 2, /* variable freq, w/ 10ns active pulse len */
150 PWM_VARFREQ = 3, /* individually configurable high/low periods */
151 PWM_SOFT = 4 /* software generated */
152};
153
154struct io_pwm_set_mode {
155 enum io_pwm_mode mode;
156};
157
158/* Only for mode PWM_VARFREQ. Period lo/high set in increments of 10ns
159 * from 10ns (value = 0) to 81920ns (value = 8191)
160 * (Resulting frequencies range from 50 MHz (10ns + 10ns) down to
161 * 6.1 kHz (81920ns + 81920ns) at 50% duty cycle, to 12.2 kHz at min/max duty
162 * cycle (81920 + 10ns or 10ns + 81920ns, respectively).)
163 */
164#define IO_PWM_SET_PERIOD 0x21
165
166struct io_pwm_set_period {
167 unsigned int lo; /* 0..8191 */
168 unsigned int hi; /* 0..8191 */
169};
170
171/* Only for modes PWM_STANDARD and PWM_FAST.
172 * For PWM_STANDARD, set duty cycle of 390 kHz PWM output signal, from
173 * 0 (value = 0) to 255/256 (value = 255).
174 * For PWM_FAST, set duty cycle of PWM output signal from
175 * 0% (value = 0) to 100% (value = 255). Output signal in this mode
176 * is a 10ns pulse surrounded by a high or low level depending on duty
177 * cycle (except for 0% and 100% which result in a constant output).
178 * Resulting output frequency varies from 50 MHz at 50% duty cycle,
179 * down to 390 kHz at min/max duty cycle.
180 */
181#define IO_PWM_SET_DUTY 0x22
182
183struct io_pwm_set_duty {
184 int duty; /* 0..255 */
185};
186
187/* Returns information about the latest PWM pulse.
188 * lo: Length of the latest low period, in units of 10ns.
189 * hi: Length of the latest high period, in units of 10ns.
190 * cnt: Time since last detected edge, in units of 10ns.
191 *
192 * The input source to PWM is decied by IO_PWM_SET_INPUT_SRC.
193 *
194 * NOTE: All PWM devices is connected to the same input source.
195 */
196#define IO_PWM_GET_PERIOD 0x23
197
198struct io_pwm_get_period {
199 unsigned int lo;
200 unsigned int hi;
201 unsigned int cnt;
202};
203
204/* Sets the input source for the PWM input. For the src value see the
205 * register description for gio:rw_pwm_in_cfg.
206 *
207 * NOTE: All PWM devices is connected to the same input source.
208 */
209#define IO_PWM_SET_INPUT_SRC 0x24
210struct io_pwm_set_input_src {
211 unsigned int src; /* 0..7 */
212};
213
214/* Sets the duty cycles in steps of 1/256, 0 = 0%, 255 = 100% duty cycle */
215#define IO_PPWM_SET_DUTY 0x25
216
217struct io_ppwm_set_duty {
218 int duty; /* 0..255 */
219};
220
221/* Configuraton struct for the IO_PWMCLK_SET_CONFIG ioctl to configure
222 * PWM capable gpio pins:
223 */
224#define IO_PWMCLK_SETGET_CONFIG 0x26
225struct gpio_pwmclk_conf {
226 unsigned int gpiopin; /* The pin number based on the opened device */
227 unsigned int baseclk; /* The base clock to use, or sw will select one close*/
228 unsigned int low; /* The number of low periods of the baseclk */
229 unsigned int high; /* The number of high periods of the baseclk */
230};
231
232/* Examples:
233 * To get a symmetric 12 MHz clock without knowing anything about the hardware:
234 * baseclk = 12000000, low = 0, high = 0
235 * To just get info of current setting:
236 * baseclk = 0, low = 0, high = 0, the values will be updated by driver.
237 */
238
239#endif
diff --git a/arch/cris/include/asm/fcntl.h b/arch/cris/include/asm/fcntl.h
new file mode 100644
index 00000000000..46ab12db573
--- /dev/null
+++ b/arch/cris/include/asm/fcntl.h
@@ -0,0 +1 @@
#include <asm-generic/fcntl.h>
diff --git a/arch/cris/include/asm/ioctl.h b/arch/cris/include/asm/ioctl.h
new file mode 100644
index 00000000000..b279fe06dfe
--- /dev/null
+++ b/arch/cris/include/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/cris/include/asm/ioctls.h b/arch/cris/include/asm/ioctls.h
new file mode 100644
index 00000000000..488fbb3f5e8
--- /dev/null
+++ b/arch/cris/include/asm/ioctls.h
@@ -0,0 +1,11 @@
1#ifndef __ARCH_CRIS_IOCTLS_H__
2#define __ARCH_CRIS_IOCTLS_H__
3
4#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
5#define TIOCSERSETRS485 0x5461 /* enable rs-485 (deprecated) */
6#define TIOCSERWRRS485 0x5462 /* write rs-485 */
7#define TIOCSRS485 0x5463 /* enable rs-485 */
8
9#include <asm-generic/ioctls.h>
10
11#endif
diff --git a/arch/cris/include/asm/ipcbuf.h b/arch/cris/include/asm/ipcbuf.h
new file mode 100644
index 00000000000..8b0c18b0284
--- /dev/null
+++ b/arch/cris/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef __CRIS_IPCBUF_H__
2#define __CRIS_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for CRIS architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __CRIS_IPCBUF_H__ */
diff --git a/arch/cris/include/asm/mman.h b/arch/cris/include/asm/mman.h
new file mode 100644
index 00000000000..8eebf89f5ab
--- /dev/null
+++ b/arch/cris/include/asm/mman.h
@@ -0,0 +1 @@
#include <asm-generic/mman.h>
diff --git a/arch/cris/include/asm/module.h b/arch/cris/include/asm/module.h
new file mode 100644
index 00000000000..7ee72311bd7
--- /dev/null
+++ b/arch/cris/include/asm/module.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_CRIS_MODULE_H
2#define _ASM_CRIS_MODULE_H
3/* cris is simple */
4struct mod_arch_specific { };
5
6#define Elf_Shdr Elf32_Shdr
7#define Elf_Sym Elf32_Sym
8#define Elf_Ehdr Elf32_Ehdr
9#endif /* _ASM_CRIS_MODULE_H */
diff --git a/arch/cris/include/asm/msgbuf.h b/arch/cris/include/asm/msgbuf.h
new file mode 100644
index 00000000000..ada63df1d57
--- /dev/null
+++ b/arch/cris/include/asm/msgbuf.h
@@ -0,0 +1,33 @@
1#ifndef _CRIS_MSGBUF_H
2#define _CRIS_MSGBUF_H
3
4/* verbatim copy of asm-i386 version */
5
6/*
7 * The msqid64_ds structure for CRIS architecture.
8 * Note extra padding because this structure is passed back and forth
9 * between kernel and user space.
10 *
11 * Pad space is left for:
12 * - 64-bit time_t to solve y2038 problem
13 * - 2 miscellaneous 32-bit values
14 */
15
16struct msqid64_ds {
17 struct ipc64_perm msg_perm;
18 __kernel_time_t msg_stime; /* last msgsnd time */
19 unsigned long __unused1;
20 __kernel_time_t msg_rtime; /* last msgrcv time */
21 unsigned long __unused2;
22 __kernel_time_t msg_ctime; /* last change time */
23 unsigned long __unused3;
24 unsigned long msg_cbytes; /* current number of bytes on queue */
25 unsigned long msg_qnum; /* number of messages in queue */
26 unsigned long msg_qbytes; /* max number of bytes on queue */
27 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
28 __kernel_pid_t msg_lrpid; /* last receive pid */
29 unsigned long __unused4;
30 unsigned long __unused5;
31};
32
33#endif /* _CRIS_MSGBUF_H */
diff --git a/arch/cris/include/asm/param.h b/arch/cris/include/asm/param.h
new file mode 100644
index 00000000000..484fcf8667c
--- /dev/null
+++ b/arch/cris/include/asm/param.h
@@ -0,0 +1,10 @@
1#ifndef _ASMCRIS_PARAM_H
2#define _ASMCRIS_PARAM_H
3
4/* Currently we assume that HZ=100 is good for CRIS. */
5
6#define EXEC_PAGESIZE 8192
7
8#include <asm-generic/param.h>
9
10#endif /* _ASMCRIS_PARAM_H */
diff --git a/arch/cris/include/asm/poll.h b/arch/cris/include/asm/poll.h
new file mode 100644
index 00000000000..c98509d3149
--- /dev/null
+++ b/arch/cris/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/cris/include/asm/posix_types.h b/arch/cris/include/asm/posix_types.h
new file mode 100644
index 00000000000..ce3fb25a460
--- /dev/null
+++ b/arch/cris/include/asm/posix_types.h
@@ -0,0 +1,66 @@
1/* $Id: posix_types.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */
2
3/* We cheat a bit and use our C-coded bitops functions from asm/bitops.h */
4/* I guess we should write these in assembler because they are used often. */
5
6#ifndef __ARCH_CRIS_POSIX_TYPES_H
7#define __ARCH_CRIS_POSIX_TYPES_H
8
9/*
10 * This file is generally used by user-level software, so you need to
11 * be a little careful about namespace pollution etc. Also, we cannot
12 * assume GCC is being used.
13 */
14
15typedef unsigned long __kernel_ino_t;
16typedef unsigned short __kernel_mode_t;
17typedef unsigned short __kernel_nlink_t;
18typedef long __kernel_off_t;
19typedef int __kernel_pid_t;
20typedef unsigned short __kernel_ipc_pid_t;
21typedef unsigned short __kernel_uid_t;
22typedef unsigned short __kernel_gid_t;
23typedef __SIZE_TYPE__ __kernel_size_t;
24typedef long __kernel_ssize_t;
25typedef int __kernel_ptrdiff_t;
26typedef long __kernel_time_t;
27typedef long __kernel_suseconds_t;
28typedef long __kernel_clock_t;
29typedef int __kernel_timer_t;
30typedef int __kernel_clockid_t;
31typedef int __kernel_daddr_t;
32typedef char * __kernel_caddr_t;
33typedef unsigned short __kernel_uid16_t;
34typedef unsigned short __kernel_gid16_t;
35typedef unsigned int __kernel_uid32_t;
36typedef unsigned int __kernel_gid32_t;
37
38typedef unsigned short __kernel_old_uid_t;
39typedef unsigned short __kernel_old_gid_t;
40typedef unsigned short __kernel_old_dev_t;
41
42#ifdef __GNUC__
43typedef long long __kernel_loff_t;
44#endif
45
46typedef struct {
47 int val[2];
48} __kernel_fsid_t;
49
50#ifdef __KERNEL__
51
52#undef __FD_SET
53#define __FD_SET(fd,fdsetp) set_bit(fd, (void *)(fdsetp))
54
55#undef __FD_CLR
56#define __FD_CLR(fd,fdsetp) clear_bit(fd, (void *)(fdsetp))
57
58#undef __FD_ISSET
59#define __FD_ISSET(fd,fdsetp) test_bit(fd, (void *)(fdsetp))
60
61#undef __FD_ZERO
62#define __FD_ZERO(fdsetp) memset((void *)(fdsetp), 0, __FDSET_LONGS << 2)
63
64#endif /* __KERNEL__ */
65
66#endif /* __ARCH_CRIS_POSIX_TYPES_H */
diff --git a/arch/cris/include/asm/resource.h b/arch/cris/include/asm/resource.h
new file mode 100644
index 00000000000..b5d29448de4
--- /dev/null
+++ b/arch/cris/include/asm/resource.h
@@ -0,0 +1,6 @@
1#ifndef _CRIS_RESOURCE_H
2#define _CRIS_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif
diff --git a/arch/cris/include/asm/rs485.h b/arch/cris/include/asm/rs485.h
new file mode 100644
index 00000000000..ad40f9fbcb8
--- /dev/null
+++ b/arch/cris/include/asm/rs485.h
@@ -0,0 +1,18 @@
1/* RS-485 structures */
2
3/* Used with ioctl() TIOCSERSETRS485 for backward compatibility!
4 * XXX: Do not use it for new code!
5 */
6struct rs485_control {
7 unsigned short rts_on_send;
8 unsigned short rts_after_sent;
9 unsigned long delay_rts_before_send;
10 unsigned short enabled;
11};
12
13/* Used with ioctl() TIOCSERWRRS485 */
14struct rs485_write {
15 unsigned short outc_size;
16 unsigned char *outc;
17};
18
diff --git a/arch/cris/include/asm/rtc.h b/arch/cris/include/asm/rtc.h
new file mode 100644
index 00000000000..17d3019529e
--- /dev/null
+++ b/arch/cris/include/asm/rtc.h
@@ -0,0 +1,107 @@
1
2#ifndef __RTC_H__
3#define __RTC_H__
4
5#ifdef CONFIG_ETRAX_DS1302
6 /* Dallas DS1302 clock/calendar register numbers. */
7# define RTC_SECONDS 0
8# define RTC_MINUTES 1
9# define RTC_HOURS 2
10# define RTC_DAY_OF_MONTH 3
11# define RTC_MONTH 4
12# define RTC_WEEKDAY 5
13# define RTC_YEAR 6
14# define RTC_CONTROL 7
15
16 /* Bits in CONTROL register. */
17# define RTC_CONTROL_WRITEPROTECT 0x80
18# define RTC_TRICKLECHARGER 8
19
20 /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
21# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
22# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
23# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
24# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
25# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
26# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
27# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
28
29#elif defined(CONFIG_ETRAX_PCF8563)
30 /* I2C bus slave registers. */
31# define RTC_I2C_READ 0xa3
32# define RTC_I2C_WRITE 0xa2
33
34 /* Phillips PCF8563 registers. */
35# define RTC_CONTROL1 0x00 /* Control/Status register 1. */
36# define RTC_CONTROL2 0x01 /* Control/Status register 2. */
37# define RTC_CLOCKOUT_FREQ 0x0d /* CLKOUT frequency. */
38# define RTC_TIMER_CONTROL 0x0e /* Timer control. */
39# define RTC_TIMER_CNTDOWN 0x0f /* Timer countdown. */
40
41 /* BCD encoded clock registers. */
42# define RTC_SECONDS 0x02
43# define RTC_MINUTES 0x03
44# define RTC_HOURS 0x04
45# define RTC_DAY_OF_MONTH 0x05
46# define RTC_WEEKDAY 0x06 /* Not coded in BCD! */
47# define RTC_MONTH 0x07
48# define RTC_YEAR 0x08
49# define RTC_MINUTE_ALARM 0x09
50# define RTC_HOUR_ALARM 0x0a
51# define RTC_DAY_ALARM 0x0b
52# define RTC_WEEKDAY_ALARM 0x0c
53
54#endif
55
56#ifdef CONFIG_ETRAX_DS1302
57extern unsigned char ds1302_readreg(int reg);
58extern void ds1302_writereg(int reg, unsigned char val);
59extern int ds1302_init(void);
60# define CMOS_READ(x) ds1302_readreg(x)
61# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
62# define RTC_INIT() ds1302_init()
63#elif defined(CONFIG_ETRAX_PCF8563)
64extern unsigned char pcf8563_readreg(int reg);
65extern void pcf8563_writereg(int reg, unsigned char val);
66extern int pcf8563_init(void);
67# define CMOS_READ(x) pcf8563_readreg(x)
68# define CMOS_WRITE(val,reg) pcf8563_writereg(reg,val)
69# define RTC_INIT() pcf8563_init()
70#else
71 /* No RTC configured so we shouldn't try to access any. */
72# define CMOS_READ(x) 42
73# define CMOS_WRITE(x,y)
74# define RTC_INIT() (-1)
75#endif
76
77/*
78 * The struct used to pass data via the following ioctl. Similar to the
79 * struct tm in <time.h>, but it needs to be here so that the kernel
80 * source is self contained, allowing cross-compiles, etc. etc.
81 */
82struct rtc_time {
83 int tm_sec;
84 int tm_min;
85 int tm_hour;
86 int tm_mday;
87 int tm_mon;
88 int tm_year;
89 int tm_wday;
90 int tm_yday;
91 int tm_isdst;
92};
93
94/* ioctl() calls that are permitted to the /dev/rtc interface. */
95#define RTC_MAGIC 'p'
96/* Read RTC time. */
97#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time)
98/* Set RTC time. */
99#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time)
100#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
101/* Voltage low detector */
102#define RTC_VL_READ _IOR(RTC_MAGIC, 0x13, int)
103/* Clear voltage low information */
104#define RTC_VL_CLR _IO(RTC_MAGIC, 0x14)
105#define RTC_MAX_IOCTL 0x14
106
107#endif /* __RTC_H__ */
diff --git a/arch/cris/include/asm/sembuf.h b/arch/cris/include/asm/sembuf.h
new file mode 100644
index 00000000000..7fed9843796
--- /dev/null
+++ b/arch/cris/include/asm/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef _CRIS_SEMBUF_H
2#define _CRIS_SEMBUF_H
3
4/*
5 * The semid64_ds structure for CRIS architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _CRIS_SEMBUF_H */
diff --git a/arch/cris/include/asm/setup.h b/arch/cris/include/asm/setup.h
new file mode 100644
index 00000000000..b90728652d1
--- /dev/null
+++ b/arch/cris/include/asm/setup.h
@@ -0,0 +1,6 @@
1#ifndef _CRIS_SETUP_H
2#define _CRIS_SETUP_H
3
4#define COMMAND_LINE_SIZE 256
5
6#endif
diff --git a/arch/cris/include/asm/shmbuf.h b/arch/cris/include/asm/shmbuf.h
new file mode 100644
index 00000000000..3239e3f000e
--- /dev/null
+++ b/arch/cris/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef _CRIS_SHMBUF_H
2#define _CRIS_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for CRIS architecture (same as for i386)
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _CRIS_SHMBUF_H */
diff --git a/arch/cris/include/asm/sigcontext.h b/arch/cris/include/asm/sigcontext.h
new file mode 100644
index 00000000000..a1d634e120d
--- /dev/null
+++ b/arch/cris/include/asm/sigcontext.h
@@ -0,0 +1,24 @@
1/* $Id: sigcontext.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */
2
3#ifndef _ASM_CRIS_SIGCONTEXT_H
4#define _ASM_CRIS_SIGCONTEXT_H
5
6#include <asm/ptrace.h>
7
8/* This struct is saved by setup_frame in signal.c, to keep the current context while
9 a signal handler is executed. It's restored by sys_sigreturn.
10
11 To keep things simple, we use pt_regs here even though normally you just specify
12 the list of regs to save. Then we can use copy_from_user on the entire regs instead
13 of a bunch of get_user's as well...
14
15*/
16
17struct sigcontext {
18 struct pt_regs regs; /* needs to be first */
19 unsigned long oldmask;
20 unsigned long usp; /* usp before stacking this gunk on it */
21};
22
23#endif
24
diff --git a/arch/cris/include/asm/siginfo.h b/arch/cris/include/asm/siginfo.h
new file mode 100644
index 00000000000..c1cd6d16928
--- /dev/null
+++ b/arch/cris/include/asm/siginfo.h
@@ -0,0 +1,6 @@
1#ifndef _CRIS_SIGINFO_H
2#define _CRIS_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif
diff --git a/arch/cris/include/asm/socket.h b/arch/cris/include/asm/socket.h
new file mode 100644
index 00000000000..1a4a61909ca
--- /dev/null
+++ b/arch/cris/include/asm/socket.h
@@ -0,0 +1,69 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4/* almost the same as asm-i386/socket.h */
5
6#include <asm/sockios.h>
7
8/* For setsockoptions(2) */
9#define SOL_SOCKET 1
10
11#define SO_DEBUG 1
12#define SO_REUSEADDR 2
13#define SO_TYPE 3
14#define SO_ERROR 4
15#define SO_DONTROUTE 5
16#define SO_BROADCAST 6
17#define SO_SNDBUF 7
18#define SO_RCVBUF 8
19#define SO_SNDBUFFORCE 32
20#define SO_RCVBUFFORCE 33
21#define SO_KEEPALIVE 9
22#define SO_OOBINLINE 10
23#define SO_NO_CHECK 11
24#define SO_PRIORITY 12
25#define SO_LINGER 13
26#define SO_BSDCOMPAT 14
27/* To add :#define SO_REUSEPORT 15 */
28#define SO_PASSCRED 16
29#define SO_PEERCRED 17
30#define SO_RCVLOWAT 18
31#define SO_SNDLOWAT 19
32#define SO_RCVTIMEO 20
33#define SO_SNDTIMEO 21
34
35/* Security levels - as per NRL IPv6 - don't actually do anything */
36#define SO_SECURITY_AUTHENTICATION 22
37#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
38#define SO_SECURITY_ENCRYPTION_NETWORK 24
39
40#define SO_BINDTODEVICE 25
41
42/* Socket filtering */
43#define SO_ATTACH_FILTER 26
44#define SO_DETACH_FILTER 27
45
46#define SO_PEERNAME 28
47#define SO_TIMESTAMP 29
48#define SCM_TIMESTAMP SO_TIMESTAMP
49
50#define SO_ACCEPTCONN 30
51
52#define SO_PEERSEC 31
53#define SO_PASSSEC 34
54#define SO_TIMESTAMPNS 35
55#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
56
57#define SO_MARK 36
58
59#define SO_TIMESTAMPING 37
60#define SCM_TIMESTAMPING SO_TIMESTAMPING
61
62#define SO_PROTOCOL 38
63#define SO_DOMAIN 39
64
65#define SO_RXQ_OVFL 40
66
67#endif /* _ASM_SOCKET_H */
68
69
diff --git a/arch/cris/include/asm/sockios.h b/arch/cris/include/asm/sockios.h
new file mode 100644
index 00000000000..cfe7bfecf59
--- /dev/null
+++ b/arch/cris/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef __ARCH_CRIS_SOCKIOS__
2#define __ARCH_CRIS_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/arch/cris/include/asm/stat.h b/arch/cris/include/asm/stat.h
new file mode 100644
index 00000000000..9e558cc3c43
--- /dev/null
+++ b/arch/cris/include/asm/stat.h
@@ -0,0 +1,81 @@
1#ifndef _CRIS_STAT_H
2#define _CRIS_STAT_H
3
4/* Keep this a verbatim copy of i386 version; tweak CRIS-specific bits in
5 the kernel if necessary. */
6
7struct __old_kernel_stat {
8 unsigned short st_dev;
9 unsigned short st_ino;
10 unsigned short st_mode;
11 unsigned short st_nlink;
12 unsigned short st_uid;
13 unsigned short st_gid;
14 unsigned short st_rdev;
15 unsigned long st_size;
16 unsigned long st_atime;
17 unsigned long st_mtime;
18 unsigned long st_ctime;
19};
20
21#define STAT_HAVE_NSEC 1
22
23struct stat {
24 unsigned long st_dev;
25 unsigned long st_ino;
26 unsigned short st_mode;
27 unsigned short st_nlink;
28 unsigned short st_uid;
29 unsigned short st_gid;
30 unsigned long st_rdev;
31 unsigned long st_size;
32 unsigned long st_blksize;
33 unsigned long st_blocks;
34 unsigned long st_atime;
35 unsigned long st_atime_nsec;
36 unsigned long st_mtime;
37 unsigned long st_mtime_nsec;
38 unsigned long st_ctime;
39 unsigned long st_ctime_nsec;
40 unsigned long __unused4;
41 unsigned long __unused5;
42};
43
44/* This matches struct stat64 in glibc2.1, hence the absolutely
45 * insane amounts of padding around dev_t's.
46 */
47struct stat64 {
48 unsigned long long st_dev;
49 unsigned char __pad0[4];
50
51#define STAT64_HAS_BROKEN_ST_INO 1
52 unsigned long __st_ino;
53
54 unsigned int st_mode;
55 unsigned int st_nlink;
56
57 unsigned long st_uid;
58 unsigned long st_gid;
59
60 unsigned long long st_rdev;
61 unsigned char __pad3[4];
62
63 long long st_size;
64 unsigned long st_blksize;
65
66 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
67 unsigned long __pad4; /* future possible st_blocks high bits */
68
69 unsigned long st_atime;
70 unsigned long st_atime_nsec;
71
72 unsigned long st_mtime;
73 unsigned long st_mtime_nsec;
74
75 unsigned long st_ctime;
76 unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */
77
78 unsigned long long st_ino;
79};
80
81#endif
diff --git a/arch/cris/include/asm/statfs.h b/arch/cris/include/asm/statfs.h
new file mode 100644
index 00000000000..fdaf921844b
--- /dev/null
+++ b/arch/cris/include/asm/statfs.h
@@ -0,0 +1,6 @@
1#ifndef _CRIS_STATFS_H
2#define _CRIS_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif
diff --git a/arch/cris/include/asm/sync_serial.h b/arch/cris/include/asm/sync_serial.h
new file mode 100644
index 00000000000..7f827fea30e
--- /dev/null
+++ b/arch/cris/include/asm/sync_serial.h
@@ -0,0 +1,132 @@
1/*
2 * ioctl defines for synchronous serial port driver
3 *
4 * Copyright (c) 2001-2003 Axis Communications AB
5 *
6 * Author: Mikael Starvik
7 *
8 */
9
10#ifndef SYNC_SERIAL_H
11#define SYNC_SERIAL_H
12
13#include <linux/ioctl.h>
14
15#define SSP_SPEED _IOR('S', 0, unsigned int)
16#define SSP_MODE _IOR('S', 1, unsigned int)
17#define SSP_FRAME_SYNC _IOR('S', 2, unsigned int)
18#define SSP_IPOLARITY _IOR('S', 3, unsigned int)
19#define SSP_OPOLARITY _IOR('S', 4, unsigned int)
20#define SSP_SPI _IOR('S', 5, unsigned int)
21#define SSP_INBUFCHUNK _IOR('S', 6, unsigned int)
22#define SSP_INPUT _IOR('S', 7, unsigned int)
23
24/* Values for SSP_SPEED */
25#define SSP150 0
26#define SSP300 1
27#define SSP600 2
28#define SSP1200 3
29#define SSP2400 4
30#define SSP4800 5
31#define SSP9600 6
32#define SSP19200 7
33#define SSP28800 8
34#define SSP57600 9
35#define SSP115200 10
36#define SSP230400 11
37#define SSP460800 12
38#define SSP921600 13
39#define SSP3125000 14
40#define CODEC 15
41#define CODEC_f32768 16
42
43#define FREQ_4MHz 0
44#define FREQ_2MHz 1
45#define FREQ_1MHz 2
46#define FREQ_512kHz 3
47#define FREQ_256kHz 4
48#define FREQ_128kHz 5
49#define FREQ_64kHz 6
50#define FREQ_32kHz 7
51/* FREQ_* with values where bit (value & 0x10) is set are */
52/* used for CODEC_f32768 */
53#define FREQ_4096kHz 16 /* CODEC_f32768 */
54
55/* Used by application to set CODEC divider, word rate and frame rate */
56#define CODEC_VAL(freq, clk_per_sync, sync_per_frame) \
57 ((CODEC + ((freq & 0x10) >> 4)) | (freq << 8) | \
58 (clk_per_sync << 16) | (sync_per_frame << 28))
59
60/* Used by driver to extract speed */
61#define GET_SPEED(x) (x & 0xff)
62#define GET_FREQ(x) ((x & 0xff00) >> 8)
63#define GET_WORD_RATE(x) (((x & 0x0fff0000) >> 16) - 1)
64#define GET_FRAME_RATE(x) (((x & 0xf0000000) >> 28) - 1)
65
66/* Values for SSP_MODE */
67#define MASTER_OUTPUT 0
68#define SLAVE_OUTPUT 1
69#define MASTER_INPUT 2
70#define SLAVE_INPUT 3
71#define MASTER_BIDIR 4
72#define SLAVE_BIDIR 5
73
74/* Values for SSP_FRAME_SYNC */
75#define NORMAL_SYNC 1
76#define EARLY_SYNC 2
77#define SECOND_WORD_SYNC 0x40000
78#define LATE_SYNC 0x80000
79
80#define BIT_SYNC 4
81#define WORD_SYNC 8
82#define EXTENDED_SYNC 0x10
83
84#define SYNC_OFF 0x20
85#define SYNC_ON 0x40
86#define WORD_SIZE_8 0x80
87#define WORD_SIZE_12 0x100
88#define WORD_SIZE_16 0x200
89#define WORD_SIZE_24 0x400
90#define WORD_SIZE_32 0x800
91#define BIT_ORDER_LSB 0x1000
92#define BIT_ORDER_MSB 0x2000
93#define FLOW_CONTROL_ENABLE 0x4000
94#define FLOW_CONTROL_DISABLE 0x8000
95#define CLOCK_GATED 0x10000
96#define CLOCK_NOT_GATED 0x20000
97
98/* Values for SSP_IPOLARITY and SSP_OPOLARITY */
99#define CLOCK_NORMAL 1
100#define CLOCK_INVERT 2
101#define CLOCK_INEGEDGE CLOCK_NORMAL
102#define CLOCK_IPOSEDGE CLOCK_INVERT
103#define FRAME_NORMAL 4
104#define FRAME_INVERT 8
105#define STATUS_NORMAL 0x10
106#define STATUS_INVERT 0x20
107
108/* Values for SSP_SPI */
109#define SPI_MASTER 0
110#define SPI_SLAVE 1
111
112/* Values for SSP_INBUFCHUNK */
113/* plain integer with the size of DMA chunks */
114
115/* To ensure that the timestamps are aligned with the data being read
116 * the read length MUST be a multiple of the length of the DMA buffers.
117 *
118 * Use a multiple of SSP_INPUT_CHUNK_SIZE defined below.
119 */
120#define SSP_INPUT_CHUNK_SIZE 256
121
122/* Request struct to pass through the ioctl interface to read
123 * data with timestamps.
124 */
125struct ssp_request {
126 char __user *buf; /* Where to put the data. */
127 size_t len; /* Size of buf. MUST be a multiple of */
128 /* SSP_INPUT_CHUNK_SIZE! */
129 struct timespec ts; /* The time the data was sampled. */
130};
131
132#endif
diff --git a/arch/cris/include/asm/system.h b/arch/cris/include/asm/system.h
new file mode 100644
index 00000000000..ea10592f7d7
--- /dev/null
+++ b/arch/cris/include/asm/system.h
@@ -0,0 +1,89 @@
1#ifndef __ASM_CRIS_SYSTEM_H
2#define __ASM_CRIS_SYSTEM_H
3
4#include <linux/irqflags.h>
5#include <arch/system.h>
6
7/* the switch_to macro calls resume, an asm function in entry.S which does the actual
8 * task switching.
9 */
10
11extern struct task_struct *resume(struct task_struct *prev, struct task_struct *next, int);
12#define switch_to(prev,next,last) last = resume(prev,next, \
13 (int)&((struct task_struct *)0)->thread)
14
15#define barrier() __asm__ __volatile__("": : :"memory")
16#define mb() barrier()
17#define rmb() mb()
18#define wmb() mb()
19#define read_barrier_depends() do { } while(0)
20#define set_mb(var, value) do { var = value; mb(); } while (0)
21
22#ifdef CONFIG_SMP
23#define smp_mb() mb()
24#define smp_rmb() rmb()
25#define smp_wmb() wmb()
26#define smp_read_barrier_depends() read_barrier_depends()
27#else
28#define smp_mb() barrier()
29#define smp_rmb() barrier()
30#define smp_wmb() barrier()
31#define smp_read_barrier_depends() do { } while(0)
32#endif
33
34#define iret()
35
36/*
37 * disable hlt during certain critical i/o operations
38 */
39#define HAVE_DISABLE_HLT
40void disable_hlt(void);
41void enable_hlt(void);
42
43static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
44{
45 /* since Etrax doesn't have any atomic xchg instructions, we need to disable
46 irq's (if enabled) and do it with move.d's */
47 unsigned long flags,temp;
48 local_irq_save(flags); /* save flags, including irq enable bit and shut off irqs */
49 switch (size) {
50 case 1:
51 *((unsigned char *)&temp) = x;
52 x = *(unsigned char *)ptr;
53 *(unsigned char *)ptr = *((unsigned char *)&temp);
54 break;
55 case 2:
56 *((unsigned short *)&temp) = x;
57 x = *(unsigned short *)ptr;
58 *(unsigned short *)ptr = *((unsigned short *)&temp);
59 break;
60 case 4:
61 temp = x;
62 x = *(unsigned long *)ptr;
63 *(unsigned long *)ptr = temp;
64 break;
65 }
66 local_irq_restore(flags); /* restore irq enable bit */
67 return x;
68}
69
70#include <asm-generic/cmpxchg-local.h>
71
72/*
73 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
74 * them available.
75 */
76#define cmpxchg_local(ptr, o, n) \
77 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
78 (unsigned long)(n), sizeof(*(ptr))))
79#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
80
81#ifndef CONFIG_SMP
82#include <asm-generic/cmpxchg.h>
83#endif
84
85#define arch_align_stack(x) (x)
86
87void default_idle(void);
88
89#endif
diff --git a/arch/cris/include/asm/termbits.h b/arch/cris/include/asm/termbits.h
new file mode 100644
index 00000000000..1c43bc874cc
--- /dev/null
+++ b/arch/cris/include/asm/termbits.h
@@ -0,0 +1,235 @@
1/* $Id: termbits.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ */
2
3#ifndef __ARCH_ETRAX100_TERMBITS_H__
4#define __ARCH_ETRAX100_TERMBITS_H__
5
6#include <linux/posix_types.h>
7
8typedef unsigned char cc_t;
9typedef unsigned int speed_t;
10typedef unsigned int tcflag_t;
11
12#define NCCS 19
13struct termios {
14 tcflag_t c_iflag; /* input mode flags */
15 tcflag_t c_oflag; /* output mode flags */
16 tcflag_t c_cflag; /* control mode flags */
17 tcflag_t c_lflag; /* local mode flags */
18 cc_t c_line; /* line discipline */
19 cc_t c_cc[NCCS]; /* control characters */
20};
21
22struct termios2 {
23 tcflag_t c_iflag; /* input mode flags */
24 tcflag_t c_oflag; /* output mode flags */
25 tcflag_t c_cflag; /* control mode flags */
26 tcflag_t c_lflag; /* local mode flags */
27 cc_t c_line; /* line discipline */
28 cc_t c_cc[NCCS]; /* control characters */
29 speed_t c_ispeed; /* input speed */
30 speed_t c_ospeed; /* output speed */
31};
32
33struct ktermios {
34 tcflag_t c_iflag; /* input mode flags */
35 tcflag_t c_oflag; /* output mode flags */
36 tcflag_t c_cflag; /* control mode flags */
37 tcflag_t c_lflag; /* local mode flags */
38 cc_t c_line; /* line discipline */
39 cc_t c_cc[NCCS]; /* control characters */
40 speed_t c_ispeed; /* input speed */
41 speed_t c_ospeed; /* output speed */
42};
43
44/* c_cc characters */
45#define VINTR 0
46#define VQUIT 1
47#define VERASE 2
48#define VKILL 3
49#define VEOF 4
50#define VTIME 5
51#define VMIN 6
52#define VSWTC 7
53#define VSTART 8
54#define VSTOP 9
55#define VSUSP 10
56#define VEOL 11
57#define VREPRINT 12
58#define VDISCARD 13
59#define VWERASE 14
60#define VLNEXT 15
61#define VEOL2 16
62
63/* c_iflag bits */
64#define IGNBRK 0000001
65#define BRKINT 0000002
66#define IGNPAR 0000004
67#define PARMRK 0000010
68#define INPCK 0000020
69#define ISTRIP 0000040
70#define INLCR 0000100
71#define IGNCR 0000200
72#define ICRNL 0000400
73#define IUCLC 0001000
74#define IXON 0002000
75#define IXANY 0004000
76#define IXOFF 0010000
77#define IMAXBEL 0020000
78#define IUTF8 0040000
79
80/* c_oflag bits */
81#define OPOST 0000001
82#define OLCUC 0000002
83#define ONLCR 0000004
84#define OCRNL 0000010
85#define ONOCR 0000020
86#define ONLRET 0000040
87#define OFILL 0000100
88#define OFDEL 0000200
89#define NLDLY 0000400
90#define NL0 0000000
91#define NL1 0000400
92#define CRDLY 0003000
93#define CR0 0000000
94#define CR1 0001000
95#define CR2 0002000
96#define CR3 0003000
97#define TABDLY 0014000
98#define TAB0 0000000
99#define TAB1 0004000
100#define TAB2 0010000
101#define TAB3 0014000
102#define XTABS 0014000
103#define BSDLY 0020000
104#define BS0 0000000
105#define BS1 0020000
106#define VTDLY 0040000
107#define VT0 0000000
108#define VT1 0040000
109#define FFDLY 0100000
110#define FF0 0000000
111#define FF1 0100000
112
113/* c_cflag bit meaning */
114/*
115 * 3 2 1
116 * 10 987 654 321 098 765 432 109 876 543 210
117 * | | ||| CBAUD
118 * obaud
119 *
120 * ||CSIZE
121 *
122 * |CSTOP
123 * |CREAD
124 * |CPARENB
125 *
126 * |CPARODD
127 * |HUPCL
128 * |CLOCAL
129 * |CBAUDEX
130 * 10 987 654 321 098 765 432 109 876 543 210
131 * | || || CIBAUD, IBSHIFT=16
132 * ibaud
133 * |CMSPAR
134 * | CRTSCTS
135 * x x xxx xxx x x xx Free bits
136 */
137
138#define CBAUD 0010017
139#define B0 0000000 /* hang up */
140#define B50 0000001
141#define B75 0000002
142#define B110 0000003
143#define B134 0000004
144#define B150 0000005
145#define B200 0000006
146#define B300 0000007
147#define B600 0000010
148#define B1200 0000011
149#define B1800 0000012
150#define B2400 0000013
151#define B4800 0000014
152#define B9600 0000015
153#define B19200 0000016
154#define B38400 0000017
155#define EXTA B19200
156#define EXTB B38400
157#define CSIZE 0000060
158#define CS5 0000000
159#define CS6 0000020
160#define CS7 0000040
161#define CS8 0000060
162#define CSTOPB 0000100
163#define CREAD 0000200
164#define PARENB 0000400
165#define PARODD 0001000
166#define HUPCL 0002000
167#define CLOCAL 0004000
168#define CBAUDEX 0010000
169#define BOTHER 0010000
170#define B57600 0010001
171#define B115200 0010002
172#define B230400 0010003
173#define B460800 0010004
174
175/* Unsupported rates, but needed to avoid compile error. */
176#define B500000 0010005
177#define B576000 0010006
178#define B1000000 0010010
179#define B1152000 0010011
180#define B1500000 0010012
181#define B2000000 0010013
182#define B2500000 0010014
183#define B3000000 0010015
184#define B3500000 0010016
185#define B4000000 0010017
186
187/* etrax supports these additional three baud rates */
188#define B921600 0010005
189#define B1843200 0010006
190#define B6250000 0010007
191/* ETRAX FS supports this as well */
192#define B12500000 0010010
193#define CIBAUD 002003600000 /* input baud rate (used in v32) */
194/* The values for CIBAUD bits are the same as the values for CBAUD and CBAUDEX
195 * shifted left IBSHIFT bits.
196 */
197#define IBSHIFT 16
198#define CMSPAR 010000000000 /* mark or space (stick) parity - PARODD=space*/
199#define CRTSCTS 020000000000 /* flow control */
200
201/* c_lflag bits */
202#define ISIG 0000001
203#define ICANON 0000002
204#define XCASE 0000004
205#define ECHO 0000010
206#define ECHOE 0000020
207#define ECHOK 0000040
208#define ECHONL 0000100
209#define NOFLSH 0000200
210#define TOSTOP 0000400
211#define ECHOCTL 0001000
212#define ECHOPRT 0002000
213#define ECHOKE 0004000
214#define FLUSHO 0010000
215#define PENDIN 0040000
216#define IEXTEN 0100000
217#define EXTPROC 0200000
218
219/* tcflow() and TCXONC use these */
220#define TCOOFF 0
221#define TCOON 1
222#define TCIOFF 2
223#define TCION 3
224
225/* tcflush() and TCFLSH use these */
226#define TCIFLUSH 0
227#define TCOFLUSH 1
228#define TCIOFLUSH 2
229
230/* tcsetattr uses these */
231#define TCSANOW 0
232#define TCSADRAIN 1
233#define TCSAFLUSH 2
234
235#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 21:23:16 -0400