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authorMike Frysinger <vapier@gentoo.org>2011-05-06 02:26:38 -0400
committerMike Frysinger <vapier@gentoo.org>2011-05-25 08:24:08 -0400
commit93f1742c631a87f02622e6a4570e65479f598672 (patch)
treec133db266679ade63ffedb873713a6b55b79cdcb /arch/blackfin/mach-bf561
parent803103925b1f23fe0edf91348be3e5a8fd352d5e (diff)
Blackfin: update anomaly lists to latest public info
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h15
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 6a3499b0209..22b5ab77302 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -5,13 +5,13 @@
5 * and can be replaced with that version at any time 5 * and can be replaced with that version at any time
6 * DO NOT EDIT THIS FILE 6 * DO NOT EDIT THIS FILE
7 * 7 *
8 * Copyright 2004-2010 Analog Devices Inc. 8 * Copyright 2004-2011 Analog Devices Inc.
9 * Licensed under the ADI BSD license. 9 * Licensed under the ADI BSD license.
10 * https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd 10 * https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
11 */ 11 */
12 12
13/* This file should be up to date with: 13/* This file should be up to date with:
14 * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List 14 * - Revision R, 05/25/2010; ADSP-BF561 Blackfin Processor Anomaly List
15 */ 15 */
16 16
17#ifndef _MACH_ANOMALY_H_ 17#ifndef _MACH_ANOMALY_H_
@@ -290,12 +290,18 @@
290#define ANOMALY_05000428 (__SILICON_REVISION__ > 3) 290#define ANOMALY_05000428 (__SILICON_REVISION__ > 3)
291/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ 291/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
292#define ANOMALY_05000443 (1) 292#define ANOMALY_05000443 (1)
293/* SCKELOW Feature Is Not Functional */
294#define ANOMALY_05000458 (1)
293/* False Hardware Error when RETI Points to Invalid Memory */ 295/* False Hardware Error when RETI Points to Invalid Memory */
294#define ANOMALY_05000461 (1) 296#define ANOMALY_05000461 (1)
297/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
298#define ANOMALY_05000462 (1)
299/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */
300#define ANOMALY_05000471 (1)
295/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ 301/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
296#define ANOMALY_05000473 (1) 302#define ANOMALY_05000473 (1)
297/* Possible Lockup Condition whem Modifying PLL from External Memory */ 303/* Possible Lockup Condition whem Modifying PLL from External Memory */
298#define ANOMALY_05000475 (__SILICON_REVISION__ < 4) 304#define ANOMALY_05000475 (1)
299/* TESTSET Instruction Cannot Be Interrupted */ 305/* TESTSET Instruction Cannot Be Interrupted */
300#define ANOMALY_05000477 (1) 306#define ANOMALY_05000477 (1)
301/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ 307/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
@@ -314,12 +320,14 @@
314#define ANOMALY_05000353 (1) 320#define ANOMALY_05000353 (1)
315#define ANOMALY_05000364 (0) 321#define ANOMALY_05000364 (0)
316#define ANOMALY_05000380 (0) 322#define ANOMALY_05000380 (0)
323#define ANOMALY_05000383 (0)
317#define ANOMALY_05000386 (1) 324#define ANOMALY_05000386 (1)
318#define ANOMALY_05000389 (0) 325#define ANOMALY_05000389 (0)
319#define ANOMALY_05000400 (0) 326#define ANOMALY_05000400 (0)
320#define ANOMALY_05000430 (0) 327#define ANOMALY_05000430 (0)
321#define ANOMALY_05000432 (0) 328#define ANOMALY_05000432 (0)
322#define ANOMALY_05000435 (0) 329#define ANOMALY_05000435 (0)
330#define ANOMALY_05000440 (0)
323#define ANOMALY_05000447 (0) 331#define ANOMALY_05000447 (0)
324#define ANOMALY_05000448 (0) 332#define ANOMALY_05000448 (0)
325#define ANOMALY_05000456 (0) 333#define ANOMALY_05000456 (0)
@@ -327,6 +335,7 @@
327#define ANOMALY_05000465 (0) 335#define ANOMALY_05000465 (0)
328#define ANOMALY_05000467 (0) 336#define ANOMALY_05000467 (0)
329#define ANOMALY_05000474 (0) 337#define ANOMALY_05000474 (0)
338#define ANOMALY_05000480 (0)
330#define ANOMALY_05000485 (0) 339#define ANOMALY_05000485 (0)
331 340
332#endif 341#endif