aboutsummaryrefslogtreecommitdiffstats
path: root/arch/avr32
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2011-02-14 06:36:51 -0500
committerDan Williams <dan.j.williams@intel.com>2011-02-14 06:36:51 -0500
commit0670e7157f75ec6d2231fbc6f67b075d6b6d486f (patch)
tree64591858de42da54afc979338ee083d1e6d672a0 /arch/avr32
parent80cc07af0f6692a7d8fdc5087594d1988a701266 (diff)
parent4aa5f366431fef0afca0df348ca9782c63ac9911 (diff)
Merge branch 'dw_dmac' into dmaengine
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index e67c9994542..2747cde8c9a 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -2048,6 +2048,8 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2048 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; 2048 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2049 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3); 2049 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2051 rx_dws->src_master = 0;
2052 rx_dws->dst_master = 1;
2051 } 2053 }
2052 2054
2053 /* Check if DMA slave interface for playback should be configured. */ 2055 /* Check if DMA slave interface for playback should be configured. */
@@ -2056,6 +2058,8 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2056 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; 2058 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2057 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4); 2059 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
2058 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2060 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2061 rx_dws->src_master = 0;
2062 rx_dws->dst_master = 1;
2059 } 2063 }
2060 2064
2061 if (platform_device_add_data(pdev, data, 2065 if (platform_device_add_data(pdev, data,
@@ -2128,6 +2132,8 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
2128 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT; 2132 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
2129 dws->cfg_hi = DWC_CFGH_DST_PER(2); 2133 dws->cfg_hi = DWC_CFGH_DST_PER(2);
2130 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2134 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2135 dws->src_master = 0;
2136 dws->dst_master = 1;
2131 2137
2132 if (platform_device_add_data(pdev, data, 2138 if (platform_device_add_data(pdev, data,
2133 sizeof(struct atmel_abdac_pdata))) 2139 sizeof(struct atmel_abdac_pdata)))