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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 04:37:36 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 12:39:17 -0400
commit07e0da78abdc679714a12e7a60137d950c346681 (patch)
tree5a6e759c1063d8ec5113c37f72a906c7db711307 /arch/arm
parentf12d0d7c7786af39435ef6ae9defe47fb58f6091 (diff)
[ARM] nommu: add ARM7TDMI core support
This patch adds ARM7TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mm/Kconfig13
-rw-r--r--arch/arm/mm/Makefile1
-rw-r--r--arch/arm/mm/proc-arm7tdmi.S249
4 files changed, 264 insertions, 0 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 80cee786500..282333fe0a7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -55,6 +55,7 @@ arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3
55# This selects how we optimise for the processor. 55# This selects how we optimise for the processor.
56tune-$(CONFIG_CPU_ARM610) :=-mtune=arm610 56tune-$(CONFIG_CPU_ARM610) :=-mtune=arm610
57tune-$(CONFIG_CPU_ARM710) :=-mtune=arm710 57tune-$(CONFIG_CPU_ARM710) :=-mtune=arm710
58tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
58tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi 59tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
59tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi 60tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
60tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi 61tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 0ac11ea8450..9f860aa9c90 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -25,6 +25,19 @@ config CPU_ARM610
25 Say Y if you want support for the ARM610 processor. 25 Say Y if you want support for the ARM610 processor.
26 Otherwise, say N. 26 Otherwise, say N.
27 27
28# ARM7TDMI
29config CPU_ARM7TDMI
30 bool "Support ARM7TDMI processor"
31 select CPU_32v4T
32 select CPU_ABRT_LV4T
33 select CPU_CACHE_V4
34 help
35 A 32-bit RISC microprocessor based on the ARM7 processor core
36 which has no memory control unit and cache.
37
38 Say Y if you want support for the ARM7TDMI processor.
39 Otherwise, say N.
40
28# ARM710 41# ARM710
29config CPU_ARM710 42config CPU_ARM710
30 bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC 43 bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 2d0ab19db49..908f6d43717 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
46 46
47obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o 47obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o
48obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o 48obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o
49obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
49obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o 50obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
50obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o 51obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o
51obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o 52obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
new file mode 100644
index 00000000000..22d7e3100ea
--- /dev/null
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -0,0 +1,249 @@
1/*
2 * linux/arch/arm/mm/proc-arm7tdmi.S: utility functions for ARM7TDMI
3 *
4 * Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/assembler.h>
14#include <asm/asm-offsets.h>
15#include <asm/pgtable-hwdef.h>
16#include <asm/pgtable.h>
17#include <asm/procinfo.h>
18#include <asm/ptrace.h>
19
20 .text
21/*
22 * cpu_arm7tdmi_proc_init()
23 * cpu_arm7tdmi_do_idle()
24 * cpu_arm7tdmi_dcache_clean_area()
25 * cpu_arm7tdmi_switch_mm()
26 *
27 * These are not required.
28 */
29ENTRY(cpu_arm7tdmi_proc_init)
30ENTRY(cpu_arm7tdmi_do_idle)
31ENTRY(cpu_arm7tdmi_dcache_clean_area)
32ENTRY(cpu_arm7tdmi_switch_mm)
33 mov pc, lr
34
35/*
36 * cpu_arm7tdmi_proc_fin()
37 */
38ENTRY(cpu_arm7tdmi_proc_fin)
39 mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
40 msr cpsr_c, r0
41 mov pc, lr
42
43/*
44 * Function: cpu_arm7tdmi_reset(loc)
45 * Params : loc(r0) address to jump to
46 * Purpose : Sets up everything for a reset and jump to the location for soft reset.
47 */
48ENTRY(cpu_arm7tdmi_reset)
49 mov pc, r0
50
51 __INIT
52
53 .type __arm7tdmi_setup, #function
54__arm7tdmi_setup:
55 mov pc, lr
56 .size __arm7tdmi_setup, . - __arm7tdmi_setup
57
58 __INITDATA
59
60/*
61 * Purpose : Function pointers used to access above functions - all calls
62 * come through these
63 */
64 .type arm7tdmi_processor_functions, #object
65ENTRY(arm7tdmi_processor_functions)
66 .word v4t_late_abort
67 .word cpu_arm7tdmi_proc_init
68 .word cpu_arm7tdmi_proc_fin
69 .word cpu_arm7tdmi_reset
70 .word cpu_arm7tdmi_do_idle
71 .word cpu_arm7tdmi_dcache_clean_area
72 .word cpu_arm7tdmi_switch_mm
73 .word 0 @ cpu_*_set_pte
74 .size arm7tdmi_processor_functions, . - arm7tdmi_processor_functions
75
76 .section ".rodata"
77
78 .type cpu_arch_name, #object
79cpu_arch_name:
80 .asciz "armv4t"
81 .size cpu_arch_name, . - cpu_arch_name
82
83 .type cpu_elf_name, #object
84cpu_elf_name:
85 .asciz "v4"
86 .size cpu_elf_name, . - cpu_elf_name
87
88 .type cpu_arm7tdmi_name, #object
89cpu_arm7tdmi_name:
90 .asciz "ARM7TDMI"
91 .size cpu_arm7tdmi_name, . - cpu_arm7tdmi_name
92
93 .type cpu_triscenda7_name, #object
94cpu_triscenda7_name:
95 .asciz "Triscend-A7x"
96 .size cpu_triscenda7_name, . - cpu_triscenda7_name
97
98 .type cpu_at91_name, #object
99cpu_at91_name:
100 .asciz "Atmel-AT91M40xxx"
101 .size cpu_at91_name, . - cpu_at91_name
102
103 .type cpu_s3c3410_name, #object
104cpu_s3c3410_name:
105 .asciz "Samsung-S3C3410"
106 .size cpu_s3c3410_name, . - cpu_s3c3410_name
107
108 .type cpu_s3c44b0x_name, #object
109cpu_s3c44b0x_name:
110 .asciz "Samsung-S3C44B0x"
111 .size cpu_s3c44b0x_name, . - cpu_s3c44b0x_name
112
113 .type cpu_s3c4510b, #object
114cpu_s3c4510b_name:
115 .asciz "Samsung-S3C4510B"
116 .size cpu_s3c4510b_name, . - cpu_s3c4510b_name
117
118 .type cpu_s3c4530_name, #object
119cpu_s3c4530_name:
120 .asciz "Samsung-S3C4530"
121 .size cpu_s3c4530_name, . - cpu_s3c4530_name
122
123 .type cpu_netarm_name, #object
124cpu_netarm_name:
125 .asciz "NETARM"
126 .size cpu_netarm_name, . - cpu_netarm_name
127
128 .align
129
130 .section ".proc.info.init", #alloc, #execinstr
131
132 .type __arm7tdmi_proc_info, #object
133__arm7tdmi_proc_info:
134 .long 0x41007700
135 .long 0xfff8ff00
136 .long 0
137 .long 0
138 b __arm7tdmi_setup
139 .long cpu_arch_name
140 .long cpu_elf_name
141 .long HWCAP_SWP | HWCAP_26BIT
142 .long cpu_arm7tdmi_name
143 .long arm7tdmi_processor_functions
144 .long 0
145 .long 0
146 .long v4_cache_fns
147 .size __arm7tdmi_proc_info, . - __arm7dmi_proc_info
148
149 .type __triscenda7_proc_info, #object
150__triscenda7_proc_info:
151 .long 0x0001d2ff
152 .long 0x0001ffff
153 .long 0
154 .long 0
155 b __arm7tdmi_setup
156 .long cpu_arch_name
157 .long cpu_elf_name
158 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
159 .long cpu_triscenda7_name
160 .long arm7tdmi_processor_functions
161 .long 0
162 .long 0
163 .long v4_cache_fns
164 .size __triscenda7_proc_info, . - __triscenda7_proc_info
165
166 .type __at91_proc_info, #object
167__at91_proc_info:
168 .long 0x14000040
169 .long 0xfff000e0
170 .long 0
171 .long 0
172 b __arm7tdmi_setup
173 .long cpu_arch_name
174 .long cpu_elf_name
175 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
176 .long cpu_at91_name
177 .long arm7tdmi_processor_functions
178 .long 0
179 .long 0
180 .long v4_cache_fns
181 .size __at91_proc_info, . - __at91_proc_info
182
183 .type __s3c4510b_proc_info, #object
184__s3c4510b_proc_info:
185 .long 0x36365000
186 .long 0xfffff000
187 .long 0
188 .long 0
189 b __arm7tdmi_setup
190 .long cpu_arch_name
191 .long cpu_elf_name
192 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
193 .long cpu_s3c4510b_name
194 .long arm7tdmi_processor_functions
195 .long 0
196 .long 0
197 .long v4_cache_fns
198 .size __s3c4510b_proc_info, . - __s3c4510b_proc_info
199
200 .type __s3c4530_proc_info, #object
201__s3c4530_proc_info:
202 .long 0x4c000000
203 .long 0xfff000e0
204 .long 0
205 .long 0
206 b __arm7tdmi_setup
207 .long cpu_arch_name
208 .long cpu_elf_name
209 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
210 .long cpu_s3c4530_name
211 .long arm7tdmi_processor_functions
212 .long 0
213 .long 0
214 .long v4_cache_fns
215 .size __s3c4530_proc_info, . - __s3c4530_proc_info
216
217 .type __s3c3410_proc_info, #object
218__s3c3410_proc_info:
219 .long 0x34100000
220 .long 0xffff0000
221 .long 0
222 .long 0
223 b __arm7tdmi_setup
224 .long cpu_arch_name
225 .long cpu_elf_name
226 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
227 .long cpu_s3c3410_name
228 .long arm7tdmi_processor_functions
229 .long 0
230 .long 0
231 .long v4_cache_fns
232 .size __s3c3410_proc_info, . - __s3c3410_proc_info
233
234 .type __s3c44b0x_proc_info, #object
235__s3c44b0x_proc_info:
236 .long 0x44b00000
237 .long 0xffff0000
238 .long 0
239 .long 0
240 b __arm7tdmi_setup
241 .long cpu_arch_name
242 .long cpu_elf_name
243 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
244 .long cpu_s3c44b0x_name
245 .long arm7tdmi_processor_functions
246 .long 0
247 .long 0
248 .long v4_cache_fns
249 .size __s3c44b0x_proc_info, . - __s3c44b0x_proc_info