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authorWolfram Sang <w.sang@pengutronix.de>2011-04-29 09:06:43 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-02 14:08:55 -0400
commit041f10d46f97c87f8ae1cdb4117682214732cc45 (patch)
tree93a7357301ab6c244b270bbdf531d436e356f867 /arch/arm/plat-stmp3xxx/include/mach/system.h
parentf295dc6874bf271253f70cb75a483d4a23911117 (diff)
ARM: plat-stmp: remove plat
Now that both users of plat-stmp have been deleted in previous patches, delete the platform, too. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/include/mach/system.h')
-rw-r--r--arch/arm/plat-stmp3xxx/include/mach/system.h49
1 files changed, 0 insertions, 49 deletions
diff --git a/arch/arm/plat-stmp3xxx/include/mach/system.h b/arch/arm/plat-stmp3xxx/include/mach/system.h
deleted file mode 100644
index 28a98888931..00000000000
--- a/arch/arm/plat-stmp3xxx/include/mach/system.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Copyright (C) 2005 Sigmatel Inc
3 *
4 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
6 */
7
8/*
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16#ifndef __ASM_ARCH_SYSTEM_H
17#define __ASM_ARCH_SYSTEM_H
18
19#include <asm/proc-fns.h>
20#include <mach/platform.h>
21#include <mach/regs-clkctrl.h>
22#include <mach/regs-power.h>
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30
31 cpu_do_idle();
32}
33
34static inline void arch_reset(char mode, const char *cmd)
35{
36 /* Set BATTCHRG to default value */
37 __raw_writel(0x00010000, REGS_POWER_BASE + HW_POWER_CHARGE);
38
39 /* Set MINPWR to default value */
40 __raw_writel(0, REGS_POWER_BASE + HW_POWER_MINPWR);
41
42 /* Reset digital side of chip (but not power or RTC) */
43 __raw_writel(BM_CLKCTRL_RESET_DIG,
44 REGS_CLKCTRL_BASE + HW_CLKCTRL_RESET);
45
46 /* Should not return */
47}
48
49#endif