diff options
author | Kyungmin Park <kyungmin.park@samsung.com> | 2009-11-17 02:41:16 -0500 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-11-30 20:33:14 -0500 |
commit | b0d5217cfb0a2357ac076977400c648cccff6154 (patch) | |
tree | 79795a07f16b3f3962836206651911a869bbca71 /arch/arm/plat-s5pc1xx/include/plat/irqs.h | |
parent | d7b9ace51d949e1bfec7f32d21d094cf2c683ca0 (diff) |
ARM: S5PC1xx: add gpiolib and external/gpio interrupt support
Add support for gpiolib calls. This is based on the gpiolib implementation
from plat-s3c64xx tree.
Add support for external interrupts for GPIO H banks.
Add support for GPIO interrupts for all banks.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s5pc1xx/include/plat/irqs.h')
-rw-r--r-- | arch/arm/plat-s5pc1xx/include/plat/irqs.h | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h index f07d8c3b25d..ef8736366f0 100644 --- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h +++ b/arch/arm/plat-s5pc1xx/include/plat/irqs.h | |||
@@ -171,12 +171,21 @@ | |||
171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) | 171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) |
172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) | 172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) |
173 | 173 | ||
174 | /* External interrupt */ | ||
174 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 1) | 175 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 1) |
175 | 176 | ||
176 | #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) | 177 | #define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16)) |
177 | #define IRQ_EINT(x) S3C_EINT(x) | 178 | #define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x)) |
179 | #define IRQ_EINT_BIT(x) (x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0)) | ||
178 | 180 | ||
179 | #define NR_IRQS (IRQ_EINT(31)+1) | 181 | /* GPIO interrupt */ |
182 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
183 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
184 | |||
185 | /* | ||
186 | * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs | ||
187 | */ | ||
188 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
180 | 189 | ||
181 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ | 190 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ |
182 | 191 | ||