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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-07 12:11:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-07 12:11:16 -0500
commite0d65113a70f1dc514e625cc4e7a7485a4bf72df (patch)
tree7320a130dc304623f5cf4b5dd8f67fb1776225ca /arch/arm/plat-pxa
parentcf5e15fbd72c13977720aa15b7b7e00e1d8fd8f2 (diff)
parent48e546b7f281f251893baa40769581fd15f085fb (diff)
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (226 commits) mtd: tests: annotate as DANGEROUS in Kconfig mtd: tests: don't use mtd0 as a default mtd: clean up usage of MTD_DOCPROBE_ADDRESS jffs2: add compr=lzo and compr=zlib options jffs2: implement mount option parsing and compression overriding mtd: nand: initialize ops.mode mtd: provide an alias for the redboot module name mtd: m25p80: don't probe device which has status of 'disabled' mtd: nand_h1900 never worked mtd: Add DiskOnChip G3 support mtd: m25p80: add EON flash EN25Q32B into spi flash id table mtd: mark block device queue as non-rotational mtd: r852: make r852_pm_ops static mtd: m25p80: add support for at25df321a spi data flash mtd: mxc_nand: preset_v1_v2: unlock all NAND flash blocks mtd: nand: switch `check_pattern()' to standard `memcmp()' mtd: nand: invalidate cache on unaligned reads mtd: nand: do not scan bad blocks with NAND_BBT_NO_OOB set mtd: nand: wait to set BBT version mtd: nand: scrub BBT on ECC errors ... Fix up trivial conflicts: - arch/arm/mach-at91/board-usb-a9260.c Merged into board-usb-a926x.c - drivers/mtd/maps/lantiq-flash.c add_mtd_partitions -> mtd_device_register vs changed to use mtd_device_parse_register.
Diffstat (limited to 'arch/arm/plat-pxa')
-rw-r--r--arch/arm/plat-pxa/include/plat/pxa3xx_nand.h20
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
index 442301fe48b..c42f39f2019 100644
--- a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
+++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
@@ -41,6 +41,19 @@ struct pxa3xx_nand_flash {
41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ 41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
42}; 42};
43 43
44/*
45 * Current pxa3xx_nand controller has two chip select which
46 * both be workable.
47 *
48 * Notice should be taken that:
49 * When you want to use this feature, you should not enable the
50 * keep configuration feature, for two chip select could be
51 * attached with different nand chip. The different page size
52 * and timing requirement make the keep configuration impossible.
53 */
54
55/* The max num of chip select current support */
56#define NUM_CHIP_SELECT (2)
44struct pxa3xx_nand_platform_data { 57struct pxa3xx_nand_platform_data {
45 58
46 /* the data flash bus is shared between the Static Memory 59 /* the data flash bus is shared between the Static Memory
@@ -52,8 +65,11 @@ struct pxa3xx_nand_platform_data {
52 /* allow platform code to keep OBM/bootloader defined NFC config */ 65 /* allow platform code to keep OBM/bootloader defined NFC config */
53 int keep_config; 66 int keep_config;
54 67
55 const struct mtd_partition *parts; 68 /* indicate how many chip selects will be used */
56 unsigned int nr_parts; 69 int num_cs;
70
71 const struct mtd_partition *parts[NUM_CHIP_SELECT];
72 unsigned int nr_parts[NUM_CHIP_SELECT];
57 73
58 const struct pxa3xx_nand_flash * flash; 74 const struct pxa3xx_nand_flash * flash;
59 size_t num_flash; 75 size_t num_flash;