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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 07:35:19 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:53 -0400
commite83bbb115e3afc87bdb1d375d33bcfe910920002 (patch)
treecf66c8b78441c89d121bb1e930fe9db5718ba10e /arch/arm/plat-orion
parentcf8d1581c46254d286c51d12154196f7b94c46d2 (diff)
arm: Cleanup irq_desc access
Use the proper wrappers and use the flow type in irq_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r--arch/arm/plat-orion/gpio.c25
-rw-r--r--arch/arm/plat-orion/irq.c2
2 files changed, 11 insertions, 16 deletions
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 078894bc3b9..222327b2c23 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -324,9 +324,8 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
324static void gpio_irq_ack(struct irq_data *d) 324static void gpio_irq_ack(struct irq_data *d)
325{ 325{
326 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 326 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
327 int type; 327 int type = irqd_get_trigger_type(d);
328 328
329 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
330 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 329 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
331 int pin = d->irq - ochip->secondary_irq_base; 330 int pin = d->irq - ochip->secondary_irq_base;
332 331
@@ -337,11 +336,10 @@ static void gpio_irq_ack(struct irq_data *d)
337static void gpio_irq_mask(struct irq_data *d) 336static void gpio_irq_mask(struct irq_data *d)
338{ 337{
339 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 338 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
340 int type; 339 int type = irqd_get_trigger_type(d);
341 void __iomem *reg; 340 void __iomem *reg;
342 int pin; 341 int pin;
343 342
344 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
345 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 343 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
346 reg = GPIO_EDGE_MASK(ochip); 344 reg = GPIO_EDGE_MASK(ochip);
347 else 345 else
@@ -355,11 +353,10 @@ static void gpio_irq_mask(struct irq_data *d)
355static void gpio_irq_unmask(struct irq_data *d) 353static void gpio_irq_unmask(struct irq_data *d)
356{ 354{
357 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); 355 struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
358 int type; 356 int type = irqd_get_trigger_type(d);
359 void __iomem *reg; 357 void __iomem *reg;
360 int pin; 358 int pin;
361 359
362 type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
363 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 360 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
364 reg = GPIO_EDGE_MASK(ochip); 361 reg = GPIO_EDGE_MASK(ochip);
365 else 362 else
@@ -389,9 +386,9 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
389 * Set edge/level type. 386 * Set edge/level type.
390 */ 387 */
391 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 388 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
392 set_irq_handler(d->irq, handle_edge_irq); 389 __irq_set_handler_locked(d->irq, handle_edge_irq);
393 } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 390 } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
394 set_irq_handler(d->irq, handle_level_irq); 391 __irq_set_handler_locked(d->irq, handle_level_irq);
395 } else { 392 } else {
396 printk(KERN_ERR "failed to set irq=%d (type=%d)\n", 393 printk(KERN_ERR "failed to set irq=%d (type=%d)\n",
397 d->irq, type); 394 d->irq, type);
@@ -480,7 +477,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
480 set_irq_chip(irq, &orion_gpio_irq_chip); 477 set_irq_chip(irq, &orion_gpio_irq_chip);
481 set_irq_handler(irq, handle_level_irq); 478 set_irq_handler(irq, handle_level_irq);
482 set_irq_chip_data(irq, ochip); 479 set_irq_chip_data(irq, ochip);
483 irq_desc[irq].status |= IRQ_LEVEL; 480 irq_set_status_flags(irq, IRQ_LEVEL);
484 set_irq_flags(irq, IRQF_VALID); 481 set_irq_flags(irq, IRQF_VALID);
485 } 482 }
486} 483}
@@ -488,7 +485,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
488void orion_gpio_irq_handler(int pinoff) 485void orion_gpio_irq_handler(int pinoff)
489{ 486{
490 struct orion_gpio_chip *ochip; 487 struct orion_gpio_chip *ochip;
491 u32 cause; 488 u32 cause, type;
492 int i; 489 int i;
493 490
494 ochip = orion_gpio_chip_find(pinoff); 491 ochip = orion_gpio_chip_find(pinoff);
@@ -500,15 +497,14 @@ void orion_gpio_irq_handler(int pinoff)
500 497
501 for (i = 0; i < ochip->chip.ngpio; i++) { 498 for (i = 0; i < ochip->chip.ngpio; i++) {
502 int irq; 499 int irq;
503 struct irq_desc *desc;
504 500
505 irq = ochip->secondary_irq_base + i; 501 irq = ochip->secondary_irq_base + i;
506 502
507 if (!(cause & (1 << i))) 503 if (!(cause & (1 << i)))
508 continue; 504 continue;
509 505
510 desc = irq_desc + irq; 506 type = irqd_get_trigger_type(irq_get_irq_data(irq));
511 if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { 507 if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
512 /* Swap polarity (race with GPIO line) */ 508 /* Swap polarity (race with GPIO line) */
513 u32 polarity; 509 u32 polarity;
514 510
@@ -516,7 +512,6 @@ void orion_gpio_irq_handler(int pinoff)
516 polarity ^= 1 << i; 512 polarity ^= 1 << i;
517 writel(polarity, GPIO_IN_POL(ochip)); 513 writel(polarity, GPIO_IN_POL(ochip));
518 } 514 }
519 515 generic_handle_irq(irq);
520 desc_handle_irq(irq, desc);
521 } 516 }
522} 517}
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 7d0c7eb59f0..c163f9079e4 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -59,7 +59,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
59 set_irq_chip(irq, &orion_irq_chip); 59 set_irq_chip(irq, &orion_irq_chip);
60 set_irq_chip_data(irq, maskaddr); 60 set_irq_chip_data(irq, maskaddr);
61 set_irq_handler(irq, handle_level_irq); 61 set_irq_handler(irq, handle_level_irq);
62 irq_desc[irq].status |= IRQ_LEVEL; 62 irq_set_status_flags(irq, IRQ_LEVEL);
63 set_irq_flags(irq, IRQF_VALID); 63 set_irq_flags(irq, IRQF_VALID);
64 } 64 }
65} 65}