diff options
author | Tony Lindgren <tony@atomide.com> | 2012-10-02 17:19:52 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-10-17 15:04:34 -0400 |
commit | 622297fdec22310d57cc3222a8fc337993c7cd23 (patch) | |
tree | c821d66d6e083f8f0c7eab2c54c89059585021ea /arch/arm/plat-omap | |
parent | a8f7445c7b0d2b7a523e521e2d14974804910ad0 (diff) |
ARM: OMAP: Make plat/sram.h local to plat-omap
We can move this from plat to be local to plat-omap
for common ARM zImage support.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/common.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/sram.h | 105 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.h | 109 |
4 files changed, 105 insertions, 112 deletions
diff --git a/arch/arm/plat-omap/common.h b/arch/arm/plat-omap/common.h index e196d130015..8ae0542a37d 100644 --- a/arch/arm/plat-omap/common.h +++ b/arch/arm/plat-omap/common.h | |||
@@ -33,6 +33,4 @@ extern void omap_reserve(void); | |||
33 | struct omap_hwmod; | 33 | struct omap_hwmod; |
34 | extern int omap_dss_reset(struct omap_hwmod *); | 34 | extern int omap_dss_reset(struct omap_hwmod *); |
35 | 35 | ||
36 | void omap_sram_init(void); | ||
37 | |||
38 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ | 36 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ |
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h deleted file mode 100644 index 227ae265755..00000000000 --- a/arch/arm/plat-omap/include/plat/sram.h +++ /dev/null | |||
@@ -1,105 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/sram.h | ||
3 | * | ||
4 | * Interface for functions that need to be run in internal SRAM | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ARCH_ARM_OMAP_SRAM_H | ||
12 | #define __ARCH_ARM_OMAP_SRAM_H | ||
13 | |||
14 | #ifndef __ASSEMBLY__ | ||
15 | #include <asm/fncpy.h> | ||
16 | |||
17 | extern void *omap_sram_push_address(unsigned long size); | ||
18 | |||
19 | /* Macro to push a function to the internal SRAM, using the fncpy API */ | ||
20 | #define omap_sram_push(funcp, size) ({ \ | ||
21 | typeof(&(funcp)) _res = NULL; \ | ||
22 | void *_sram_address = omap_sram_push_address(size); \ | ||
23 | if (_sram_address) \ | ||
24 | _res = fncpy(_sram_address, &(funcp), size); \ | ||
25 | _res; \ | ||
26 | }) | ||
27 | |||
28 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); | ||
29 | |||
30 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
31 | u32 base_cs, u32 force_unlock); | ||
32 | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
33 | u32 mem_type); | ||
34 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | ||
35 | |||
36 | extern u32 omap3_configure_core_dpll( | ||
37 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
38 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
39 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
40 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
41 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
42 | extern void omap3_sram_restore_context(void); | ||
43 | |||
44 | /* Do not use these */ | ||
45 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
46 | extern unsigned long omap1_sram_reprogram_clock_sz; | ||
47 | |||
48 | extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
49 | extern unsigned long omap24xx_sram_reprogram_clock_sz; | ||
50 | |||
51 | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
52 | u32 base_cs, u32 force_unlock); | ||
53 | extern unsigned long omap242x_sram_ddr_init_sz; | ||
54 | |||
55 | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
56 | int bypass); | ||
57 | extern unsigned long omap242x_sram_set_prcm_sz; | ||
58 | |||
59 | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
60 | u32 mem_type); | ||
61 | extern unsigned long omap242x_sram_reprogram_sdrc_sz; | ||
62 | |||
63 | |||
64 | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
65 | u32 base_cs, u32 force_unlock); | ||
66 | extern unsigned long omap243x_sram_ddr_init_sz; | ||
67 | |||
68 | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
69 | int bypass); | ||
70 | extern unsigned long omap243x_sram_set_prcm_sz; | ||
71 | |||
72 | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
73 | u32 mem_type); | ||
74 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; | ||
75 | |||
76 | extern u32 omap3_sram_configure_core_dpll( | ||
77 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
78 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
79 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
80 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
81 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
82 | extern unsigned long omap3_sram_configure_core_dpll_sz; | ||
83 | |||
84 | #ifdef CONFIG_PM | ||
85 | extern void omap_push_sram_idle(void); | ||
86 | #else | ||
87 | static inline void omap_push_sram_idle(void) {} | ||
88 | #endif /* CONFIG_PM */ | ||
89 | |||
90 | #endif /* __ASSEMBLY__ */ | ||
91 | |||
92 | /* | ||
93 | * OMAP2+: define the SRAM PA addresses. | ||
94 | * Used by the SRAM management code and the idle sleep code. | ||
95 | */ | ||
96 | #define OMAP2_SRAM_PA 0x40200000 | ||
97 | #define OMAP3_SRAM_PA 0x40200000 | ||
98 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
99 | #define OMAP4_SRAM_PA 0x40304000 | ||
100 | #define OMAP4_SRAM_VA 0xfe404000 | ||
101 | #else | ||
102 | #define OMAP4_SRAM_PA 0x40300000 | ||
103 | #endif | ||
104 | #define AM33XX_SRAM_PA 0x40300000 | ||
105 | #endif | ||
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 28acb383e7d..dc2d800d959 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -25,7 +25,6 @@ | |||
25 | 25 | ||
26 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
27 | 27 | ||
28 | #include <plat/sram.h> | ||
29 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
30 | 29 | ||
31 | #include "sram.h" | 30 | #include "sram.h" |
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/plat-omap/sram.h index 29b43ef97f2..cefda2e0986 100644 --- a/arch/arm/plat-omap/sram.h +++ b/arch/arm/plat-omap/sram.h | |||
@@ -1,6 +1,107 @@ | |||
1 | #ifndef __PLAT_OMAP_SRAM_H__ | 1 | /* |
2 | #define __PLAT_OMAP_SRAM_H__ | 2 | * arch/arm/plat-omap/include/mach/sram.h |
3 | * | ||
4 | * Interface for functions that need to be run in internal SRAM | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
3 | 10 | ||
4 | extern int __init omap_sram_init(void); | 11 | #ifndef __ARCH_ARM_OMAP_SRAM_H |
12 | #define __ARCH_ARM_OMAP_SRAM_H | ||
5 | 13 | ||
6 | #endif /* __PLAT_OMAP_SRAM_H__ */ | 14 | #ifndef __ASSEMBLY__ |
15 | #include <asm/fncpy.h> | ||
16 | |||
17 | int __init omap_sram_init(void); | ||
18 | |||
19 | extern void *omap_sram_push_address(unsigned long size); | ||
20 | |||
21 | /* Macro to push a function to the internal SRAM, using the fncpy API */ | ||
22 | #define omap_sram_push(funcp, size) ({ \ | ||
23 | typeof(&(funcp)) _res = NULL; \ | ||
24 | void *_sram_address = omap_sram_push_address(size); \ | ||
25 | if (_sram_address) \ | ||
26 | _res = fncpy(_sram_address, &(funcp), size); \ | ||
27 | _res; \ | ||
28 | }) | ||
29 | |||
30 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); | ||
31 | |||
32 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
33 | u32 base_cs, u32 force_unlock); | ||
34 | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
35 | u32 mem_type); | ||
36 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | ||
37 | |||
38 | extern u32 omap3_configure_core_dpll( | ||
39 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
40 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
41 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
42 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
43 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
44 | extern void omap3_sram_restore_context(void); | ||
45 | |||
46 | /* Do not use these */ | ||
47 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
48 | extern unsigned long omap1_sram_reprogram_clock_sz; | ||
49 | |||
50 | extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
51 | extern unsigned long omap24xx_sram_reprogram_clock_sz; | ||
52 | |||
53 | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
54 | u32 base_cs, u32 force_unlock); | ||
55 | extern unsigned long omap242x_sram_ddr_init_sz; | ||
56 | |||
57 | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
58 | int bypass); | ||
59 | extern unsigned long omap242x_sram_set_prcm_sz; | ||
60 | |||
61 | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
62 | u32 mem_type); | ||
63 | extern unsigned long omap242x_sram_reprogram_sdrc_sz; | ||
64 | |||
65 | |||
66 | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
67 | u32 base_cs, u32 force_unlock); | ||
68 | extern unsigned long omap243x_sram_ddr_init_sz; | ||
69 | |||
70 | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
71 | int bypass); | ||
72 | extern unsigned long omap243x_sram_set_prcm_sz; | ||
73 | |||
74 | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
75 | u32 mem_type); | ||
76 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; | ||
77 | |||
78 | extern u32 omap3_sram_configure_core_dpll( | ||
79 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
80 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
81 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
82 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
83 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
84 | extern unsigned long omap3_sram_configure_core_dpll_sz; | ||
85 | |||
86 | #ifdef CONFIG_PM | ||
87 | extern void omap_push_sram_idle(void); | ||
88 | #else | ||
89 | static inline void omap_push_sram_idle(void) {} | ||
90 | #endif /* CONFIG_PM */ | ||
91 | |||
92 | #endif /* __ASSEMBLY__ */ | ||
93 | |||
94 | /* | ||
95 | * OMAP2+: define the SRAM PA addresses. | ||
96 | * Used by the SRAM management code and the idle sleep code. | ||
97 | */ | ||
98 | #define OMAP2_SRAM_PA 0x40200000 | ||
99 | #define OMAP3_SRAM_PA 0x40200000 | ||
100 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
101 | #define OMAP4_SRAM_PA 0x40304000 | ||
102 | #define OMAP4_SRAM_VA 0xfe404000 | ||
103 | #else | ||
104 | #define OMAP4_SRAM_PA 0x40300000 | ||
105 | #endif | ||
106 | #define AM33XX_SRAM_PA 0x40300000 | ||
107 | #endif | ||