diff options
author | Ranjith Lohithakshan <ranjithl@ti.com> | 2010-01-26 22:12:56 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-01-26 22:12:56 -0500 |
commit | 05842a32c7df9ad016cb55c66c9edb46aee1240b (patch) | |
tree | decd902d2cb3b1829a39fee89b7af1e11ca9e4bc /arch/arm/plat-omap/include/plat/control.h | |
parent | 8a3ddc759b33d3b3b3953d001c8d3d9107becbb9 (diff) |
AM35xx: Add AM35xx specific control module registers
AM3517/05 has a few additional control module registers defined mainly
to control the new IP's. This patch adds support for those new registers.
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/control.h')
-rw-r--r-- | arch/arm/plat-omap/include/plat/control.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index a745d62fad0..61e7b8a8c99 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
@@ -160,6 +160,14 @@ | |||
160 | #define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) | 160 | #define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0) |
161 | #define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) | 161 | #define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4) |
162 | 162 | ||
163 | /* AM35XX only CONTROL_GENERAL register offsets */ | ||
164 | #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) | ||
165 | #define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310) | ||
166 | #define AM35XX_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314) | ||
167 | #define AM35XX_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320) | ||
168 | #define AM35XX_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324) | ||
169 | #define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328) | ||
170 | #define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C) | ||
163 | 171 | ||
164 | /* 34xx PADCONF register offsets */ | 172 | /* 34xx PADCONF register offsets */ |
165 | #define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ | 173 | #define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \ |
@@ -257,6 +265,15 @@ | |||
257 | #define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) | 265 | #define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) |
258 | #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C | 266 | #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C |
259 | 267 | ||
268 | /* AM35XX_CONTROL_IPSS_CLK_CTRL bits */ | ||
269 | #define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0 | ||
270 | #define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1 | ||
271 | #define AM35XX_VPFE_VBUSP_CLK_SHIFT 2 | ||
272 | #define AM35XX_HECC_VBUSP_CLK_SHIFT 3 | ||
273 | #define AM35XX_USBOTG_FCLK_SHIFT 8 | ||
274 | #define AM35XX_CPGMAC_FCLK_SHIFT 9 | ||
275 | #define AM35XX_VPFE_FCLK_SHIFT 10 | ||
276 | |||
260 | /* | 277 | /* |
261 | * CONTROL OMAP STATUS register to identify OMAP3 features | 278 | * CONTROL OMAP STATUS register to identify OMAP3 features |
262 | */ | 279 | */ |