diff options
author | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 04:24:31 -0500 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 04:24:31 -0500 |
commit | 0a9d59a2461477bd9ed143c01af9df3f8f00fa81 (patch) | |
tree | df997d1cfb0786427a0df1fbd6f0640fa4248cf4 /arch/arm/plat-omap/gpio.c | |
parent | a23ce6da9677d245aa0aadc99f4197030350ab54 (diff) | |
parent | 795abaf1e4e188c4171e3cd3dbb11a9fcacaf505 (diff) |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 101 |
1 files changed, 52 insertions, 49 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 1f98e0b9484..971d1863694 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -718,7 +718,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
718 | case METHOD_GPIO_24XX: | 718 | case METHOD_GPIO_24XX: |
719 | case METHOD_GPIO_44XX: | 719 | case METHOD_GPIO_44XX: |
720 | set_24xx_gpio_triggering(bank, gpio, trigger); | 720 | set_24xx_gpio_triggering(bank, gpio, trigger); |
721 | break; | 721 | return 0; |
722 | #endif | 722 | #endif |
723 | default: | 723 | default: |
724 | goto bad; | 724 | goto bad; |
@@ -729,17 +729,17 @@ bad: | |||
729 | return -EINVAL; | 729 | return -EINVAL; |
730 | } | 730 | } |
731 | 731 | ||
732 | static int gpio_irq_type(unsigned irq, unsigned type) | 732 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
733 | { | 733 | { |
734 | struct gpio_bank *bank; | 734 | struct gpio_bank *bank; |
735 | unsigned gpio; | 735 | unsigned gpio; |
736 | int retval; | 736 | int retval; |
737 | unsigned long flags; | 737 | unsigned long flags; |
738 | 738 | ||
739 | if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE) | 739 | if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE) |
740 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 740 | gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
741 | else | 741 | else |
742 | gpio = irq - IH_GPIO_BASE; | 742 | gpio = d->irq - IH_GPIO_BASE; |
743 | 743 | ||
744 | if (check_gpio(gpio) < 0) | 744 | if (check_gpio(gpio) < 0) |
745 | return -EINVAL; | 745 | return -EINVAL; |
@@ -752,19 +752,21 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
752 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) | 752 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
753 | return -EINVAL; | 753 | return -EINVAL; |
754 | 754 | ||
755 | bank = get_irq_chip_data(irq); | 755 | bank = irq_data_get_irq_chip_data(d); |
756 | spin_lock_irqsave(&bank->lock, flags); | 756 | spin_lock_irqsave(&bank->lock, flags); |
757 | retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); | 757 | retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); |
758 | if (retval == 0) { | 758 | if (retval == 0) { |
759 | irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; | 759 | struct irq_desc *desc = irq_to_desc(d->irq); |
760 | irq_desc[irq].status |= type; | 760 | |
761 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | ||
762 | desc->status |= type; | ||
761 | } | 763 | } |
762 | spin_unlock_irqrestore(&bank->lock, flags); | 764 | spin_unlock_irqrestore(&bank->lock, flags); |
763 | 765 | ||
764 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) | 766 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
765 | __set_irq_handler_unlocked(irq, handle_level_irq); | 767 | __set_irq_handler_unlocked(d->irq, handle_level_irq); |
766 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 768 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
767 | __set_irq_handler_unlocked(irq, handle_edge_irq); | 769 | __set_irq_handler_unlocked(d->irq, handle_edge_irq); |
768 | 770 | ||
769 | return retval; | 771 | return retval; |
770 | } | 772 | } |
@@ -1021,15 +1023,15 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio) | |||
1021 | } | 1023 | } |
1022 | 1024 | ||
1023 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ | 1025 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
1024 | static int gpio_wake_enable(unsigned int irq, unsigned int enable) | 1026 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) |
1025 | { | 1027 | { |
1026 | unsigned int gpio = irq - IH_GPIO_BASE; | 1028 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1027 | struct gpio_bank *bank; | 1029 | struct gpio_bank *bank; |
1028 | int retval; | 1030 | int retval; |
1029 | 1031 | ||
1030 | if (check_gpio(gpio) < 0) | 1032 | if (check_gpio(gpio) < 0) |
1031 | return -ENODEV; | 1033 | return -ENODEV; |
1032 | bank = get_irq_chip_data(irq); | 1034 | bank = irq_data_get_irq_chip_data(d); |
1033 | retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); | 1035 | retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); |
1034 | 1036 | ||
1035 | return retval; | 1037 | return retval; |
@@ -1142,7 +1144,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1142 | u32 retrigger = 0; | 1144 | u32 retrigger = 0; |
1143 | int unmasked = 0; | 1145 | int unmasked = 0; |
1144 | 1146 | ||
1145 | desc->chip->ack(irq); | 1147 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
1146 | 1148 | ||
1147 | bank = get_irq_data(irq); | 1149 | bank = get_irq_data(irq); |
1148 | #ifdef CONFIG_ARCH_OMAP1 | 1150 | #ifdef CONFIG_ARCH_OMAP1 |
@@ -1199,7 +1201,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1199 | configured, we could unmask GPIO bank interrupt immediately */ | 1201 | configured, we could unmask GPIO bank interrupt immediately */ |
1200 | if (!level_mask && !unmasked) { | 1202 | if (!level_mask && !unmasked) { |
1201 | unmasked = 1; | 1203 | unmasked = 1; |
1202 | desc->chip->unmask(irq); | 1204 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
1203 | } | 1205 | } |
1204 | 1206 | ||
1205 | isr |= retrigger; | 1207 | isr |= retrigger; |
@@ -1235,41 +1237,40 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1235 | interrupt */ | 1237 | interrupt */ |
1236 | exit: | 1238 | exit: |
1237 | if (!unmasked) | 1239 | if (!unmasked) |
1238 | desc->chip->unmask(irq); | 1240 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
1239 | |||
1240 | } | 1241 | } |
1241 | 1242 | ||
1242 | static void gpio_irq_shutdown(unsigned int irq) | 1243 | static void gpio_irq_shutdown(struct irq_data *d) |
1243 | { | 1244 | { |
1244 | unsigned int gpio = irq - IH_GPIO_BASE; | 1245 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1245 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1246 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1246 | 1247 | ||
1247 | _reset_gpio(bank, gpio); | 1248 | _reset_gpio(bank, gpio); |
1248 | } | 1249 | } |
1249 | 1250 | ||
1250 | static void gpio_ack_irq(unsigned int irq) | 1251 | static void gpio_ack_irq(struct irq_data *d) |
1251 | { | 1252 | { |
1252 | unsigned int gpio = irq - IH_GPIO_BASE; | 1253 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1253 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1254 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1254 | 1255 | ||
1255 | _clear_gpio_irqstatus(bank, gpio); | 1256 | _clear_gpio_irqstatus(bank, gpio); |
1256 | } | 1257 | } |
1257 | 1258 | ||
1258 | static void gpio_mask_irq(unsigned int irq) | 1259 | static void gpio_mask_irq(struct irq_data *d) |
1259 | { | 1260 | { |
1260 | unsigned int gpio = irq - IH_GPIO_BASE; | 1261 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1261 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1262 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1262 | 1263 | ||
1263 | _set_gpio_irqenable(bank, gpio, 0); | 1264 | _set_gpio_irqenable(bank, gpio, 0); |
1264 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); | 1265 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); |
1265 | } | 1266 | } |
1266 | 1267 | ||
1267 | static void gpio_unmask_irq(unsigned int irq) | 1268 | static void gpio_unmask_irq(struct irq_data *d) |
1268 | { | 1269 | { |
1269 | unsigned int gpio = irq - IH_GPIO_BASE; | 1270 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1270 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1271 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1271 | unsigned int irq_mask = 1 << get_gpio_index(gpio); | 1272 | unsigned int irq_mask = 1 << get_gpio_index(gpio); |
1272 | struct irq_desc *desc = irq_to_desc(irq); | 1273 | struct irq_desc *desc = irq_to_desc(d->irq); |
1273 | u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK; | 1274 | u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK; |
1274 | 1275 | ||
1275 | if (trigger) | 1276 | if (trigger) |
@@ -1287,12 +1288,12 @@ static void gpio_unmask_irq(unsigned int irq) | |||
1287 | 1288 | ||
1288 | static struct irq_chip gpio_irq_chip = { | 1289 | static struct irq_chip gpio_irq_chip = { |
1289 | .name = "GPIO", | 1290 | .name = "GPIO", |
1290 | .shutdown = gpio_irq_shutdown, | 1291 | .irq_shutdown = gpio_irq_shutdown, |
1291 | .ack = gpio_ack_irq, | 1292 | .irq_ack = gpio_ack_irq, |
1292 | .mask = gpio_mask_irq, | 1293 | .irq_mask = gpio_mask_irq, |
1293 | .unmask = gpio_unmask_irq, | 1294 | .irq_unmask = gpio_unmask_irq, |
1294 | .set_type = gpio_irq_type, | 1295 | .irq_set_type = gpio_irq_type, |
1295 | .set_wake = gpio_wake_enable, | 1296 | .irq_set_wake = gpio_wake_enable, |
1296 | }; | 1297 | }; |
1297 | 1298 | ||
1298 | /*---------------------------------------------------------------------*/ | 1299 | /*---------------------------------------------------------------------*/ |
@@ -1301,36 +1302,36 @@ static struct irq_chip gpio_irq_chip = { | |||
1301 | 1302 | ||
1302 | /* MPUIO uses the always-on 32k clock */ | 1303 | /* MPUIO uses the always-on 32k clock */ |
1303 | 1304 | ||
1304 | static void mpuio_ack_irq(unsigned int irq) | 1305 | static void mpuio_ack_irq(struct irq_data *d) |
1305 | { | 1306 | { |
1306 | /* The ISR is reset automatically, so do nothing here. */ | 1307 | /* The ISR is reset automatically, so do nothing here. */ |
1307 | } | 1308 | } |
1308 | 1309 | ||
1309 | static void mpuio_mask_irq(unsigned int irq) | 1310 | static void mpuio_mask_irq(struct irq_data *d) |
1310 | { | 1311 | { |
1311 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 1312 | unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
1312 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1313 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1313 | 1314 | ||
1314 | _set_gpio_irqenable(bank, gpio, 0); | 1315 | _set_gpio_irqenable(bank, gpio, 0); |
1315 | } | 1316 | } |
1316 | 1317 | ||
1317 | static void mpuio_unmask_irq(unsigned int irq) | 1318 | static void mpuio_unmask_irq(struct irq_data *d) |
1318 | { | 1319 | { |
1319 | unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 1320 | unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
1320 | struct gpio_bank *bank = get_irq_chip_data(irq); | 1321 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1321 | 1322 | ||
1322 | _set_gpio_irqenable(bank, gpio, 1); | 1323 | _set_gpio_irqenable(bank, gpio, 1); |
1323 | } | 1324 | } |
1324 | 1325 | ||
1325 | static struct irq_chip mpuio_irq_chip = { | 1326 | static struct irq_chip mpuio_irq_chip = { |
1326 | .name = "MPUIO", | 1327 | .name = "MPUIO", |
1327 | .ack = mpuio_ack_irq, | 1328 | .irq_ack = mpuio_ack_irq, |
1328 | .mask = mpuio_mask_irq, | 1329 | .irq_mask = mpuio_mask_irq, |
1329 | .unmask = mpuio_unmask_irq, | 1330 | .irq_unmask = mpuio_unmask_irq, |
1330 | .set_type = gpio_irq_type, | 1331 | .irq_set_type = gpio_irq_type, |
1331 | #ifdef CONFIG_ARCH_OMAP16XX | 1332 | #ifdef CONFIG_ARCH_OMAP16XX |
1332 | /* REVISIT: assuming only 16xx supports MPUIO wake events */ | 1333 | /* REVISIT: assuming only 16xx supports MPUIO wake events */ |
1333 | .set_wake = gpio_wake_enable, | 1334 | .irq_set_wake = gpio_wake_enable, |
1334 | #endif | 1335 | #endif |
1335 | }; | 1336 | }; |
1336 | 1337 | ||
@@ -1671,7 +1672,9 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank) | |||
1671 | 1672 | ||
1672 | for (j = bank->virtual_irq_start; | 1673 | for (j = bank->virtual_irq_start; |
1673 | j < bank->virtual_irq_start + bank_width; j++) { | 1674 | j < bank->virtual_irq_start + bank_width; j++) { |
1674 | lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class); | 1675 | struct irq_desc *d = irq_to_desc(j); |
1676 | |||
1677 | lockdep_set_class(&d->lock, &gpio_lock_class); | ||
1675 | set_irq_chip_data(j, bank); | 1678 | set_irq_chip_data(j, bank); |
1676 | if (bank_is_mpuio(bank)) | 1679 | if (bank_is_mpuio(bank)) |
1677 | set_irq_chip(j, &mpuio_irq_chip); | 1680 | set_irq_chip(j, &mpuio_irq_chip); |