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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-26 15:42:29 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-26 15:42:29 -0400
commit27953437059c64d14086196eb96f43c78caa9db3 (patch)
tree0cfd5fb21262a6db3de0c64462847b4c0c43e9df /arch/arm/plat-mxc
parent2c757fd5d1a92086f225a75a8fac7cab242d11b0 (diff)
parent3c0dec5f58b3c7b3627715126d1bf9b030a076f0 (diff)
Merge tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc clock driver changes from Olof Johansson: "The new clock subsystem was merged in linux-3.4 without any users, this now moves the first three platforms over to it: imx, mxs and spear. The series also contains the changes for the clock subsystem itself, since Mike preferred to have it together with the platforms that require these changes, in order to avoid interdependencies and conflicts." Fix up trivial conflicts in arch/arm/mach-kirkwood/common.c (code removed in one branch, added OF support in another) and drivers/dma/imx-sdma.c (independent changes next to each other). * tag 'clock' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits) clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate(). clk: Provide dummy clk_unregister() SPEAr: Update defconfigs SPEAr: Add SMI NOR partition info in dts files SPEAr: Switch to common clock framework SPEAr: Call clk_prepare() before calling clk_enable SPEAr: clk: Add General Purpose Timer Synthesizer clock SPEAr: clk: Add Fractional Synthesizer clock SPEAr: clk: Add Auxiliary Synthesizer clock SPEAr: clk: Add VCO-PLL Synthesizer clock SPEAr: Add DT bindings for SPEAr's timer ARM i.MX: remove now unused clock files ARM: i.MX6: implement clocks using common clock framework ARM i.MX35: implement clocks using common clock framework ARM i.MX5: implement clocks using common clock framework ARM: Kirkwood: Replace clock gating ARM: Orion: Audio: Add clk/clkdev support ARM: Orion: PCIE: Add support for clk ARM: Orion: XOR: Add support for clk ARM: Orion: CESA: Add support for clk ...
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/clock.c11
-rw-r--r--arch/arm/plat-mxc/include/mach/clock.h4
-rw-r--r--arch/arm/plat-mxc/time.c14
3 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 2ed3ab173ad..5079787273d 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -41,6 +41,7 @@
41#include <mach/clock.h> 41#include <mach/clock.h>
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43 43
44#ifndef CONFIG_COMMON_CLK
44static LIST_HEAD(clocks); 45static LIST_HEAD(clocks);
45static DEFINE_MUTEX(clocks_mutex); 46static DEFINE_MUTEX(clocks_mutex);
46 47
@@ -200,6 +201,16 @@ struct clk *clk_get_parent(struct clk *clk)
200} 201}
201EXPORT_SYMBOL(clk_get_parent); 202EXPORT_SYMBOL(clk_get_parent);
202 203
204#else
205
206/*
207 * Lock to protect the clock module (ccm) registers. Used
208 * on all i.MXs
209 */
210DEFINE_SPINLOCK(imx_ccm_lock);
211
212#endif /* CONFIG_COMMON_CLK */
213
203/* 214/*
204 * Get the resulting clock rate from a PLL register value and the input 215 * Get the resulting clock rate from a PLL register value and the input
205 * frequency. PLLs with this register layout can at least be found on 216 * frequency. PLLs with this register layout can at least be found on
diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
index 753a5988d85..bd940c795cb 100644
--- a/arch/arm/plat-mxc/include/mach/clock.h
+++ b/arch/arm/plat-mxc/include/mach/clock.h
@@ -23,6 +23,7 @@
23#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
24#include <linux/list.h> 24#include <linux/list.h>
25 25
26#ifndef CONFIG_COMMON_CLK
26struct module; 27struct module;
27 28
28struct clk { 29struct clk {
@@ -59,6 +60,9 @@ struct clk {
59 60
60int clk_register(struct clk *clk); 61int clk_register(struct clk *clk);
61void clk_unregister(struct clk *clk); 62void clk_unregister(struct clk *clk);
63#endif /* CONFIG_COMMON_CLK */
64
65extern spinlock_t imx_ccm_lock;
62 66
63unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref); 67unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref);
64 68
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 7daf7c9a413..99f958ca6cb 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -25,6 +25,7 @@
25#include <linux/irq.h> 25#include <linux/irq.h>
26#include <linux/clockchips.h> 26#include <linux/clockchips.h>
27#include <linux/clk.h> 27#include <linux/clk.h>
28#include <linux/err.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/sched_clock.h> 31#include <asm/sched_clock.h>
@@ -282,6 +283,19 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
282void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) 283void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
283{ 284{
284 uint32_t tctl_val; 285 uint32_t tctl_val;
286 struct clk *timer_ipg_clk;
287
288 if (!timer_clk) {
289 timer_clk = clk_get_sys("imx-gpt.0", "per");
290 if (IS_ERR(timer_clk)) {
291 pr_err("i.MX timer: unable to get clk\n");
292 return;
293 }
294
295 timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");
296 if (!IS_ERR(timer_ipg_clk))
297 clk_prepare_enable(timer_ipg_clk);
298 }
285 299
286 clk_prepare_enable(timer_clk); 300 clk_prepare_enable(timer_clk);
287 301