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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-02-06 10:48:39 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-02-22 12:11:23 -0500
commitf6b0fa02e8b0708d17d631afce456524eadf87ff (patch)
tree900fcd2149a03ba229bb29e982d3d6a5f3d3fcfc /arch/arm/mm/proc-arm920.S
parent753790e713d80b50b867fa1ed32ec0eb5e82ae8e (diff)
ARM: pm: add generic CPU suspend/resume support
This adds core support for saving and restoring CPU coprocessor registers for suspend/resume support. This contains support for suspend with ARM920, ARM926, SA11x0, PXA25x, PXA27x, PXA3xx, V6 and V7 CPUs. Tested on Assabet and Tegra 2. Tested-by: Colin Cross <ccross@android.com> Tested-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm920.S')
-rw-r--r--arch/arm/mm/proc-arm920.S37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 6109f278a90..219980ec8b6 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -387,6 +387,40 @@ ENTRY(cpu_arm920_set_pte_ext)
387#endif 387#endif
388 mov pc, lr 388 mov pc, lr
389 389
390/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
391.globl cpu_arm920_suspend_size
392.equ cpu_arm920_suspend_size, 4 * 3
393#ifdef CONFIG_PM
394ENTRY(cpu_arm920_do_suspend)
395 stmfd sp!, {r4 - r7, lr}
396 mrc p15, 0, r4, c13, c0, 0 @ PID
397 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
398 mrc p15, 0, r6, c2, c0, 0 @ TTB address
399 mrc p15, 0, r7, c1, c0, 0 @ Control register
400 stmia r0, {r4 - r7}
401 ldmfd sp!, {r4 - r7, pc}
402ENDPROC(cpu_arm920_do_suspend)
403
404ENTRY(cpu_arm920_do_resume)
405 mov ip, #0
406 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
407 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
408 ldmia r0, {r4 - r7}
409 mcr p15, 0, r4, c13, c0, 0 @ PID
410 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
411 mcr p15, 0, r6, c2, c0, 0 @ TTB address
412 mov r0, r7 @ control register
413 mov r2, r6, lsr #14 @ get TTB0 base
414 mov r2, r2, lsl #14
415 ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \
416 PMD_SECT_CACHEABLE | PMD_BIT4 | PMD_SECT_AP_WRITE
417 b cpu_resume_mmu
418ENDPROC(cpu_arm920_do_resume)
419#else
420#define cpu_arm920_do_suspend 0
421#define cpu_arm920_do_resume 0
422#endif
423
390 __CPUINIT 424 __CPUINIT
391 425
392 .type __arm920_setup, #function 426 .type __arm920_setup, #function
@@ -432,6 +466,9 @@ arm920_processor_functions:
432 .word cpu_arm920_dcache_clean_area 466 .word cpu_arm920_dcache_clean_area
433 .word cpu_arm920_switch_mm 467 .word cpu_arm920_switch_mm
434 .word cpu_arm920_set_pte_ext 468 .word cpu_arm920_set_pte_ext
469 .word cpu_arm920_suspend_size
470 .word cpu_arm920_do_suspend
471 .word cpu_arm920_do_resume
435 .size arm920_processor_functions, . - arm920_processor_functions 472 .size arm920_processor_functions, . - arm920_processor_functions
436 473
437 .section ".rodata" 474 .section ".rodata"