diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2007-07-20 06:42:24 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-07-20 16:42:35 -0400 |
| commit | 11179d8ca28d669e3d4cc7573a5f5fdda3e6f02d (patch) | |
| tree | 48ebac19f2ca133a5108d4fc779332b9e696d59a /arch/arm/mm/Kconfig | |
| parent | 2eb8c82bc492d5f185150e63eba5eac4dff24178 (diff) | |
[ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later
Currently, Linux doesn't generate correct page tables for ARMv6 and
later cores if the cache policy is different from the default one (it
may lead to strongly ordered or shared device mappings). This patch
disallows cache policies other than writeback and the
CPU_[ID]CACHE_DISABLE options only affect the CP15 system control
register rather than the page tables.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 58109ae3470..76a3ba668e2 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
| @@ -599,7 +599,7 @@ config CPU_DCACHE_SIZE | |||
| 599 | 599 | ||
| 600 | config CPU_DCACHE_WRITETHROUGH | 600 | config CPU_DCACHE_WRITETHROUGH |
| 601 | bool "Force write through D-cache" | 601 | bool "Force write through D-cache" |
| 602 | depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE | 602 | depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020) && !CPU_DCACHE_DISABLE |
| 603 | default y if CPU_ARM925T | 603 | default y if CPU_ARM925T |
| 604 | help | 604 | help |
| 605 | Say Y here to use the data cache in writethrough mode. Unless you | 605 | Say Y here to use the data cache in writethrough mode. Unless you |