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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-02 19:20:20 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-02 19:20:20 -0400
commit06fe918e9f177dc2a0592b0ad40a6ce4920b2033 (patch)
treeea58ad79ba9688e8033d8ea762682fc664031b8c /arch/arm/mach-ux500
parentdff8360a4a079692e65e55fbaa6c5dc605528403 (diff)
parente1b2dc70cd5b00e17c703163a463d82354b1cc76 (diff)
Merge tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij: "Some of this stuff is hitting arch/arm/* and have been ACKed by the ARM SoC folks, or it's device tree bindings pertaining to the specific driver. These are the bulk pinctrl changes for kernel v3.7: - Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs, provide platform config for the Nomadik. - Add a driver for the i.MX35. - Add a driver for the BCM2835, an advanced GPIO expander. - Various fixes and clean-ups and minor improvements for the core, Nomadik, pinctr-single, sirf drivers. - Some platform config for the ux500." * tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits) pinctrl: add bcm2835 driver pinctrl: clarify idle vs sleep states pinctrl/nomadik: use irq_find_mapping() pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input pinctrl: sirf: add missing pins to pinctrl list pinctrl: sirf: fix a typo in sirfsoc_gpio_probe pinctrl: pinctrl-single: add debugfs pin h/w state info ARM: ux500: 8500: update I2C sleep states pinctrl pinctrl: Fix potential memory leak in pinctrl_register_one_pin() ARM: ux500: tidy up pin sleep modes ARM: ux500: fix spi2 pin group pinctrl: imx: remove duplicated const pinctrl: document semantics vs GPIO ARM: ux500: 8500: use hsit_a_2 group for HSI pinctrl: use kasprintf() in pinmux_request_gpio() pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux pinctrl/nomadik : add MC1_a_2 pin MC1 function group list pinctrl: pinctrl-single: Make sure we do not change bits outside of mask ...
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c83
1 files changed, 51 insertions, 32 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 32fd9920446..a267c6d30e3 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -30,16 +30,15 @@ static enum custom_pin_cfg_t pinsfor;
30#define BIAS(a,b) static unsigned long a[] = { b } 30#define BIAS(a,b) static unsigned long a[] = { b }
31 31
32BIAS(pd, PIN_PULL_DOWN); 32BIAS(pd, PIN_PULL_DOWN);
33BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
34BIAS(in_nopull, PIN_INPUT_NOPULL); 33BIAS(in_nopull, PIN_INPUT_NOPULL);
35BIAS(in_nopull_sleep_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE); 34BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
36BIAS(in_pu, PIN_INPUT_PULLUP); 35BIAS(in_pu, PIN_INPUT_PULLUP);
37BIAS(in_pd, PIN_INPUT_PULLDOWN); 36BIAS(in_pd, PIN_INPUT_PULLDOWN);
38BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP); 37BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
39BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW); 38BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
40BIAS(out_hi, PIN_OUTPUT_HIGH); 39BIAS(out_hi, PIN_OUTPUT_HIGH);
41BIAS(out_lo, PIN_OUTPUT_LOW); 40BIAS(out_lo, PIN_OUTPUT_LOW);
42BIAS(out_lo_sleep_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE); 41BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
43/* These also force them into GPIO mode */ 42/* These also force them into GPIO mode */
44BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED); 43BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
45BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED); 44BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
@@ -48,23 +47,32 @@ BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SL
48BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED); 47BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
49BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED); 48BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
50/* Sleep modes */ 49/* Sleep modes */
51BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 50BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
52BIAS(sleep_in_nopull_wkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE); 51BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
53BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 52BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
54BIAS(sleep_out_lo_wkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); 53BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
55BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 54BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
55BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
56BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
57BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
56 58
57/* We use these to define hog settings that are always done on boot */ 59/* We use these to define hog settings that are always done on boot */
58#define DB8500_MUX_HOG(group,func) \ 60#define DB8500_MUX_HOG(group,func) \
59 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func) 61 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
60#define DB8500_PIN_HOG(pin,conf) \ 62#define DB8500_PIN_HOG(pin,conf) \
61 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf) 63 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
64#define DB8500_PIN_SLEEP(pin, conf, dev) \
65 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
66 pin, conf)
62 67
63/* These are default states associated with device and changed runtime */ 68/* These are default states associated with device and changed runtime */
64#define DB8500_MUX(group,func,dev) \ 69#define DB8500_MUX(group,func,dev) \
65 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func) 70 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
66#define DB8500_PIN(pin,conf,dev) \ 71#define DB8500_PIN(pin,conf,dev) \
67 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) 72 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
73#define DB8500_PIN_SLEEP(pin, conf, dev) \
74 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
75 pin, conf)
68 76
69#define DB8500_PIN_SLEEP(pin,conf,dev) \ 77#define DB8500_PIN_SLEEP(pin,conf,dev) \
70 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ 78 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
@@ -134,40 +142,47 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
134 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */ 142 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
135 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */ 143 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
136 /* UART0 sleep state */ 144 /* UART0 sleep state */
137 DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"), 145 DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
138 DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"), 146 DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
139 DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"), 147 DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
140 DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"), 148 DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
141 /* MSP1 for ALSA codec */ 149 /* MSP1 for ALSA codec */
142 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"), 150 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
143 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"), 151 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
144 DB8500_PIN("GPIO33_AF2", out_lo_sleep_nowkup, "ux500-msp-i2s.1"), 152 DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"),
145 DB8500_PIN("GPIO34_AE1", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), 153 DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
146 DB8500_PIN("GPIO35_AE2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), 154 DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
147 DB8500_PIN("GPIO36_AG2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"), 155 DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
148 /* MSP1 sleep state */ 156 /* MSP1 sleep state */
149 DB8500_PIN_SLEEP("GPIO33_AF2", sleep_out_lo_wkup, "ux500-msp-i2s.1"), 157 DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"),
150 DB8500_PIN_SLEEP("GPIO34_AE1", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), 158 DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
151 DB8500_PIN_SLEEP("GPIO35_AE2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), 159 DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
152 DB8500_PIN_SLEEP("GPIO36_AG2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"), 160 DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
153 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */ 161 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
154 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"), 162 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
155 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"), 163 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
156 /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */ 164 /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
157 DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"), 165 DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
158 /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */ 166 /* Mux in i2c0 block, default state */
159 DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"), 167 DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
160 DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"), 168 /* i2c0 sleep state */
161 DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"), 169 DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */
170 DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */
171 /* Mux in i2c1 block, default state */
162 DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"), 172 DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
163 DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"), 173 /* i2c1 sleep state */
164 DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"), 174 DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */
175 DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */
176 /* Mux in i2c2 block, default state */
165 DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"), 177 DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
166 DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"), 178 /* i2c2 sleep state */
167 DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"), 179 DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */
180 DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */
181 /* Mux in i2c3 block, default state */
168 DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"), 182 DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
169 DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"), 183 /* i2c3 sleep state */
170 DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"), 184 DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */
185 DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */
171 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */ 186 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
172 DB8500_MUX("mc0_a_1", "mc0", "sdi0"), 187 DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
173 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */ 188 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
@@ -219,11 +234,15 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
219 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"), 234 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
220 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */ 235 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
221 /* Mux in SPI2 pins on the "other C1" altfunction */ 236 /* Mux in SPI2 pins on the "other C1" altfunction */
222 DB8500_MUX("spi2_oc1_1", "spi2", "spi2"), 237 DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
223 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */ 238 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
224 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */ 239 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
225 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */ 240 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
226 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */ 241 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
242 /* SPI2 sleep state */
243 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
244 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
245 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
227}; 246};
228 247
229/* 248/*
@@ -410,7 +429,7 @@ static struct pinctrl_map __initdata u9500_pinmap[] = {
410 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu), 429 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
411 /* HSI */ 430 /* HSI */
412 DB8500_MUX_HOG("hsir_a_1", "hsi"), 431 DB8500_MUX_HOG("hsir_a_1", "hsi"),
413 DB8500_MUX_HOG("hsit_a_1", "hsi"), 432 DB8500_MUX_HOG("hsit_a_2", "hsi"),
414 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */ 433 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
415 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */ 434 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
416 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */ 435 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
@@ -418,7 +437,7 @@ static struct pinctrl_map __initdata u9500_pinmap[] = {
418 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */ 437 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
419 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */ 438 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
420 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */ 439 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
421 DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */ 440 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
422}; 441};
423 442
424static struct pinctrl_map __initdata u8500_pinmap[] = { 443static struct pinctrl_map __initdata u8500_pinmap[] = {