aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/board-ventana.c
diff options
context:
space:
mode:
authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
commitfcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch)
treea57612d1888735a2ec7972891b68c1ac5ec8faea /arch/arm/mach-tegra/board-ventana.c
parent8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff)
Added missing tegra files.HEADmaster
Diffstat (limited to 'arch/arm/mach-tegra/board-ventana.c')
-rw-r--r--arch/arm/mach-tegra/board-ventana.c641
1 files changed, 641 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c
new file mode 100644
index 00000000000..a7f051a6c72
--- /dev/null
+++ b/arch/arm/mach-tegra/board-ventana.c
@@ -0,0 +1,641 @@
1/*
2 * arch/arm/mach-tegra/board-ventana.c
3 *
4 * Copyright (c) 2010-2011, NVIDIA Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/ctype.h>
25#include <linux/platform_device.h>
26#include <linux/clk.h>
27#include <linux/serial_8250.h>
28#include <linux/i2c.h>
29#include <linux/i2c/panjit_ts.h>
30#include <linux/dma-mapping.h>
31#include <linux/delay.h>
32#include <linux/i2c-tegra.h>
33#include <linux/gpio.h>
34#include <linux/gpio_keys.h>
35#include <linux/input.h>
36#include <linux/platform_data/tegra_usb.h>
37#include <linux/mfd/tps6586x.h>
38#include <linux/memblock.h>
39#include <linux/i2c/atmel_mxt_ts.h>
40#include <linux/tegra_uart.h>
41
42#include <sound/wm8903.h>
43
44#include <mach/clk.h>
45#include <mach/iomap.h>
46#include <mach/irqs.h>
47#include <mach/pinmux.h>
48#include <mach/iomap.h>
49#include <mach/io.h>
50#include <mach/i2s.h>
51#include <mach/tegra_wm8903_pdata.h>
52
53#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
55#include <mach/usb_phy.h>
56
57#include "board.h"
58#include "clock.h"
59#include "board-ventana.h"
60#include "devices.h"
61#include "gpio-names.h"
62#include "fuse.h"
63#include "wakeups-t2.h"
64#include "pm.h"
65
66static struct tegra_utmip_config utmi_phy_config[] = {
67 [0] = {
68 .hssync_start_delay = 9,
69 .idle_wait_delay = 17,
70 .elastic_limit = 16,
71 .term_range_adj = 6,
72 .xcvr_setup = 15,
73 .xcvr_setup_offset = 0,
74 .xcvr_use_fuses = 1,
75 .xcvr_lsfslew = 2,
76 .xcvr_lsrslew = 2,
77 },
78 [1] = {
79 .hssync_start_delay = 9,
80 .idle_wait_delay = 17,
81 .elastic_limit = 16,
82 .term_range_adj = 6,
83 .xcvr_setup = 8,
84 .xcvr_setup_offset = 0,
85 .xcvr_use_fuses = 1,
86 .xcvr_lsfslew = 2,
87 .xcvr_lsrslew = 2,
88 },
89};
90
91static struct tegra_ulpi_config ulpi_phy_config = {
92 .reset_gpio = TEGRA_GPIO_PG2,
93 .clk = "cdev2",
94};
95
96static struct resource ventana_bcm4329_rfkill_resources[] = {
97 {
98 .name = "bcm4329_nshutdown_gpio",
99 .start = TEGRA_GPIO_PU0,
100 .end = TEGRA_GPIO_PU0,
101 .flags = IORESOURCE_IO,
102 },
103};
104
105static struct platform_device ventana_bcm4329_rfkill_device = {
106 .name = "bcm4329_rfkill",
107 .id = -1,
108 .num_resources = ARRAY_SIZE(ventana_bcm4329_rfkill_resources),
109 .resource = ventana_bcm4329_rfkill_resources,
110};
111
112static void __init ventana_bt_rfkill(void)
113{
114 /*Add Clock Resource*/
115 clk_add_alias("bcm4329_32k_clk", ventana_bcm4329_rfkill_device.name, \
116 "blink", NULL);
117 return;
118}
119
120static struct resource ventana_bluesleep_resources[] = {
121 [0] = {
122 .name = "gpio_host_wake",
123 .start = TEGRA_GPIO_PU6,
124 .end = TEGRA_GPIO_PU6,
125 .flags = IORESOURCE_IO,
126 },
127 [1] = {
128 .name = "gpio_ext_wake",
129 .start = TEGRA_GPIO_PU1,
130 .end = TEGRA_GPIO_PU1,
131 .flags = IORESOURCE_IO,
132 },
133 [2] = {
134 .name = "host_wake",
135 .start = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
136 .end = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
138 },
139};
140
141static struct platform_device ventana_bluesleep_device = {
142 .name = "bluesleep",
143 .id = -1,
144 .num_resources = ARRAY_SIZE(ventana_bluesleep_resources),
145 .resource = ventana_bluesleep_resources,
146};
147
148static void __init ventana_setup_bluesleep(void)
149{
150 platform_device_register(&ventana_bluesleep_device);
151 tegra_gpio_enable(TEGRA_GPIO_PU6);
152 tegra_gpio_enable(TEGRA_GPIO_PU1);
153 return;
154}
155
156static __initdata struct tegra_clk_init_table ventana_clk_init_table[] = {
157 /* name parent rate enabled */
158 { "blink", "clk_32k", 32768, false},
159 { "pll_p_out4", "pll_p", 24000000, true },
160 { "pwm", "clk_32k", 32768, false},
161 { "i2s1", "pll_a_out0", 0, false},
162 { "i2s2", "pll_a_out0", 0, false},
163 { "spdif_out", "pll_a_out0", 0, false},
164 { NULL, NULL, 0, 0},
165};
166
167static struct tegra_ulpi_config ventana_ehci2_ulpi_phy_config = {
168 .reset_gpio = TEGRA_GPIO_PV1,
169 .clk = "cdev2",
170};
171
172static struct tegra_ehci_platform_data ventana_ehci2_ulpi_platform_data = {
173 .operating_mode = TEGRA_USB_HOST,
174 .power_down_on_bus_suspend = 1,
175 .phy_config = &ventana_ehci2_ulpi_phy_config,
176 .phy_type = TEGRA_USB_PHY_TYPE_LINK_ULPI,
177 .default_enable = true,
178};
179
180static struct tegra_i2c_platform_data ventana_i2c1_platform_data = {
181 .adapter_nr = 0,
182 .bus_count = 1,
183 .bus_clk_rate = { 400000, 0 },
184 .slave_addr = 0x00FC,
185 .scl_gpio = {TEGRA_GPIO_PC4, 0},
186 .sda_gpio = {TEGRA_GPIO_PC5, 0},
187 .arb_recovery = arb_lost_recovery,
188};
189
190static const struct tegra_pingroup_config i2c2_ddc = {
191 .pingroup = TEGRA_PINGROUP_DDC,
192 .func = TEGRA_MUX_I2C2,
193};
194
195static const struct tegra_pingroup_config i2c2_gen2 = {
196 .pingroup = TEGRA_PINGROUP_PTA,
197 .func = TEGRA_MUX_I2C2,
198};
199
200static struct tegra_i2c_platform_data ventana_i2c2_platform_data = {
201 .adapter_nr = 1,
202 .bus_count = 2,
203 .bus_clk_rate = { 100000, 10000 },
204 .bus_mux = { &i2c2_ddc, &i2c2_gen2 },
205 .bus_mux_len = { 1, 1 },
206 .slave_addr = 0x00FC,
207 .scl_gpio = {0, TEGRA_GPIO_PT5},
208 .sda_gpio = {0, TEGRA_GPIO_PT6},
209 .arb_recovery = arb_lost_recovery,
210};
211
212static struct tegra_i2c_platform_data ventana_i2c3_platform_data = {
213 .adapter_nr = 3,
214 .bus_count = 1,
215 .bus_clk_rate = { 400000, 0 },
216 .slave_addr = 0x00FC,
217 .scl_gpio = {TEGRA_GPIO_PBB2, 0},
218 .sda_gpio = {TEGRA_GPIO_PBB3, 0},
219 .arb_recovery = arb_lost_recovery,
220};
221
222static struct tegra_i2c_platform_data ventana_dvc_platform_data = {
223 .adapter_nr = 4,
224 .bus_count = 1,
225 .bus_clk_rate = { 400000, 0 },
226 .is_dvc = true,
227 .scl_gpio = {TEGRA_GPIO_PZ6, 0},
228 .sda_gpio = {TEGRA_GPIO_PZ7, 0},
229 .arb_recovery = arb_lost_recovery,
230};
231
232static struct wm8903_platform_data ventana_wm8903_pdata = {
233 .irq_active_low = 0,
234 .micdet_cfg = 0,
235 .micdet_delay = 100,
236 .gpio_base = WM8903_GPIO_BASE,
237 .gpio_cfg = {
238 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
239 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
240 WM8903_GP2_DIR,
241 0,
242 WM8903_GPIO_NO_CONFIG,
243 WM8903_GPIO_NO_CONFIG,
244 },
245};
246
247static struct i2c_board_info __initdata wm8903_board_info = {
248 I2C_BOARD_INFO("wm8903", 0x1a),
249 .platform_data = &ventana_wm8903_pdata,
250 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
251};
252
253static void ventana_i2c_init(void)
254{
255 tegra_i2c_device1.dev.platform_data = &ventana_i2c1_platform_data;
256 tegra_i2c_device2.dev.platform_data = &ventana_i2c2_platform_data;
257 tegra_i2c_device3.dev.platform_data = &ventana_i2c3_platform_data;
258 tegra_i2c_device4.dev.platform_data = &ventana_dvc_platform_data;
259
260 platform_device_register(&tegra_i2c_device1);
261 platform_device_register(&tegra_i2c_device2);
262 platform_device_register(&tegra_i2c_device3);
263 platform_device_register(&tegra_i2c_device4);
264
265 i2c_register_board_info(0, &wm8903_board_info, 1);
266}
267static struct platform_device *ventana_uart_devices[] __initdata = {
268 &tegra_uartb_device,
269 &tegra_uartc_device,
270 &tegra_uartd_device,
271};
272
273static struct uart_clk_parent uart_parent_clk[] = {
274 [0] = {.name = "pll_p"},
275 [1] = {.name = "pll_m"},
276 [2] = {.name = "clk_m"},
277};
278
279static struct tegra_uart_platform_data ventana_uart_pdata;
280
281static void __init uart_debug_init(void)
282{
283 unsigned long rate;
284 struct clk *c;
285
286 /* UARTD is the debug port. */
287 pr_info("Selecting UARTD as the debug console\n");
288 ventana_uart_devices[2] = &debug_uartd_device;
289 debug_uart_port_base = ((struct plat_serial8250_port *)(
290 debug_uartd_device.dev.platform_data))->mapbase;
291 debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
292
293 /* Clock enable for the debug channel */
294 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
295 rate = ((struct plat_serial8250_port *)(
296 debug_uartd_device.dev.platform_data))->uartclk;
297 pr_info("The debug console clock name is %s\n",
298 debug_uart_clk->name);
299 c = tegra_get_clock_by_name("pll_p");
300 if (IS_ERR_OR_NULL(c))
301 pr_err("Not getting the parent clock pll_p\n");
302 else
303 clk_set_parent(debug_uart_clk, c);
304
305 clk_enable(debug_uart_clk);
306 clk_set_rate(debug_uart_clk, rate);
307 } else {
308 pr_err("Not getting the clock %s for debug console\n",
309 debug_uart_clk->name);
310 }
311}
312
313static void __init ventana_uart_init(void)
314{
315 int i;
316 struct clk *c;
317
318 for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
319 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
320 if (IS_ERR_OR_NULL(c)) {
321 pr_err("Not able to get the clock for %s\n",
322 uart_parent_clk[i].name);
323 continue;
324 }
325 uart_parent_clk[i].parent_clk = c;
326 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
327 }
328 ventana_uart_pdata.parent_clk_list = uart_parent_clk;
329 ventana_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
330 tegra_uartb_device.dev.platform_data = &ventana_uart_pdata;
331 tegra_uartc_device.dev.platform_data = &ventana_uart_pdata;
332 tegra_uartd_device.dev.platform_data = &ventana_uart_pdata;
333
334 /* Register low speed only if it is selected */
335 if (!is_tegra_debug_uartport_hs())
336 uart_debug_init();
337
338 platform_add_devices(ventana_uart_devices,
339 ARRAY_SIZE(ventana_uart_devices));
340}
341
342#ifdef CONFIG_KEYBOARD_GPIO
343#define GPIO_KEY(_id, _gpio, _iswake) \
344 { \
345 .code = _id, \
346 .gpio = TEGRA_GPIO_##_gpio, \
347 .active_low = 1, \
348 .desc = #_id, \
349 .type = EV_KEY, \
350 .wakeup = _iswake, \
351 .debounce_interval = 10, \
352 }
353
354static struct gpio_keys_button ventana_keys[] = {
355 [0] = GPIO_KEY(KEY_FIND, PQ3, 0),
356 [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
357 [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
358 [3] = GPIO_KEY(KEY_VOLUMEUP, PQ5, 0),
359 [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
360 [5] = GPIO_KEY(KEY_POWER, PV2, 1),
361 [6] = GPIO_KEY(KEY_MENU, PC7, 0),
362};
363
364#define PMC_WAKE_STATUS 0x14
365
366static int ventana_wakeup_key(void)
367{
368 unsigned long status =
369 readl(IO_ADDRESS(TEGRA_PMC_BASE) + PMC_WAKE_STATUS);
370
371 return status & TEGRA_WAKE_GPIO_PV2 ? KEY_POWER : KEY_RESERVED;
372}
373
374static struct gpio_keys_platform_data ventana_keys_platform_data = {
375 .buttons = ventana_keys,
376 .nbuttons = ARRAY_SIZE(ventana_keys),
377 .wakeup_key = ventana_wakeup_key,
378};
379
380static struct platform_device ventana_keys_device = {
381 .name = "gpio-keys",
382 .id = 0,
383 .dev = {
384 .platform_data = &ventana_keys_platform_data,
385 },
386};
387
388static void ventana_keys_init(void)
389{
390 int i;
391
392 for (i = 0; i < ARRAY_SIZE(ventana_keys); i++)
393 tegra_gpio_enable(ventana_keys[i].gpio);
394}
395#endif
396
397static struct platform_device tegra_camera = {
398 .name = "tegra_camera",
399 .id = -1,
400};
401
402static struct tegra_wm8903_platform_data ventana_audio_pdata = {
403 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
404 .gpio_hp_det = TEGRA_GPIO_HP_DET,
405 .gpio_hp_mute = -1,
406 .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN,
407 .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN,
408};
409
410static struct platform_device ventana_audio_device = {
411 .name = "tegra-snd-wm8903",
412 .id = 0,
413 .dev = {
414 .platform_data = &ventana_audio_pdata,
415 },
416};
417
418static struct platform_device *ventana_devices[] __initdata = {
419 &tegra_pmu_device,
420 &tegra_gart_device,
421 &tegra_aes_device,
422#ifdef CONFIG_KEYBOARD_GPIO
423 &ventana_keys_device,
424#endif
425 &tegra_wdt_device,
426 &tegra_avp_device,
427 &tegra_camera,
428 &tegra_i2s_device1,
429 &tegra_i2s_device2,
430 &tegra_spdif_device,
431 &tegra_das_device,
432 &spdif_dit_device,
433 &bluetooth_dit_device,
434 &ventana_bcm4329_rfkill_device,
435 &tegra_pcm_device,
436 &ventana_audio_device,
437};
438
439
440static struct mxt_platform_data atmel_mxt_info = {
441 .x_line = 27,
442 .y_line = 42,
443 .x_size = 768,
444 .y_size = 1366,
445 .blen = 0x20,
446 .threshold = 0x3C,
447 .voltage = 3300000,
448 .orient = MXT_ROTATED_90,
449 .irqflags = IRQF_TRIGGER_FALLING,
450};
451
452static struct i2c_board_info __initdata i2c_info[] = {
453 {
454 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
455 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PV6),
456 .platform_data = &atmel_mxt_info,
457 },
458};
459
460static int __init ventana_touch_init_atmel(void)
461{
462 tegra_gpio_enable(TEGRA_GPIO_PV6);
463 tegra_gpio_enable(TEGRA_GPIO_PQ7);
464
465 gpio_request(TEGRA_GPIO_PV6, "atmel-irq");
466 gpio_direction_input(TEGRA_GPIO_PV6);
467
468 gpio_request(TEGRA_GPIO_PQ7, "atmel-reset");
469 gpio_direction_output(TEGRA_GPIO_PQ7, 0);
470 msleep(1);
471 gpio_set_value(TEGRA_GPIO_PQ7, 1);
472 msleep(100);
473
474 i2c_register_board_info(0, i2c_info, 1);
475
476 return 0;
477}
478
479static struct panjit_i2c_ts_platform_data panjit_data = {
480 .gpio_reset = TEGRA_GPIO_PQ7,
481};
482
483static struct i2c_board_info __initdata ventana_i2c_bus1_touch_info[] = {
484 {
485 I2C_BOARD_INFO("panjit_touch", 0x3),
486 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PV6),
487 .platform_data = &panjit_data,
488 },
489};
490
491static int __init ventana_touch_init_panjit(void)
492{
493 tegra_gpio_enable(TEGRA_GPIO_PV6);
494
495 tegra_gpio_enable(TEGRA_GPIO_PQ7);
496 i2c_register_board_info(0, ventana_i2c_bus1_touch_info, 1);
497
498 return 0;
499}
500
501static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
502 [0] = {
503 .instance = 0,
504 .vbus_irq = TPS6586X_INT_BASE + TPS6586X_INT_USB_DET,
505 .vbus_gpio = TEGRA_GPIO_PD0,
506 },
507 [1] = {
508 .instance = 1,
509 .vbus_gpio = -1,
510 },
511 [2] = {
512 .instance = 2,
513 .vbus_gpio = TEGRA_GPIO_PD3,
514 },
515};
516
517static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
518 [0] = {
519 .phy_config = &utmi_phy_config[0],
520 .operating_mode = TEGRA_USB_HOST,
521 .power_down_on_bus_suspend = 1,
522 .default_enable = true,
523 },
524 [1] = {
525 .phy_config = &ulpi_phy_config,
526 .operating_mode = TEGRA_USB_HOST,
527 .power_down_on_bus_suspend = 1,
528 .phy_type = TEGRA_USB_PHY_TYPE_LINK_ULPI,
529 .default_enable = true,
530 },
531 [2] = {
532 .phy_config = &utmi_phy_config[1],
533 .operating_mode = TEGRA_USB_HOST,
534 .power_down_on_bus_suspend = 1,
535 .hotplug = 1,
536 .default_enable = true,
537 },
538};
539
540static struct tegra_otg_platform_data tegra_otg_pdata = {
541 .ehci_device = &tegra_ehci1_device,
542 .ehci_pdata = &tegra_ehci_pdata[0],
543};
544
545static int __init ventana_gps_init(void)
546{
547 struct clk *clk32 = clk_get_sys(NULL, "blink");
548 if (!IS_ERR(clk32)) {
549 clk_set_rate(clk32,clk32->parent->rate);
550 clk_enable(clk32);
551 }
552
553 tegra_gpio_enable(TEGRA_GPIO_PZ3);
554 return 0;
555}
556
557static void ventana_usb_init(void)
558{
559 tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
560 /* OTG should be the first to be registered */
561 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
562 platform_device_register(&tegra_otg_device);
563
564 platform_device_register(&tegra_udc_device);
565 platform_device_register(&tegra_ehci2_device);
566
567 tegra_ehci3_device.dev.platform_data=&tegra_ehci_pdata[2];
568 platform_device_register(&tegra_ehci3_device);
569}
570
571static void __init tegra_ventana_init(void)
572{
573 struct board_info BoardInfo;
574
575 tegra_clk_init_from_table(ventana_clk_init_table);
576 ventana_pinmux_init();
577 ventana_i2c_init();
578 ventana_uart_init();
579 tegra_ehci2_device.dev.platform_data
580 = &ventana_ehci2_ulpi_platform_data;
581 platform_add_devices(ventana_devices, ARRAY_SIZE(ventana_devices));
582 tegra_ram_console_debug_init();
583 ventana_sdhci_init();
584 ventana_charge_init();
585 ventana_regulator_init();
586 ventana_charger_init();
587
588 tegra_get_board_info(&BoardInfo);
589
590 /* boards with sku > 0 have atmel touch panels */
591 if (BoardInfo.sku) {
592 pr_info("Initializing Atmel touch driver\n");
593 ventana_touch_init_atmel();
594 } else {
595 pr_info("Initializing Panjit touch driver\n");
596 ventana_touch_init_panjit();
597 }
598
599#ifdef CONFIG_KEYBOARD_GPIO
600 ventana_keys_init();
601#endif
602
603 ventana_usb_init();
604 ventana_gps_init();
605 ventana_panel_init();
606 ventana_sensors_init();
607 ventana_bt_rfkill();
608 ventana_emc_init();
609
610 ventana_setup_bluesleep();
611 tegra_release_bootloader_fb();
612}
613
614int __init tegra_ventana_protected_aperture_init(void)
615{
616 if (!machine_is_ventana())
617 return 0;
618
619 tegra_protected_aperture_init(tegra_grhost_aperture);
620 return 0;
621}
622late_initcall(tegra_ventana_protected_aperture_init);
623
624void __init tegra_ventana_reserve(void)
625{
626 if (memblock_reserve(0x0, 4096) < 0)
627 pr_warn("Cannot reserve first 4K of memory for safety\n");
628
629 tegra_reserve(SZ_256M, SZ_8M + SZ_1M, SZ_16M);
630 tegra_ram_console_debug_reserve(SZ_1M);
631}
632
633MACHINE_START(VENTANA, "ventana")
634 .boot_params = 0x00000100,
635 .map_io = tegra_map_common_io,
636 .reserve = tegra_ventana_reserve,
637 .init_early = tegra_init_early,
638 .init_irq = tegra_init_irq,
639 .timer = &tegra_timer,
640 .init_machine = tegra_ventana_init,
641MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-16 12:55:01 -0400