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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-22 10:38:37 -0500
commitfcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch)
treea57612d1888735a2ec7972891b68c1ac5ec8faea /arch/arm/mach-tegra/board-enterprise-power.c
parent8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff)
Added missing tegra files.HEADmaster
Diffstat (limited to 'arch/arm/mach-tegra/board-enterprise-power.c')
-rw-r--r--arch/arm/mach-tegra/board-enterprise-power.c838
1 files changed, 838 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-enterprise-power.c b/arch/arm/mach-tegra/board-enterprise-power.c
new file mode 100644
index 00000000000..02792f44f45
--- /dev/null
+++ b/arch/arm/mach-tegra/board-enterprise-power.c
@@ -0,0 +1,838 @@
1/*
2 * arch/arm/mach-tegra/board-enterprise-power.c
3 *
4 * Copyright (C) 2011 NVIDIA, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 * 02111-1307, USA
19 */
20#include <linux/i2c.h>
21#include <linux/pda_power.h>
22#include <linux/platform_device.h>
23#include <linux/resource.h>
24#include <linux/regulator/machine.h>
25#include <linux/regulator/fixed.h>
26#include <linux/mfd/tps80031.h>
27#include <linux/regulator/tps80031-regulator.h>
28#include <linux/tps80031-charger.h>
29#include <linux/gpio.h>
30#include <linux/io.h>
31#include <linux/cpumask.h>
32#include <linux/platform_data/tegra_bpc_mgmt.h>
33#include <linux/regulator/driver.h>
34#include <linux/regulator/gpio-regulator.h>
35
36#include <asm/mach-types.h>
37
38#include <mach/edp.h>
39#include <mach/iomap.h>
40#include <mach/irqs.h>
41#include <mach/pinmux.h>
42
43#include "gpio-names.h"
44#include "board.h"
45#include "board-enterprise.h"
46#include "pm.h"
47#include "wakeups-t3.h"
48#include "tegra3_tsensor.h"
49
50#define PMC_CTRL 0x0
51#define PMC_CTRL_INTR_LOW (1 << 17)
52
53#define PMC_DPD_PADS_ORIDE 0x01c
54#define PMC_DPD_PADS_ORIDE_BLINK (1 << 20)
55
56/************************ TPS80031 based regulator ****************/
57static struct regulator_consumer_supply tps80031_vio_supply_a02[] = {
58 REGULATOR_SUPPLY("vio_1v8", NULL),
59 REGULATOR_SUPPLY("avdd_osc", NULL),
60 REGULATOR_SUPPLY("vddio_sys", NULL),
61 REGULATOR_SUPPLY("vddio_uart", NULL),
62 REGULATOR_SUPPLY("pwrdet_uart", NULL),
63 REGULATOR_SUPPLY("vddio_lcd", NULL),
64 REGULATOR_SUPPLY("pwrdet_lcd", NULL),
65 REGULATOR_SUPPLY("vddio_audio", NULL),
66 REGULATOR_SUPPLY("pwrdet_audio", NULL),
67 REGULATOR_SUPPLY("vddio_bb", NULL),
68 REGULATOR_SUPPLY("pwrdet_bb", NULL),
69 REGULATOR_SUPPLY("vddio_gmi", NULL),
70 REGULATOR_SUPPLY("avdd_usb_pll", NULL),
71 REGULATOR_SUPPLY("vddio_cam", NULL),
72 REGULATOR_SUPPLY("pwrdet_cam", NULL),
73 REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
74 REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
75 REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
76 REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
77 REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
78 REGULATOR_SUPPLY("vddio_gps", NULL),
79 REGULATOR_SUPPLY("vdd_lcd_buffered", NULL),
80 REGULATOR_SUPPLY("vddio_nand", NULL),
81 REGULATOR_SUPPLY("pwrdet_nand", NULL),
82 REGULATOR_SUPPLY("vddio_sd", NULL),
83 REGULATOR_SUPPLY("vdd_bat", NULL),
84 REGULATOR_SUPPLY("vdd_io", NULL),
85 REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
86};
87
88static struct regulator_consumer_supply tps80031_vio_supply_a03[] = {
89 REGULATOR_SUPPLY("vio_1v8", NULL),
90 REGULATOR_SUPPLY("vddio_sys", NULL),
91 REGULATOR_SUPPLY("vddio_uart", NULL),
92 REGULATOR_SUPPLY("pwrdet_uart", NULL),
93 REGULATOR_SUPPLY("vddio_lcd", NULL),
94 REGULATOR_SUPPLY("pwrdet_lcd", NULL),
95 REGULATOR_SUPPLY("vddio_audio", NULL),
96 REGULATOR_SUPPLY("pwrdet_audio", NULL),
97 REGULATOR_SUPPLY("vddio_bb", NULL),
98 REGULATOR_SUPPLY("pwrdet_bb", NULL),
99 REGULATOR_SUPPLY("vddio_gmi", NULL),
100 REGULATOR_SUPPLY("vddio_cam", NULL),
101 REGULATOR_SUPPLY("pwrdet_cam", NULL),
102 REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
103 REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
104 REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
105 REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
106 REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
107 REGULATOR_SUPPLY("vddio_gps", NULL),
108 REGULATOR_SUPPLY("vdd_lcd_buffered", NULL),
109 REGULATOR_SUPPLY("vddio_nand", NULL),
110 REGULATOR_SUPPLY("pwrdet_nand", NULL),
111 REGULATOR_SUPPLY("vddio_sd", NULL),
112 REGULATOR_SUPPLY("vdd_bat", NULL),
113 REGULATOR_SUPPLY("vdd_io", NULL),
114 REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
115};
116
117static struct regulator_consumer_supply tps80031_smps1_supply_common[] = {
118 REGULATOR_SUPPLY("vdd_cpu", NULL),
119};
120
121static struct regulator_consumer_supply tps80031_smps2_supply_common[] = {
122 REGULATOR_SUPPLY("vdd_core", NULL),
123};
124
125static struct regulator_consumer_supply tps80031_smps3_supply_common[] = {
126 REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
127 REGULATOR_SUPPLY("vddio_ddr", NULL),
128 REGULATOR_SUPPLY("vdd_lpddr", NULL),
129 REGULATOR_SUPPLY("ddr_comp_pu", NULL),
130};
131
132static struct regulator_consumer_supply tps80031_smps4_supply_a02[] = {
133 REGULATOR_SUPPLY("vddio_sdmmc_2v85", NULL),
134 REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
135};
136
137static struct regulator_consumer_supply tps80031_smps4_supply_a03[] = {
138 REGULATOR_SUPPLY("vddio_sdmmc_2v85", NULL),
139 REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
140 REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
141 REGULATOR_SUPPLY("vddf_core_emmc", NULL),
142};
143
144static struct regulator_consumer_supply tps80031_vana_supply_common[] = {
145 REGULATOR_SUPPLY("unused_vana", NULL),
146};
147
148static struct regulator_consumer_supply tps80031_ldo1_supply_a02[] = {
149 REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
150 REGULATOR_SUPPLY("pwrdet_mipi", NULL),
151};
152
153static struct regulator_consumer_supply tps80031_ldo1_supply_a03[] = {
154 REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
155};
156
157static struct regulator_consumer_supply tps80031_ldo2_supply_common[] = {
158 REGULATOR_SUPPLY("vdd_rtc", NULL),
159};
160
161static struct regulator_consumer_supply tps80031_ldo3_supply_common[] = {
162 REGULATOR_SUPPLY("vdd_vbrtr", NULL),
163};
164
165static struct regulator_consumer_supply tps80031_ldo4_supply_a02[] = {
166 REGULATOR_SUPPLY("avdd_lcd", NULL),
167};
168
169static struct regulator_consumer_supply tps80031_ldo4_supply_a03[] = {
170 REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
171 REGULATOR_SUPPLY("avdd_hsic", NULL),
172 REGULATOR_SUPPLY("pwrdet_mipi", NULL),
173};
174
175static struct regulator_consumer_supply tps80031_ldo5_supply_common[] = {
176 REGULATOR_SUPPLY("vdd_sensor", NULL),
177 REGULATOR_SUPPLY("vdd_compass", NULL),
178 REGULATOR_SUPPLY("vdd_als", NULL),
179 REGULATOR_SUPPLY("vdd_gyro", NULL),
180 REGULATOR_SUPPLY("vdd_touch", NULL),
181 REGULATOR_SUPPLY("vdd_proxim_diode", NULL),
182};
183
184static struct regulator_consumer_supply tps80031_ldo6_supply_a02[] = {
185 REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
186 REGULATOR_SUPPLY("vddf_core_emmc", NULL),
187};
188
189static struct regulator_consumer_supply tps80031_ldo6_supply_a03[] = {
190 REGULATOR_SUPPLY("avdd_osc", NULL),
191 REGULATOR_SUPPLY("avdd_usb_pll", NULL),
192};
193
194static struct regulator_consumer_supply tps80031_ldo7_supply_a02[] = {
195 REGULATOR_SUPPLY("vdd_plla_p_c_s", NULL),
196 REGULATOR_SUPPLY("vdd_pllm", NULL),
197 REGULATOR_SUPPLY("vdd_pllu_d", NULL),
198 REGULATOR_SUPPLY("vdd_pllx", NULL),
199};
200
201static struct regulator_consumer_supply tps80031_ldo7_supply_a03[] = {
202 REGULATOR_SUPPLY("avdd_lcd", NULL),
203};
204
205static struct regulator_consumer_supply tps80031_ldoln_supply_a02[] = {
206 REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
207};
208
209static struct regulator_consumer_supply tps80031_ldoln_supply_a03[] = {
210 REGULATOR_SUPPLY("vdd_plla_p_c_s", NULL),
211 REGULATOR_SUPPLY("vdd_pllm", NULL),
212 REGULATOR_SUPPLY("vdd_pllu_d", NULL),
213 REGULATOR_SUPPLY("vdd_pllx", NULL),
214};
215
216static struct regulator_consumer_supply tps80031_ldousb_supply_a02[] = {
217 REGULATOR_SUPPLY("unused_ldousb", NULL),
218};
219
220static struct regulator_consumer_supply tps80031_ldousb_supply_a03[] = {
221 REGULATOR_SUPPLY("avdd_usb_hdmi_3v3", NULL),
222 REGULATOR_SUPPLY("avdd_usb", NULL),
223 REGULATOR_SUPPLY("avdd_hdmi", NULL),
224 REGULATOR_SUPPLY("vdd", "4-004c"),
225};
226
227static struct regulator_consumer_supply tps80031_vbus_supply_common[] = {
228 REGULATOR_SUPPLY("usb_vbus", NULL),
229};
230
231static struct regulator_consumer_supply tps80031_battery_charge_supply[] = {
232 REGULATOR_SUPPLY("usb_bat_chg", NULL),
233};
234
235#define TPS_PDATA_INIT(_id, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
236 _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, \
237 _flags, _ectrl, _delay) \
238 static struct tps80031_regulator_platform_data pdata_##_id##_##_sname = { \
239 .regulator = { \
240 .constraints = { \
241 .min_uV = (_minmv)*1000, \
242 .max_uV = (_maxmv)*1000, \
243 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
244 REGULATOR_MODE_STANDBY), \
245 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
246 REGULATOR_CHANGE_STATUS | \
247 REGULATOR_CHANGE_VOLTAGE), \
248 .always_on = _always_on, \
249 .boot_on = _boot_on, \
250 .apply_uV = _apply_uv, \
251 }, \
252 .num_consumer_supplies = \
253 ARRAY_SIZE(tps80031_##_id##_supply_##_sname), \
254 .consumer_supplies = tps80031_##_id##_supply_##_sname, \
255 .supply_regulator = _supply_reg, \
256 }, \
257 .init_uV = _init_uV * 1000, \
258 .init_enable = _init_enable, \
259 .init_apply = _init_apply, \
260 .flags = _flags, \
261 .ext_ctrl_flag = _ectrl, \
262 .delay_us = _delay, \
263 }
264
265TPS_PDATA_INIT(vio, a02, 600, 2100, 0, 1, 0, 0, -1, 0, 0, 0, 0, 0);
266TPS_PDATA_INIT(vio, a03, 600, 2100, 0, 1, 0, 0, -1, 0, 0, 0, 0, 0);
267TPS_PDATA_INIT(smps1, common, 600, 2100, 0, 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ2 | PWR_OFF_ON_SLEEP, 0);
268TPS_PDATA_INIT(smps2, common, 600, 2100, 0, 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
269TPS_PDATA_INIT(smps3, common, 600, 2100, 0, 1, 0, 0, -1, 0, 0, 0, 0, 0);
270TPS_PDATA_INIT(smps4, a02, 600, 2100, 0, 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
271TPS_PDATA_INIT(smps4, a03, 600, 2100, 0, 0, 0, 0, -1, 0, 0, 0, 0, 0);
272TPS_PDATA_INIT(ldo1, a02, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, 0, 0);
273TPS_PDATA_INIT(ldo1, a03, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
274TPS_PDATA_INIT(ldo2, common, 1000, 3300, 0, 1, 1, 1, 1000, 1, 1, 0, 0, 0);
275TPS_PDATA_INIT(ldo3, common, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, PWR_OFF_ON_SLEEP, 0);
276TPS_PDATA_INIT(ldo4, a02, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0, 0);
277TPS_PDATA_INIT(ldo4, a03, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, 0, 0);
278TPS_PDATA_INIT(ldo5, common, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0, 0);
279TPS_PDATA_INIT(ldo6, a02, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
280TPS_PDATA_INIT(ldo6, a03, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
281TPS_PDATA_INIT(ldo7, a02, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
282TPS_PDATA_INIT(ldo7, a03, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0, 0);
283TPS_PDATA_INIT(ldoln, a02, 1000, 3300, tps80031_rails(SMPS3), 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
284TPS_PDATA_INIT(ldoln, a03, 1000, 3300, tps80031_rails(VIO), 0, 0, 0, -1, 0, 0, 0, PWR_REQ_INPUT_PREQ1, 0);
285TPS_PDATA_INIT(ldousb, a02, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, USBLDO_INPUT_VSYS, PWR_OFF_ON_SLEEP, 0);
286TPS_PDATA_INIT(ldousb, a03, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, USBLDO_INPUT_VSYS, PWR_OFF_ON_SLEEP, 0);
287TPS_PDATA_INIT(vana, common, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0, 0);
288TPS_PDATA_INIT(vbus, common, 0, 5000, 0, 0, 0, 0, -1, 0, 0, (VBUS_SW_ONLY | VBUS_DISCHRG_EN_PDN), 0, 100000);
289
290static struct tps80031_rtc_platform_data rtc_data = {
291 .irq = ENT_TPS80031_IRQ_BASE + TPS80031_INT_RTC_ALARM,
292 .time = {
293 .tm_year = 2011,
294 .tm_mon = 0,
295 .tm_mday = 1,
296 .tm_hour = 1,
297 .tm_min = 2,
298 .tm_sec = 3,
299 },
300};
301
302int battery_charger_init(void *board_data)
303{
304 int ret;
305 ret = gpio_request(TEGRA_GPIO_PF6, "lcd_d14-bat_charge");
306 if (ret < 0) {
307 pr_err("%s() The gpio_request for battery"
308 " charger fails\n", __func__);
309 }
310 gpio_direction_output(TEGRA_GPIO_PF6, 1);
311 tegra_gpio_enable(TEGRA_GPIO_PF6);
312 return 0;
313}
314
315static struct tps80031_charger_platform_data bcharger_pdata = {
316 .max_charge_volt_mV = 4100,
317 .max_charge_current_mA = 1000,
318 .charging_term_current_mA = 100,
319 .watch_time_sec = 100,
320 .irq_base = ENT_TPS80031_IRQ_BASE,
321 .consumer_supplies = tps80031_battery_charge_supply,
322 .num_consumer_supplies = ARRAY_SIZE(tps80031_battery_charge_supply),
323 .board_init = battery_charger_init,
324 .board_data = NULL,
325};
326
327static struct tps80031_bg_platform_data battery_gauge_data = {
328 .irq_base = ENT_TPS80031_IRQ_BASE,
329 .battery_present = 1,
330};
331
332#define TPS_RTC() \
333 { \
334 .id = 0, \
335 .name = "rtc_tps80031", \
336 .platform_data = &rtc_data, \
337 }
338
339#define TPS_REG(_id, _data, _sname) \
340 { \
341 .id = TPS80031_ID_##_id, \
342 .name = "tps80031-regulator", \
343 .platform_data = &pdata_##_data##_##_sname, \
344 }
345#define TPS_BATTERY() \
346 { \
347 .name = "tps80031-charger", \
348 .platform_data = &bcharger_pdata, \
349 }
350#define TPS_BATTERY_GAUGE() \
351 { \
352 .name = "tps80031-battery-gauge", \
353 .platform_data = &battery_gauge_data, \
354 }
355#define TPS_GPADC() \
356 { \
357 .name = "tps80031-gpadc", \
358 }
359
360#define TPS80031_DEVS_COMMON \
361 TPS_REG(SMPS1, smps1, common), \
362 TPS_REG(SMPS2, smps2, common), \
363 TPS_REG(SMPS3, smps3, common), \
364 TPS_REG(VANA, vana, common), \
365 TPS_REG(LDO2, ldo2, common), \
366 TPS_REG(LDO3, ldo3, common), \
367 TPS_REG(LDO5, ldo5, common), \
368 TPS_REG(VBUS, vbus, common), \
369 TPS_RTC(), \
370 TPS_BATTERY(), \
371 TPS_BATTERY_GAUGE(), \
372 TPS_GPADC()
373
374
375static struct tps80031_subdev_info tps80031_devs_a02[] = {
376 TPS80031_DEVS_COMMON,
377 TPS_REG(VIO, vio, a02),
378 TPS_REG(SMPS4, smps4, a02),
379 TPS_REG(LDO1, ldo1, a02),
380 TPS_REG(LDO4, ldo4, a02),
381 TPS_REG(LDO6, ldo6, a02),
382 TPS_REG(LDO7, ldo7, a02),
383 TPS_REG(LDOLN, ldoln, a02),
384 TPS_REG(LDOUSB, ldousb, a02),
385
386};
387
388static struct tps80031_subdev_info tps80031_devs_a03[] = {
389 TPS80031_DEVS_COMMON,
390 TPS_REG(VIO, vio, a03),
391 TPS_REG(SMPS4, smps4, a03),
392 TPS_REG(LDO1, ldo1, a03),
393 TPS_REG(LDO4, ldo4, a03),
394 TPS_REG(LDO6, ldo6, a03),
395 TPS_REG(LDO7, ldo7, a03),
396 TPS_REG(LDOLN, ldoln, a03),
397 TPS_REG(LDOUSB, ldousb, a03),
398
399};
400
401struct tps80031_clk32k_init_data clk32k_idata[] = {
402 {
403 .clk32k_nr = TPS80031_CLOCK32K_G,
404 .enable = true,
405 .ext_ctrl_flag = 0,
406 },
407 {
408 .clk32k_nr = TPS80031_CLOCK32K_AUDIO,
409 .enable = true,
410 .ext_ctrl_flag = 0,
411 },
412};
413
414static struct tps80031_platform_data tps_platform = {
415 .irq_base = ENT_TPS80031_IRQ_BASE,
416 .gpio_base = ENT_TPS80031_GPIO_BASE,
417 .clk32k_init_data = clk32k_idata,
418 .clk32k_init_data_size = ARRAY_SIZE(clk32k_idata),
419 .use_power_off = true,
420};
421
422static struct i2c_board_info __initdata enterprise_regulators[] = {
423 {
424 I2C_BOARD_INFO("tps80031", 0x4A),
425 .irq = INT_EXTERNAL_PMU,
426 .platform_data = &tps_platform,
427 },
428};
429
430/************************ GPIO based fixed regulator ****************/
431/* REGEN1 from PMU*/
432static struct regulator_consumer_supply fixed_reg_pmu_5v15_en_supply[] = {
433 REGULATOR_SUPPLY("vdd_5v15", NULL),
434};
435
436/* REGEN2 from PMU*/
437static struct regulator_consumer_supply fixed_reg_pmu_3v3_en_supply[] = {
438 REGULATOR_SUPPLY("avdd_usb_hdmi_3v3", NULL),
439 REGULATOR_SUPPLY("avdd_usb", NULL),
440 REGULATOR_SUPPLY("avdd_hdmi", NULL),
441 REGULATOR_SUPPLY("vdd", "4-004c"),
442};
443
444/* SYSEN from PMU*/
445static struct regulator_consumer_supply fixed_reg_pmu_hdmi_5v0_en_supply[] = {
446 REGULATOR_SUPPLY("hdmi_5v0", NULL),
447};
448
449/* LCD-D16 (GPIO M0) from T30*/
450static struct regulator_consumer_supply fixed_reg_vdd_fuse_en_supply[] = {
451 REGULATOR_SUPPLY("vdd_fuse", NULL),
452};
453
454/* LCD-D17 (GPIO M1) from T30*/
455static struct regulator_consumer_supply gpio_reg_sdmmc3_vdd_sel_supply[] = {
456 REGULATOR_SUPPLY("vddio_sdmmc3_2v85_1v8", NULL),
457 REGULATOR_SUPPLY("sdmmc3_compu_pu", NULL),
458 REGULATOR_SUPPLY("vddio_sdmmc3", NULL),
459 REGULATOR_SUPPLY("vsys_3v7", NULL),
460};
461
462/* LCD-D23 (GPIO M7) from T30*/
463/* 2-0036 is dev_name of ar0832 in Enterprise A01*/
464/* 2-0032 is alternative dev_name of ar0832 Enterprise A01*/
465/* 2-0010 is dev_name of ov9726 */
466/* 2-0070 is dev_name of PCA9546 in Enterprise A02*/
467/* 6-0036 is dev_name of ar0832 in Enterprise A02 */
468/* 7-0036 is dev_name of ar0832 in Enterprise A02 */
469static struct regulator_consumer_supply fixed_reg_cam_ldo_2v8_en_supply[] = {
470 REGULATOR_SUPPLY("vaa", "2-0036"),
471 REGULATOR_SUPPLY("vaa", "2-0032"),
472 REGULATOR_SUPPLY("avdd", "2-0010"),
473 REGULATOR_SUPPLY("vdd_2v8_cam", NULL),
474 REGULATOR_SUPPLY("vcc", "2-0070"),
475 REGULATOR_SUPPLY("vaa", "6-0036"),
476 REGULATOR_SUPPLY("vaa", "7-0036"),
477};
478
479/* LCD-D9 (GPIO F1) from T30*/
480/* 2-0036 is dev_name of ar0832 in Enterprise A01*/
481/* 2-0032 is alternative dev_name of ar0832 Enterprise A01*/
482/* 2-0010 is dev_name of ov9726 */
483/* 2-0033 is dev_name of tps61050 */
484/* 2-0070 is dev_name of PCA9546 in Enterprise A02*/
485/* 6-0036 is dev_name of ar0832 in Enterprise A02 */
486/* 7-0036 is dev_name of ar0832 in Enterprise A02 */
487static struct regulator_consumer_supply fixed_reg_cam_ldo_1v8_en_supply[] = {
488 REGULATOR_SUPPLY("vdd", "2-0036"),
489 REGULATOR_SUPPLY("vdd", "2-0032"),
490 REGULATOR_SUPPLY("dovdd", "2-0010"),
491 REGULATOR_SUPPLY("vdd_1v8_cam", NULL),
492 REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
493 REGULATOR_SUPPLY("vcc_i2c", "2-0070"),
494 REGULATOR_SUPPLY("vdd", "6-0036"),
495 REGULATOR_SUPPLY("vdd", "7-0036"),
496};
497
498/* LCD-D10 (GPIO F2) from T30*/
499static struct regulator_consumer_supply fixed_reg_vdd_sdmmc3_2v85_en_supply[] = {
500 REGULATOR_SUPPLY("en_vdd_sdmmc3", NULL),
501 REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
502};
503
504/* LCD_PWR0 (GPIO B2) from T30*/
505static struct regulator_consumer_supply fixed_reg_lcd_1v8_en_supply[] = {
506 REGULATOR_SUPPLY("lcd_vddio_en", NULL),
507};
508
509static struct gpio_regulator_state gpio_reg_sdmmc3_vdd_sel_states[] = {
510 {
511 .gpios = 0,
512 .value = 2850000,
513 },
514 {
515 .gpios = 1,
516 .value = 1800000,
517 },
518};
519
520static struct gpio gpio_reg_sdmmc3_vdd_sel_gpios[] = {
521 {
522 .gpio = TEGRA_GPIO_PM1,
523 .flags = 0,
524 .label = "sdmmc3_vdd_sel",
525 },
526};
527
528/* Macro for defining gpio regulator device data */
529#define GPIO_REG(_id, _name, _input_supply, _active_high, \
530 _boot_state, _delay_us, _minmv, _maxmv) \
531 static struct regulator_init_data ri_data_##_name = \
532 { \
533 .supply_regulator = _input_supply, \
534 .num_consumer_supplies = \
535 ARRAY_SIZE(gpio_reg_##_name##_supply), \
536 .consumer_supplies = gpio_reg_##_name##_supply, \
537 .constraints = { \
538 .name = "gpio_reg_"#_name, \
539 .min_uV = (_minmv)*1000, \
540 .max_uV = (_maxmv)*1000, \
541 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
542 REGULATOR_MODE_STANDBY), \
543 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
544 REGULATOR_CHANGE_STATUS | \
545 REGULATOR_CHANGE_VOLTAGE), \
546 }, \
547 }; \
548 static struct gpio_regulator_config gpio_reg_##_name##_pdata = \
549 { \
550 .supply_name = _input_supply, \
551 .enable_gpio = -EINVAL, \
552 .enable_high = _active_high, \
553 .enabled_at_boot = _boot_state, \
554 .startup_delay = _delay_us, \
555 .gpios = gpio_reg_##_name##_gpios, \
556 .nr_gpios = ARRAY_SIZE(gpio_reg_##_name##_gpios), \
557 .states = gpio_reg_##_name##_states, \
558 .nr_states = ARRAY_SIZE(gpio_reg_##_name##_states), \
559 .type = REGULATOR_VOLTAGE, \
560 .init_data = &ri_data_##_name, \
561 }; \
562 static struct platform_device gpio_reg_##_name##_dev = { \
563 .name = "gpio-regulator", \
564 .id = _id, \
565 .dev = { \
566 .platform_data = &gpio_reg_##_name##_pdata, \
567 }, \
568 }
569
570GPIO_REG(4, sdmmc3_vdd_sel, tps80031_rails(SMPS4),
571 true, false, 0, 1000, 3300);
572
573/* Macro for defining fixed regulator sub device data */
574#define FIXED_REG(_id, _name, _input_supply, _gpio_nr, _active_high, \
575 _millivolts, _boot_state) \
576 static struct regulator_init_data ri_data_##_name = \
577 { \
578 .supply_regulator = _input_supply, \
579 .num_consumer_supplies = \
580 ARRAY_SIZE(fixed_reg_##_name##_supply), \
581 .consumer_supplies = fixed_reg_##_name##_supply, \
582 .constraints = { \
583 .valid_modes_mask = (REGULATOR_MODE_NORMAL | \
584 REGULATOR_MODE_STANDBY), \
585 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
586 REGULATOR_CHANGE_STATUS | \
587 REGULATOR_CHANGE_VOLTAGE), \
588 }, \
589 }; \
590 static struct fixed_voltage_config fixed_reg_##_name##_pdata = \
591 { \
592 .supply_name = "fixed_reg_"#_name, \
593 .microvolts = _millivolts * 1000, \
594 .gpio = _gpio_nr, \
595 .enable_high = _active_high, \
596 .enabled_at_boot = _boot_state, \
597 .init_data = &ri_data_##_name, \
598 }; \
599 static struct platform_device fixed_reg_##_name##_dev = { \
600 .name = "reg-fixed-voltage", \
601 .id = _id, \
602 .dev = { \
603 .platform_data = &fixed_reg_##_name##_pdata, \
604 }, \
605 }
606
607FIXED_REG(0, pmu_5v15_en, NULL,
608 ENT_TPS80031_GPIO_REGEN1, true, 5000, 0 );
609FIXED_REG(2, pmu_hdmi_5v0_en, "fixed_reg_pmu_5v15_en",
610 ENT_TPS80031_GPIO_SYSEN, true, 5000, 0);
611FIXED_REG(3, vdd_fuse_en, "fixed_reg_pmu_3v3_en",
612 TEGRA_GPIO_PM0, true, 3300, 0);
613FIXED_REG(5, cam_ldo_2v8_en, NULL,
614 TEGRA_GPIO_PM7, true, 2800, 0);
615FIXED_REG(6, cam_ldo_1v8_en, NULL,
616 TEGRA_GPIO_PF1, true, 1800, 0);
617
618/* Enterprise A02- specific */
619FIXED_REG(1, pmu_3v3_en, "fixed_reg_pmu_5v15_en",
620 ENT_TPS80031_GPIO_REGEN2, true, 3300, 0);
621
622/* Enterprise A03+ specific */
623FIXED_REG(7, vdd_sdmmc3_2v85_en, NULL,
624 TEGRA_GPIO_PF2, true, 2850, 0);
625FIXED_REG(8, lcd_1v8_en, NULL,
626 TEGRA_GPIO_PB2, true, 1800, 0);
627
628#define ADD_FIXED_REG(_name) (&fixed_reg_##_name##_dev)
629
630#define FIXED_REGS_COMMON \
631 ADD_FIXED_REG(pmu_5v15_en), \
632 ADD_FIXED_REG(pmu_hdmi_5v0_en), \
633 ADD_FIXED_REG(vdd_fuse_en), \
634 ADD_FIXED_REG(cam_ldo_2v8_en), \
635 ADD_FIXED_REG(cam_ldo_1v8_en)
636
637static struct platform_device *fixed_regs_devices_a02[] = {
638 FIXED_REGS_COMMON,
639 ADD_FIXED_REG(pmu_3v3_en),
640};
641
642static struct platform_device *fixed_regs_devices_a03[] = {
643 FIXED_REGS_COMMON,
644 ADD_FIXED_REG(vdd_sdmmc3_2v85_en),
645 ADD_FIXED_REG(lcd_1v8_en),
646};
647
648#define ADD_GPIO_REG(_name) (&gpio_reg_##_name##_dev)
649static struct platform_device *gpio_regs_devices[] = {
650 ADD_GPIO_REG(sdmmc3_vdd_sel),
651};
652
653static int __init enterprise_fixed_regulator_init(void)
654{
655 int i;
656 struct board_info board_info;
657 struct platform_device **fixed_regs_devices;
658 int nfixreg_devs;
659
660 tegra_get_board_info(&board_info);
661
662 if (board_info.fab < BOARD_FAB_A03) {
663 fixed_regs_devices = fixed_regs_devices_a02;
664 nfixreg_devs = ARRAY_SIZE(fixed_regs_devices_a02);
665 } else {
666 fixed_regs_devices = fixed_regs_devices_a03;
667 nfixreg_devs = ARRAY_SIZE(fixed_regs_devices_a03);
668 }
669
670 for (i = 0; i < nfixreg_devs; ++i) {
671 struct fixed_voltage_config *fixed_reg_pdata =
672 fixed_regs_devices[i]->dev.platform_data;
673 if (fixed_reg_pdata->gpio < TEGRA_NR_GPIOS)
674 tegra_gpio_enable(fixed_reg_pdata->gpio);
675 }
676 return platform_add_devices(fixed_regs_devices, nfixreg_devs);
677}
678
679static int __init enterprise_gpio_regulator_init(void)
680{
681 int i, j;
682
683 for (i = 0; i < ARRAY_SIZE(gpio_regs_devices); ++i) {
684 struct gpio_regulator_config *gpio_reg_pdata =
685 gpio_regs_devices[i]->dev.platform_data;
686 for (j = 0; j < gpio_reg_pdata->nr_gpios; ++j) {
687 if (gpio_reg_pdata->gpios[j].gpio < TEGRA_NR_GPIOS)
688 tegra_gpio_enable(gpio_reg_pdata->gpios[j].gpio);
689 }
690 }
691 return platform_add_devices(gpio_regs_devices,
692 ARRAY_SIZE(gpio_regs_devices));
693}
694
695static int __init enterprise_regulators_fixed_gpio_init(void)
696{
697 int ret;
698
699 if (!machine_is_tegra_enterprise())
700 return 0;
701
702 ret = enterprise_fixed_regulator_init();
703 if (ret)
704 return ret;
705
706 ret = enterprise_gpio_regulator_init();
707 return ret;
708}
709subsys_initcall_sync(enterprise_regulators_fixed_gpio_init);
710
711int __init enterprise_regulator_init(void)
712{
713 void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
714 u32 pmc_ctrl;
715 u32 pmc_dpd_pads;
716 struct board_info board_info;
717
718 tegra_get_board_info(&board_info);
719
720 /* configure the power management controller to trigger PMU
721 * interrupts when low */
722
723 pmc_ctrl = readl(pmc + PMC_CTRL);
724 writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
725
726 pmc_dpd_pads = readl(pmc + PMC_DPD_PADS_ORIDE);
727 writel(pmc_dpd_pads & ~PMC_DPD_PADS_ORIDE_BLINK , pmc + PMC_DPD_PADS_ORIDE);
728
729 /* Disable battery charging if power adapter is connected. */
730 if (get_power_supply_type() == POWER_SUPPLY_TYPE_MAINS) {
731 bcharger_pdata.num_consumer_supplies = 0;
732 bcharger_pdata.consumer_supplies = NULL;
733 battery_gauge_data.battery_present = 0;
734 }
735
736 if (board_info.fab < BOARD_FAB_A03) {
737 tps_platform.num_subdevs = ARRAY_SIZE(tps80031_devs_a02);
738 tps_platform.subdevs = tps80031_devs_a02;
739 } else {
740 tps_platform.num_subdevs = ARRAY_SIZE(tps80031_devs_a03);
741 tps_platform.subdevs = tps80031_devs_a03;
742 }
743
744 i2c_register_board_info(4, enterprise_regulators, 1);
745 return 0;
746}
747
748static void enterprise_board_suspend(int lp_state, enum suspend_stage stg)
749{
750 if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
751 tegra_console_uart_suspend();
752}
753
754static void enterprise_board_resume(int lp_state, enum resume_stage stg)
755{
756 if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
757 tegra_console_uart_resume();
758}
759
760static struct tegra_suspend_platform_data enterprise_suspend_data = {
761 .cpu_timer = 2000,
762 .cpu_off_timer = 200,
763 .suspend_mode = TEGRA_SUSPEND_LP0,
764 .core_timer = 0x7e7e,
765 .core_off_timer = 0,
766 .corereq_high = true,
767 .sysclkreq_high = true,
768 .board_suspend = enterprise_board_suspend,
769 .board_resume = enterprise_board_resume,
770};
771
772static void enterprise_init_deep_sleep_mode(void)
773{
774 struct board_info bi;
775 tegra_get_board_info(&bi);
776
777 if (bi.board_id == BOARD_E1205 && bi.fab == BOARD_FAB_A01)
778 enterprise_suspend_data.suspend_mode = TEGRA_SUSPEND_LP1;
779
780 if ((bi.board_id == BOARD_E1205 && (bi.sku & BOARD_SKU_VF_BIT) == 0) ||
781 (bi.board_id == BOARD_E1197 && (bi.sku & BOARD_SKU_VF_BIT)))
782 enterprise_suspend_data.cpu_timer = 8000;
783}
784
785int __init enterprise_suspend_init(void)
786{
787 enterprise_init_deep_sleep_mode();
788 tegra_init_suspend(&enterprise_suspend_data);
789 return 0;
790}
791
792#ifdef CONFIG_TEGRA_EDP_LIMITS
793
794int __init enterprise_edp_init(void)
795{
796 unsigned int regulator_mA;
797
798 regulator_mA = get_maximum_cpu_current_supported();
799 if (!regulator_mA) {
800 regulator_mA = 2500; /* regular AP30 */
801 }
802 pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
803
804 tegra_init_cpu_edp_limits(regulator_mA);
805 tegra_init_system_edp_limits(TEGRA_BPC_CPU_PWR_LIMIT);
806 return 0;
807}
808#endif
809
810static struct tegra_bpc_mgmt_platform_data bpc_mgmt_platform_data = {
811 .gpio_trigger = TEGRA_BPC_TRIGGER,
812 .bpc_mgmt_timeout = TEGRA_BPC_TIMEOUT,
813};
814
815static struct platform_device enterprise_bpc_mgmt_device = {
816 .name = "tegra-bpc-mgmt",
817 .id = -1,
818 .dev = {
819 .platform_data = &bpc_mgmt_platform_data,
820 },
821};
822
823void __init enterprise_bpc_mgmt_init(void)
824{
825 int int_gpio = TEGRA_GPIO_TO_IRQ(TEGRA_BPC_TRIGGER);
826
827 tegra_gpio_enable(TEGRA_BPC_TRIGGER);
828
829#ifdef CONFIG_SMP
830 cpumask_setall(&(bpc_mgmt_platform_data.affinity_mask));
831 irq_set_affinity_hint(int_gpio,
832 &(bpc_mgmt_platform_data.affinity_mask));
833 irq_set_affinity(int_gpio, &(bpc_mgmt_platform_data.affinity_mask));
834#endif
835 platform_device_register(&enterprise_bpc_mgmt_device);
836
837 return;
838}
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-22 17:11:41 -0400