diff options
author | Ryan Mallon <ryan@bluewatersys.com> | 2011-05-20 03:34:21 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-20 17:34:24 -0400 |
commit | 61e72bca04be2dc11a637185f2bbe6dba32ecaf3 (patch) | |
tree | 997d0912e7f1483bdc913fae32e2c3b61481238e /arch/arm/mach-spear3xx/spear300.c | |
parent | f6558bf92aed978a81514131e408326f25046137 (diff) |
ARM: 6935/1: SPEAR3xx: Rename register/irq defines to remove naming conflicts
Prefix register and irq defintions to remove naming conflicts between
the three SPEAr3xx platforms.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear3xx/spear300.c')
-rw-r--r-- | arch/arm/mach-spear3xx/spear300.c | 66 |
1 files changed, 33 insertions, 33 deletions
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index 3d749da0b82..81a57ce6717 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -373,52 +373,52 @@ struct pmx_driver pmx_driver = { | |||
373 | /* spear3xx shared irq */ | 373 | /* spear3xx shared irq */ |
374 | static struct shirq_dev_config shirq_ras1_config[] = { | 374 | static struct shirq_dev_config shirq_ras1_config[] = { |
375 | { | 375 | { |
376 | .virq = VIRQ_IT_PERS_S, | 376 | .virq = SPEAR300_VIRQ_IT_PERS_S, |
377 | .enb_mask = IT_PERS_S_IRQ_MASK, | 377 | .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK, |
378 | .status_mask = IT_PERS_S_IRQ_MASK, | 378 | .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK, |
379 | }, { | 379 | }, { |
380 | .virq = VIRQ_IT_CHANGE_S, | 380 | .virq = SPEAR300_VIRQ_IT_CHANGE_S, |
381 | .enb_mask = IT_CHANGE_S_IRQ_MASK, | 381 | .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, |
382 | .status_mask = IT_CHANGE_S_IRQ_MASK, | 382 | .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, |
383 | }, { | 383 | }, { |
384 | .virq = VIRQ_I2S, | 384 | .virq = SPEAR300_VIRQ_I2S, |
385 | .enb_mask = I2S_IRQ_MASK, | 385 | .enb_mask = SPEAR300_I2S_IRQ_MASK, |
386 | .status_mask = I2S_IRQ_MASK, | 386 | .status_mask = SPEAR300_I2S_IRQ_MASK, |
387 | }, { | 387 | }, { |
388 | .virq = VIRQ_TDM, | 388 | .virq = SPEAR300_VIRQ_TDM, |
389 | .enb_mask = TDM_IRQ_MASK, | 389 | .enb_mask = SPEAR300_TDM_IRQ_MASK, |
390 | .status_mask = TDM_IRQ_MASK, | 390 | .status_mask = SPEAR300_TDM_IRQ_MASK, |
391 | }, { | 391 | }, { |
392 | .virq = VIRQ_CAMERA_L, | 392 | .virq = SPEAR300_VIRQ_CAMERA_L, |
393 | .enb_mask = CAMERA_L_IRQ_MASK, | 393 | .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK, |
394 | .status_mask = CAMERA_L_IRQ_MASK, | 394 | .status_mask = SPEAR300_CAMERA_L_IRQ_MASK, |
395 | }, { | 395 | }, { |
396 | .virq = VIRQ_CAMERA_F, | 396 | .virq = SPEAR300_VIRQ_CAMERA_F, |
397 | .enb_mask = CAMERA_F_IRQ_MASK, | 397 | .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK, |
398 | .status_mask = CAMERA_F_IRQ_MASK, | 398 | .status_mask = SPEAR300_CAMERA_F_IRQ_MASK, |
399 | }, { | 399 | }, { |
400 | .virq = VIRQ_CAMERA_V, | 400 | .virq = SPEAR300_VIRQ_CAMERA_V, |
401 | .enb_mask = CAMERA_V_IRQ_MASK, | 401 | .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK, |
402 | .status_mask = CAMERA_V_IRQ_MASK, | 402 | .status_mask = SPEAR300_CAMERA_V_IRQ_MASK, |
403 | }, { | 403 | }, { |
404 | .virq = VIRQ_KEYBOARD, | 404 | .virq = SPEAR300_VIRQ_KEYBOARD, |
405 | .enb_mask = KEYBOARD_IRQ_MASK, | 405 | .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK, |
406 | .status_mask = KEYBOARD_IRQ_MASK, | 406 | .status_mask = SPEAR300_KEYBOARD_IRQ_MASK, |
407 | }, { | 407 | }, { |
408 | .virq = VIRQ_GPIO1, | 408 | .virq = SPEAR300_VIRQ_GPIO1, |
409 | .enb_mask = GPIO1_IRQ_MASK, | 409 | .enb_mask = SPEAR300_GPIO1_IRQ_MASK, |
410 | .status_mask = GPIO1_IRQ_MASK, | 410 | .status_mask = SPEAR300_GPIO1_IRQ_MASK, |
411 | }, | 411 | }, |
412 | }; | 412 | }; |
413 | 413 | ||
414 | static struct spear_shirq shirq_ras1 = { | 414 | static struct spear_shirq shirq_ras1 = { |
415 | .irq = IRQ_GEN_RAS_1, | 415 | .irq = SPEAR3XX_IRQ_GEN_RAS_1, |
416 | .dev_config = shirq_ras1_config, | 416 | .dev_config = shirq_ras1_config, |
417 | .dev_count = ARRAY_SIZE(shirq_ras1_config), | 417 | .dev_count = ARRAY_SIZE(shirq_ras1_config), |
418 | .regs = { | 418 | .regs = { |
419 | .enb_reg = INT_ENB_MASK_REG, | 419 | .enb_reg = SPEAR300_INT_ENB_MASK_REG, |
420 | .status_reg = INT_STS_MASK_REG, | 420 | .status_reg = SPEAR300_INT_STS_MASK_REG, |
421 | .status_reg_mask = SHIRQ_RAS1_MASK, | 421 | .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK, |
422 | .clear_reg = -1, | 422 | .clear_reg = -1, |
423 | }, | 423 | }, |
424 | }; | 424 | }; |
@@ -427,7 +427,7 @@ static struct spear_shirq shirq_ras1 = { | |||
427 | /* arm gpio1 device registration */ | 427 | /* arm gpio1 device registration */ |
428 | static struct pl061_platform_data gpio1_plat_data = { | 428 | static struct pl061_platform_data gpio1_plat_data = { |
429 | .gpio_base = 8, | 429 | .gpio_base = 8, |
430 | .irq_base = SPEAR_GPIO1_INT_BASE, | 430 | .irq_base = SPEAR300_GPIO1_INT_BASE, |
431 | }; | 431 | }; |
432 | 432 | ||
433 | struct amba_device gpio1_device = { | 433 | struct amba_device gpio1_device = { |
@@ -440,7 +440,7 @@ struct amba_device gpio1_device = { | |||
440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, | 440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, |
441 | .flags = IORESOURCE_MEM, | 441 | .flags = IORESOURCE_MEM, |
442 | }, | 442 | }, |
443 | .irq = {VIRQ_GPIO1, NO_IRQ}, | 443 | .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, |
444 | }; | 444 | }; |
445 | 445 | ||
446 | /* spear300 routines */ | 446 | /* spear300 routines */ |