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authorSascha Hauer <s.hauer@pengutronix.de>2011-02-11 02:32:18 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-02-11 02:33:14 -0500
commitf19693a17c6705e197eb24d4618060eaac1b535c (patch)
treefc39dc23297c0e6be730cb0dfd74a34d9c0b8bfd /arch/arm/mach-shmobile/intc-sh7372.c
parent23b120cdfae4f5c29da69de750d545bad719ead4 (diff)
parent100b33c8bd8a3235fd0b7948338d6cbb3db3c63d (diff)
Merge commit 'v2.6.38-rc4' into imx-for-2.6.39
Conflicts: arch/arm/mach-mxs/clock-mx28.c Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-shmobile/intc-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index f78a1ead71a..ca5f9d17b39 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -365,6 +365,7 @@ static struct intc_desc intca_desc __initdata = {
365 365
366enum { 366enum {
367 UNUSED_INTCS = 0, 367 UNUSED_INTCS = 0,
368 ENABLED_INTCS,
368 369
369 INTCS, 370 INTCS,
370 371
@@ -413,7 +414,7 @@ enum {
413 CMT4, 414 CMT4,
414 DSITX1_DSITX1_0, 415 DSITX1_DSITX1_0,
415 DSITX1_DSITX1_1, 416 DSITX1_DSITX1_1,
416 /* MFIS2 */ 417 MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
417 CPORTS2R, 418 CPORTS2R,
418 /* CEC */ 419 /* CEC */
419 JPU6E, 420 JPU6E,
@@ -477,7 +478,7 @@ static struct intc_vect intcs_vectors[] = {
477 INTCS_VECT(CMT4, 0x1980), 478 INTCS_VECT(CMT4, 0x1980),
478 INTCS_VECT(DSITX1_DSITX1_0, 0x19a0), 479 INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
479 INTCS_VECT(DSITX1_DSITX1_1, 0x19c0), 480 INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
480 /* MFIS2 */ 481 INTCS_VECT(MFIS2_INTCS, 0x1a00),
481 INTCS_VECT(CPORTS2R, 0x1a20), 482 INTCS_VECT(CPORTS2R, 0x1a20),
482 /* CEC */ 483 /* CEC */
483 INTCS_VECT(JPU6E, 0x1a80), 484 INTCS_VECT(JPU6E, 0x1a80),
@@ -543,7 +544,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
543 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 544 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
544 CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } }, 545 CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
545 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ 546 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
546 { 0, CPORTS2R, 0, 0, 547 { MFIS2_INTCS, CPORTS2R, 0, 0,
547 JPU6E, 0, 0, 0 } }, 548 JPU6E, 0, 0, 0 } },
548 { 0xffd20104, 0, 16, /* INTAMASK */ 549 { 0xffd20104, 0, 16, /* INTAMASK */
549 { 0, 0, 0, 0, 0, 0, 0, 0, 550 { 0, 0, 0, 0, 0, 0, 0, 0,
@@ -571,7 +572,8 @@ static struct intc_prio_reg intcs_prio_registers[] = {
571 { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } }, 572 { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
572 { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0, 573 { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
573 DSITX1_DSITX1_1, 0 } }, 574 DSITX1_DSITX1_1, 0 } },
574 { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } }, 575 { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
576 0, 0 } },
575 { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } }, 577 { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
576}; 578};
577 579
@@ -590,6 +592,7 @@ static struct resource intcs_resources[] __initdata = {
590 592
591static struct intc_desc intcs_desc __initdata = { 593static struct intc_desc intcs_desc __initdata = {
592 .name = "sh7372-intcs", 594 .name = "sh7372-intcs",
595 .force_enable = ENABLED_INTCS,
593 .resource = intcs_resources, 596 .resource = intcs_resources,
594 .num_resources = ARRAY_SIZE(intcs_resources), 597 .num_resources = ARRAY_SIZE(intcs_resources),
595 .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, 598 .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,