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authorArnd Bergmann <arnd@arndb.de>2012-01-09 12:06:36 -0500
committerArnd Bergmann <arnd@arndb.de>2012-01-09 12:06:36 -0500
commit421b759b86eb8a914cbbd11f6d09a74f411762c6 (patch)
tree505ca7f23987d8eaaa519a7e8506b854e2c0d030 /arch/arm/mach-s3c2440
parente067096c8d57d191f29d734cd5692695c95cc36e (diff)
parenta07613a54d700a974f3a4a657da78ef5d097315d (diff)
Merge branch 'samsung/cleanup' into next/boards
Conflicts: arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-omap2/board-ti8168evm.c arch/arm/mach-s3c64xx/Kconfig arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/common.c Lots of relatively simple conflicts between the board changes and stuff from the arm tree. This pulls in the resolution from the samsung/cleanup tree, so we don't get conflicting merges. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-s3c2440')
-rw-r--r--arch/arm/mach-s3c2440/clock.c44
-rw-r--r--arch/arm/mach-s3c2440/common.h17
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c25
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c25
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c3
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c3
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c27
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c21
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c3
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c13
12 files changed, 113 insertions, 92 deletions
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index f9e6bdaf41d..c9879af42b0 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -34,6 +34,7 @@
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/io.h> 36#include <linux/io.h>
37#include <linux/serial_core.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <linux/atomic.h> 40#include <linux/atomic.h>
@@ -43,6 +44,7 @@
43 44
44#include <plat/clock.h> 45#include <plat/clock.h>
45#include <plat/cpu.h> 46#include <plat/cpu.h>
47#include <plat/regs-serial.h>
46 48
47/* S3C2440 extended clock support */ 49/* S3C2440 extended clock support */
48 50
@@ -108,6 +110,46 @@ static struct clk s3c2440_clk_ac97 = {
108 .ctrlbit = S3C2440_CLKCON_CAMERA, 110 .ctrlbit = S3C2440_CLKCON_CAMERA,
109}; 111};
110 112
113static unsigned long s3c2440_fclk_n_getrate(struct clk *clk)
114{
115 unsigned long ucon0, ucon1, ucon2, divisor;
116
117 /* the fun of calculating the uart divisors on the s3c2440 */
118 ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
119 ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
120 ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
121
122 ucon0 &= S3C2440_UCON0_DIVMASK;
123 ucon1 &= S3C2440_UCON1_DIVMASK;
124 ucon2 &= S3C2440_UCON2_DIVMASK;
125
126 if (ucon0 != 0)
127 divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
128 else if (ucon1 != 0)
129 divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
130 else if (ucon2 != 0)
131 divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
132 else
133 /* manual calims 44, seems to be 9 */
134 divisor = 9;
135
136 return clk_get_rate(clk->parent) / divisor;
137}
138
139static struct clk s3c2440_clk_fclk_n = {
140 .name = "fclk_n",
141 .parent = &clk_f,
142 .ops = &(struct clk_ops) {
143 .get_rate = s3c2440_fclk_n_getrate,
144 },
145};
146
147static struct clk_lookup s3c2440_clk_lookup[] = {
148 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
149 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
150 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
151};
152
111static int s3c2440_clk_add(struct sys_device *sysdev) 153static int s3c2440_clk_add(struct sys_device *sysdev)
112{ 154{
113 struct clk *clock_upll; 155 struct clk *clock_upll;
@@ -126,10 +168,12 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
126 s3c2440_clk_cam.parent = clock_h; 168 s3c2440_clk_cam.parent = clock_h;
127 s3c2440_clk_ac97.parent = clock_p; 169 s3c2440_clk_ac97.parent = clock_p;
128 s3c2440_clk_cam_upll.parent = clock_upll; 170 s3c2440_clk_cam_upll.parent = clock_upll;
171 s3c24xx_register_clock(&s3c2440_clk_fclk_n);
129 172
130 s3c24xx_register_clock(&s3c2440_clk_ac97); 173 s3c24xx_register_clock(&s3c2440_clk_ac97);
131 s3c24xx_register_clock(&s3c2440_clk_cam); 174 s3c24xx_register_clock(&s3c2440_clk_cam);
132 s3c24xx_register_clock(&s3c2440_clk_cam_upll); 175 s3c24xx_register_clock(&s3c2440_clk_cam_upll);
176 clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup));
133 177
134 clk_disable(&s3c2440_clk_ac97); 178 clk_disable(&s3c2440_clk_ac97);
135 clk_disable(&s3c2440_clk_cam); 179 clk_disable(&s3c2440_clk_cam);
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
new file mode 100644
index 00000000000..db8a98ac68c
--- /dev/null
+++ b/arch/arm/mach-s3c2440/common.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C2440 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14
15void s3c2440_restart(char mode, const char *cmd);
16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 74f92fc3fd0..24569550de1 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -55,6 +55,8 @@
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56#include <plat/audio-simtec.h> 56#include <plat/audio-simtec.h>
57 57
58#include "common.h"
59
58#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" 60#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
59 61
60static struct map_desc anubis_iodesc[] __initdata = { 62static struct map_desc anubis_iodesc[] __initdata = {
@@ -96,22 +98,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
96#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 98#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
97#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 99#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
98 100
99static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
100 [0] = {
101 .name = "uclk",
102 .divisor = 1,
103 .min_baud = 0,
104 .max_baud = 0,
105 },
106 [1] = {
107 .name = "pclk",
108 .divisor = 1,
109 .min_baud = 0,
110 .max_baud = 0,
111 }
112};
113
114
115static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { 101static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
116 [0] = { 102 [0] = {
117 .hwport = 0, 103 .hwport = 0,
@@ -119,8 +105,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
119 .ucon = UCON, 105 .ucon = UCON,
120 .ulcon = ULCON, 106 .ulcon = ULCON,
121 .ufcon = UFCON, 107 .ufcon = UFCON,
122 .clocks = anubis_serial_clocks, 108 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
123 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
124 }, 109 },
125 [1] = { 110 [1] = {
126 .hwport = 2, 111 .hwport = 2,
@@ -128,8 +113,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
128 .ucon = UCON, 113 .ucon = UCON,
129 .ulcon = ULCON, 114 .ulcon = ULCON,
130 .ufcon = UFCON, 115 .ufcon = UFCON,
131 .clocks = anubis_serial_clocks, 116 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
132 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
133 }, 117 },
134}; 118};
135 119
@@ -503,4 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
503 .init_machine = anubis_init, 487 .init_machine = anubis_init,
504 .init_irq = s3c24xx_init_irq, 488 .init_irq = s3c24xx_init_irq,
505 .timer = &s3c24xx_timer, 489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart,
506MACHINE_END 491MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 38887ee0c78..d6a9763110c 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -49,6 +49,8 @@
49#include <plat/cpu.h> 49#include <plat/cpu.h>
50#include <plat/mci.h> 50#include <plat/mci.h>
51 51
52#include "common.h"
53
52static struct map_desc at2440evb_iodesc[] __initdata = { 54static struct map_desc at2440evb_iodesc[] __initdata = {
53 /* Nothing here */ 55 /* Nothing here */
54}; 56};
@@ -57,22 +59,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
57#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 59#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
58#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 60#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
59 61
60static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
61 [0] = {
62 .name = "uclk",
63 .divisor = 1,
64 .min_baud = 0,
65 .max_baud = 0,
66 },
67 [1] = {
68 .name = "pclk",
69 .divisor = 1,
70 .min_baud = 0,
71 .max_baud = 0,
72 }
73};
74
75
76static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { 62static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
77 [0] = { 63 [0] = {
78 .hwport = 0, 64 .hwport = 0,
@@ -80,8 +66,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
80 .ucon = UCON, 66 .ucon = UCON,
81 .ulcon = ULCON, 67 .ulcon = ULCON,
82 .ufcon = UFCON, 68 .ufcon = UFCON,
83 .clocks = at2440evb_serial_clocks, 69 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
84 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
85 }, 70 },
86 [1] = { 71 [1] = {
87 .hwport = 1, 72 .hwport = 1,
@@ -89,8 +74,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
89 .ucon = UCON, 74 .ucon = UCON,
90 .ulcon = ULCON, 75 .ulcon = ULCON,
91 .ufcon = UFCON, 76 .ufcon = UFCON,
92 .clocks = at2440evb_serial_clocks, 77 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
93 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
94 }, 78 },
95}; 79};
96 80
@@ -238,4 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
238 .init_machine = at2440evb_init, 222 .init_machine = at2440evb_init,
239 .init_irq = s3c24xx_init_irq, 223 .init_irq = s3c24xx_init_irq,
240 .timer = &s3c24xx_timer, 224 .timer = &s3c24xx_timer,
225 .restart = s3c2440_restart,
241MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index de1e0ff46ce..5859e609d28 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,6 +90,7 @@
90#include <plat/iic.h> 90#include <plat/iic.h>
91#include <plat/ts.h> 91#include <plat/ts.h>
92 92
93#include "common.h"
93 94
94static struct pcf50633 *gta02_pcf; 95static struct pcf50633 *gta02_pcf;
95 96
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
600 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
601 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
602 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart,
603MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 937eb7818c1..adbbb85bc4c 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -60,6 +60,8 @@
60 60
61#include <sound/s3c24xx_uda134x.h> 61#include <sound/s3c24xx_uda134x.h>
62 62
63#include "common.h"
64
63#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) 65#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
64 66
65static struct map_desc mini2440_iodesc[] __initdata = { 67static struct map_desc mini2440_iodesc[] __initdata = {
@@ -699,4 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
699 .init_machine = mini2440_init, 701 .init_machine = mini2440_init,
700 .init_irq = s3c24xx_init_irq, 702 .init_irq = s3c24xx_init_irq,
701 .timer = &s3c24xx_timer, 703 .timer = &s3c24xx_timer,
704 .restart = s3c2440_restart,
702MACHINE_END 705MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 61c0bf14816..40eaf844bc1 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -47,6 +47,8 @@
47#include <plat/devs.h> 47#include <plat/devs.h>
48#include <plat/cpu.h> 48#include <plat/cpu.h>
49 49
50#include "common.h"
51
50static struct map_desc nexcoder_iodesc[] __initdata = { 52static struct map_desc nexcoder_iodesc[] __initdata = {
51 /* nothing here yet */ 53 /* nothing here yet */
52}; 54};
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
156 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
157 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
158 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart,
159MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index dc142ebf8cb..4c480ef734f 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -54,6 +54,8 @@
54#include <plat/devs.h> 54#include <plat/devs.h>
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56 56
57#include "common.h"
58
57/* onboard perihperal map */ 59/* onboard perihperal map */
58 60
59static struct map_desc osiris_iodesc[] __initdata = { 61static struct map_desc osiris_iodesc[] __initdata = {
@@ -100,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
100#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 102#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
101#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 103#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
102 104
103static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
104 [0] = {
105 .name = "uclk",
106 .divisor = 1,
107 .min_baud = 0,
108 .max_baud = 0,
109 },
110 [1] = {
111 .name = "pclk",
112 .divisor = 1,
113 .min_baud = 0,
114 .max_baud = 0,
115 }
116};
117
118static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { 105static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
119 [0] = { 106 [0] = {
120 .hwport = 0, 107 .hwport = 0,
@@ -122,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
122 .ucon = UCON, 109 .ucon = UCON,
123 .ulcon = ULCON, 110 .ulcon = ULCON,
124 .ufcon = UFCON, 111 .ufcon = UFCON,
125 .clocks = osiris_serial_clocks, 112 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
126 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
127 }, 113 },
128 [1] = { 114 [1] = {
129 .hwport = 1, 115 .hwport = 1,
@@ -131,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
131 .ucon = UCON, 117 .ucon = UCON,
132 .ulcon = ULCON, 118 .ulcon = ULCON,
133 .ufcon = UFCON, 119 .ufcon = UFCON,
134 .clocks = osiris_serial_clocks, 120 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
135 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
136 }, 121 },
137 [2] = { 122 [2] = {
138 .hwport = 2, 123 .hwport = 2,
@@ -140,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
140 .ucon = UCON, 125 .ucon = UCON,
141 .ulcon = ULCON, 126 .ulcon = ULCON,
142 .ufcon = UFCON, 127 .ufcon = UFCON,
143 .clocks = osiris_serial_clocks, 128 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
144 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
145 } 129 }
146}; 130};
147 131
@@ -452,4 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
452 .init_irq = s3c24xx_init_irq, 436 .init_irq = s3c24xx_init_irq,
453 .init_machine = osiris_init, 437 .init_machine = osiris_init,
454 .timer = &s3c24xx_timer, 438 .timer = &s3c24xx_timer,
439 .restart = s3c2440_restart,
455MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 0d3453bf567..f892e8befca 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -62,21 +62,14 @@
62 62
63#include <sound/uda1380.h> 63#include <sound/uda1380.h>
64 64
65#include "common.h"
66
65#define LCD_PWM_PERIOD 192960 67#define LCD_PWM_PERIOD 192960
66#define LCD_PWM_DUTY 127353 68#define LCD_PWM_DUTY 127353
67 69
68static struct map_desc rx1950_iodesc[] __initdata = { 70static struct map_desc rx1950_iodesc[] __initdata = {
69}; 71};
70 72
71static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
72 [0] = {
73 .name = "fclk",
74 .divisor = 0x0a,
75 .min_baud = 0,
76 .max_baud = 0,
77 },
78};
79
80static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { 73static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
81 [0] = { 74 [0] = {
82 .hwport = 0, 75 .hwport = 0,
@@ -84,8 +77,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
84 .ucon = 0x3c5, 77 .ucon = 0x3c5,
85 .ulcon = 0x03, 78 .ulcon = 0x03,
86 .ufcon = 0x51, 79 .ufcon = 0x51,
87 .clocks = rx1950_serial_clocks, 80 .clk_sel = S3C2410_UCON_CLKSEL3,
88 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
89 }, 81 },
90 [1] = { 82 [1] = {
91 .hwport = 1, 83 .hwport = 1,
@@ -93,8 +85,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
93 .ucon = 0x3c5, 85 .ucon = 0x3c5,
94 .ulcon = 0x03, 86 .ulcon = 0x03,
95 .ufcon = 0x51, 87 .ufcon = 0x51,
96 .clocks = rx1950_serial_clocks, 88 .clk_sel = S3C2410_UCON_CLKSEL3,
97 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
98 }, 89 },
99 /* IR port */ 90 /* IR port */
100 [2] = { 91 [2] = {
@@ -103,8 +94,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
103 .ucon = 0x3c5, 94 .ucon = 0x3c5,
104 .ulcon = 0x43, 95 .ulcon = 0x43,
105 .ufcon = 0xf1, 96 .ufcon = 0xf1,
106 .clocks = rx1950_serial_clocks, 97 .clk_sel = S3C2410_UCON_CLKSEL3,
107 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
108 }, 98 },
109}; 99};
110 100
@@ -832,4 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
832 .init_irq = s3c24xx_init_irq, 822 .init_irq = s3c24xx_init_irq,
833 .init_machine = rx1950_init_machine, 823 .init_machine = rx1950_init_machine,
834 .timer = &s3c24xx_timer, 824 .timer = &s3c24xx_timer,
825 .restart = s3c2440_restart,
835MACHINE_END 826MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index e19499c2f90..88d648a874d 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -51,6 +51,8 @@
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <plat/pm.h> 52#include <plat/pm.h>
53 53
54#include "common.h"
55
54static struct map_desc rx3715_iodesc[] __initdata = { 56static struct map_desc rx3715_iodesc[] __initdata = {
55 /* dump ISA space somewhere unused */ 57 /* dump ISA space somewhere unused */
56 58
@@ -67,16 +69,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
67 }, 69 },
68}; 70};
69 71
70
71static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
72 [0] = {
73 .name = "fclk",
74 .divisor = 0,
75 .min_baud = 0,
76 .max_baud = 0,
77 }
78};
79
80static struct s3c2410_uartcfg rx3715_uartcfgs[] = { 72static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
81 [0] = { 73 [0] = {
82 .hwport = 0, 74 .hwport = 0,
@@ -84,8 +76,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
84 .ucon = 0x3c5, 76 .ucon = 0x3c5,
85 .ulcon = 0x03, 77 .ulcon = 0x03,
86 .ufcon = 0x51, 78 .ufcon = 0x51,
87 .clocks = rx3715_serial_clocks, 79 .clk_sel = S3C2410_UCON_CLKSEL3,
88 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
89 }, 80 },
90 [1] = { 81 [1] = {
91 .hwport = 1, 82 .hwport = 1,
@@ -93,8 +84,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
93 .ucon = 0x3c5, 84 .ucon = 0x3c5,
94 .ulcon = 0x03, 85 .ulcon = 0x03,
95 .ufcon = 0x00, 86 .ufcon = 0x00,
96 .clocks = rx3715_serial_clocks, 87 .clk_sel = S3C2410_UCON_CLKSEL3,
97 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
98 }, 88 },
99 /* IR port */ 89 /* IR port */
100 [2] = { 90 [2] = {
@@ -103,8 +93,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
103 .ucon = 0x3c5, 93 .ucon = 0x3c5,
104 .ulcon = 0x43, 94 .ulcon = 0x43,
105 .ufcon = 0x51, 95 .ufcon = 0x51,
106 .clocks = rx3715_serial_clocks, 96 .clk_sel = S3C2410_UCON_CLKSEL3,
107 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
108 } 97 }
109}; 98};
110 99
@@ -224,4 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
224 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
225 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
226 .timer = &s3c24xx_timer, 215 .timer = &s3c24xx_timer,
216 .restart = s3c2440_restart,
227MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 36eeb4197a8..1deb60d12a6 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -47,6 +47,8 @@
47 47
48#include <plat/common-smdk.h> 48#include <plat/common-smdk.h>
49 49
50#include "common.h"
51
50static struct map_desc smdk2440_iodesc[] __initdata = { 52static struct map_desc smdk2440_iodesc[] __initdata = {
51 /* ISA IO Space map (memory space selected by A24) */ 53 /* ISA IO Space map (memory space selected by A24) */
52 54
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
181 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
182 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
183 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart,
184MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 37f8cc6aabd..42d73f1e0ce 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,6 +35,7 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
38 39
39#include <plat/gpio-core.h> 40#include <plat/gpio-core.h>
40#include <plat/gpio-cfg.h> 41#include <plat/gpio-cfg.h>
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void)
73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
75} 76}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}