diff options
author | Heiko Stuebner <heiko@sntech.de> | 2011-08-18 07:16:56 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-09-16 02:39:43 -0400 |
commit | ead841c2ed986f7cc6a4830e816b0f633f95cf7f (patch) | |
tree | 867230bdc459dea547c2ceb39fba6c72ad737481 /arch/arm/mach-s3c2412 | |
parent | 93ee7a9340d64f20295aacc3fb6a22b759323280 (diff) |
ARM: S3C24XX: Remove hw_addr from s3c24xx dma channel declarations
According to commit c4806174c516d26bf4a72db1789cfc96e4950d07
(ARM: S3C2412: DMA: Remove I2S FIFO address) the S3C DMA API does not
make use of hw_addr.to/from declared for some of the channels in
mach-s3c24XX/dma.c
Grepping through the kernel also did non reveal any new users of
these properties since the mentioned commit.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c2412')
-rw-r--r-- | arch/arm/mach-s3c2412/dma.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 7abecfca0b7..c61e3261615 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c | |||
@@ -50,64 +50,46 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { | |||
50 | .name = "sdi", | 50 | .name = "sdi", |
51 | .channels = MAP(S3C2412_DMAREQSEL_SDI), | 51 | .channels = MAP(S3C2412_DMAREQSEL_SDI), |
52 | .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), | 52 | .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), |
53 | .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA, | ||
54 | .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA, | ||
55 | }, | 53 | }, |
56 | [DMACH_SPI0] = { | 54 | [DMACH_SPI0] = { |
57 | .name = "spi0", | 55 | .name = "spi0", |
58 | .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), | 56 | .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), |
59 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), | 57 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), |
60 | .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, | ||
61 | .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, | ||
62 | }, | 58 | }, |
63 | [DMACH_SPI1] = { | 59 | [DMACH_SPI1] = { |
64 | .name = "spi1", | 60 | .name = "spi1", |
65 | .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), | 61 | .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), |
66 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), | 62 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), |
67 | .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, | ||
68 | .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, | ||
69 | }, | 63 | }, |
70 | [DMACH_UART0] = { | 64 | [DMACH_UART0] = { |
71 | .name = "uart0", | 65 | .name = "uart0", |
72 | .channels = MAP(S3C2412_DMAREQSEL_UART0_0), | 66 | .channels = MAP(S3C2412_DMAREQSEL_UART0_0), |
73 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), | 67 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), |
74 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | ||
75 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | ||
76 | }, | 68 | }, |
77 | [DMACH_UART1] = { | 69 | [DMACH_UART1] = { |
78 | .name = "uart1", | 70 | .name = "uart1", |
79 | .channels = MAP(S3C2412_DMAREQSEL_UART1_0), | 71 | .channels = MAP(S3C2412_DMAREQSEL_UART1_0), |
80 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), | 72 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), |
81 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | ||
82 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | ||
83 | }, | 73 | }, |
84 | [DMACH_UART2] = { | 74 | [DMACH_UART2] = { |
85 | .name = "uart2", | 75 | .name = "uart2", |
86 | .channels = MAP(S3C2412_DMAREQSEL_UART2_0), | 76 | .channels = MAP(S3C2412_DMAREQSEL_UART2_0), |
87 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), | 77 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), |
88 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | ||
89 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | ||
90 | }, | 78 | }, |
91 | [DMACH_UART0_SRC2] = { | 79 | [DMACH_UART0_SRC2] = { |
92 | .name = "uart0", | 80 | .name = "uart0", |
93 | .channels = MAP(S3C2412_DMAREQSEL_UART0_1), | 81 | .channels = MAP(S3C2412_DMAREQSEL_UART0_1), |
94 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), | 82 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), |
95 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | ||
96 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | ||
97 | }, | 83 | }, |
98 | [DMACH_UART1_SRC2] = { | 84 | [DMACH_UART1_SRC2] = { |
99 | .name = "uart1", | 85 | .name = "uart1", |
100 | .channels = MAP(S3C2412_DMAREQSEL_UART1_1), | 86 | .channels = MAP(S3C2412_DMAREQSEL_UART1_1), |
101 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), | 87 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), |
102 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | ||
103 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | ||
104 | }, | 88 | }, |
105 | [DMACH_UART2_SRC2] = { | 89 | [DMACH_UART2_SRC2] = { |
106 | .name = "uart2", | 90 | .name = "uart2", |
107 | .channels = MAP(S3C2412_DMAREQSEL_UART2_1), | 91 | .channels = MAP(S3C2412_DMAREQSEL_UART2_1), |
108 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), | 92 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), |
109 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | ||
110 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | ||
111 | }, | 93 | }, |
112 | [DMACH_TIMER] = { | 94 | [DMACH_TIMER] = { |
113 | .name = "timer", | 95 | .name = "timer", |