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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /arch/arm/mach-s3c2410
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/Kconfig161
-rw-r--r--arch/arm/mach-s3c2410/Makefile27
-rw-r--r--arch/arm/mach-s3c2410/cpu-freq.c28
-rw-r--r--arch/arm/mach-s3c2410/pll.c20
4 files changed, 208 insertions, 28 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 68d89cb96af..7245a55795d 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -2,6 +2,49 @@
2# 2#
3# Licensed under GPLv2 3# Licensed under GPLv2
4 4
5config CPU_S3C2410
6 bool
7 depends on ARCH_S3C2410
8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP
10 select S3C2410_CLOCK
11 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410
13 select S3C2410_PM if PM
14 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
15 help
16 Support for S3C2410 and S3C2410A family from the S3C24XX line
17 of Samsung Mobile CPUs.
18
19config CPU_S3C2410_DMA
20 bool
21 depends on S3C2410_DMA && (CPU_S3C2410 || CPU_S3C2442)
22 default y if CPU_S3C2410 || CPU_S3C2442
23 help
24 DMA device selection for S3C2410 and compatible CPUs
25
26config S3C2410_PM
27 bool
28 help
29 Power Management code common to S3C2410 and better
30
31config S3C2410_GPIO
32 bool
33 help
34 GPIO code for S3C2410 and similar processors
35
36config SIMTEC_NOR
37 bool
38 help
39 Internal node to specify machine has simtec NOR mapping
40
41config MACH_BAST_IDE
42 bool
43 select HAVE_PATA_PLATFORM
44 help
45 Internal node for machines with an BAST style IDE
46 interface
47
5# cpu frequency scaling support 48# cpu frequency scaling support
6 49
7config S3C2410_CPUFREQ 50config S3C2410_CPUFREQ
@@ -18,3 +61,121 @@ config S3C2410_PLLTABLE
18 help 61 help
19 Select the PLL table for the S3C2410 62 Select the PLL table for the S3C2410
20 63
64menu "S3C2410 Machines"
65
66config ARCH_SMDK2410
67 bool "SMDK2410/A9M2410"
68 select CPU_S3C2410
69 select MACH_SMDK
70 help
71 Say Y here if you are using the SMDK2410 or the derived module A9M2410
72 <http://www.fsforth.de>
73
74config ARCH_H1940
75 bool "IPAQ H1940"
76 select CPU_S3C2410
77 select PM_H1940 if PM
78 select S3C_DEV_USB_HOST
79 select S3C_DEV_NAND
80 select S3C2410_SETUP_TS
81 help
82 Say Y here if you are using the HP IPAQ H1940
83
84config H1940BT
85 tristate "Control the state of H1940 bluetooth chip"
86 depends on ARCH_H1940
87 select RFKILL
88 help
89 This is a simple driver that is able to control
90 the state of built in bluetooth chip on h1940.
91
92config PM_H1940
93 bool
94 help
95 Internal node for H1940 and related PM
96
97config MACH_N30
98 bool "Acer N30 family"
99 select CPU_S3C2410
100 select MACH_N35
101 select S3C_DEV_USB_HOST
102 select S3C_DEV_NAND
103 help
104 Say Y here if you want suppt for the Acer N30, Acer N35,
105 Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
106
107config MACH_N35
108 bool
109 help
110 Internal node in order to enable support for Acer N35 if Acer N30 is
111 selected.
112
113config ARCH_BAST
114 bool "Simtec Electronics BAST (EB2410ITX)"
115 select CPU_S3C2410
116 select S3C2410_IOTIMING if S3C2410_CPUFREQ
117 select PM_SIMTEC if PM
118 select SIMTEC_NOR
119 select MACH_BAST_IDE
120 select S3C24XX_DCLK
121 select ISA
122 select S3C_DEV_HWMON
123 select S3C_DEV_USB_HOST
124 select S3C_DEV_NAND
125 help
126 Say Y here if you are using the Simtec Electronics EB2410ITX
127 development board (also known as BAST)
128
129config MACH_OTOM
130 bool "NexVision OTOM Board"
131 select CPU_S3C2410
132 select S3C_DEV_USB_HOST
133 select S3C_DEV_NAND
134 help
135 Say Y here if you are using the Nex Vision OTOM board
136
137config MACH_AML_M5900
138 bool "AML M5900 Series"
139 select CPU_S3C2410
140 select PM_SIMTEC if PM
141 select S3C_DEV_USB_HOST
142 help
143 Say Y here if you are using the American Microsystems M5900 Series
144 <http://www.amltd.com>
145
146config BAST_PC104_IRQ
147 bool "BAST PC104 IRQ support"
148 depends on ARCH_BAST
149 default y
150 help
151 Say Y here to enable the PC104 IRQ routing on the
152 Simtec BAST (EB2410ITX)
153
154config MACH_TCT_HAMMER
155 bool "TCT Hammer Board"
156 select CPU_S3C2410
157 select S3C_DEV_USB_HOST
158 help
159 Say Y here if you are using the TinCanTools Hammer Board
160 <http://www.tincantools.com>
161
162config MACH_VR1000
163 bool "Thorcom VR1000"
164 select PM_SIMTEC if PM
165 select S3C24XX_DCLK
166 select SIMTEC_NOR
167 select MACH_BAST_IDE
168 select CPU_S3C2410
169 select S3C_DEV_USB_HOST
170 help
171 Say Y here if you are using the Thorcom VR1000 board.
172
173config MACH_QT2410
174 bool "QT2410"
175 select CPU_S3C2410
176 select S3C_DEV_USB_HOST
177 select S3C_DEV_NAND
178 help
179 Say Y here if you are using the Armzone QT2410
180
181endmenu
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 6b9a316e004..81695353d8f 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -9,6 +9,33 @@ obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
11 11
12obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
16obj-$(CONFIG_S3C2410_GPIO) += gpio.o
12obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o 17obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o
13obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o 18obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o
14 19
20# Machine support
21
22obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o
23obj-$(CONFIG_ARCH_H1940) += mach-h1940.o
24obj-$(CONFIG_H1940BT) += h1940-bluetooth.o
25obj-$(CONFIG_PM_H1940) += pm-h1940.o
26obj-$(CONFIG_MACH_N30) += mach-n30.o
27obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o
28obj-$(CONFIG_MACH_OTOM) += mach-otom.o
29obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o
30obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
31obj-$(CONFIG_MACH_TCT_HAMMER) += mach-tct_hammer.o
32obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o
33obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o
34
35# Common bits of machine support
36
37obj-$(CONFIG_SIMTEC_NOR) += nor-simtec.o
38
39# machine additions
40
41obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o
diff --git a/arch/arm/mach-s3c2410/cpu-freq.c b/arch/arm/mach-s3c2410/cpu-freq.c
index 5404535da1a..75189df995a 100644
--- a/arch/arm/mach-s3c2410/cpu-freq.c
+++ b/arch/arm/mach-s3c2410/cpu-freq.c
@@ -16,7 +16,7 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
19#include <linux/device.h> 19#include <linux/sysdev.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/io.h> 22#include <linux/io.h>
@@ -115,27 +115,24 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
115 .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), 115 .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
116}; 116};
117 117
118static int s3c2410_cpufreq_add(struct device *dev, 118static int s3c2410_cpufreq_add(struct sys_device *sysdev)
119 struct subsys_interface *sif)
120{ 119{
121 return s3c_cpufreq_register(&s3c2410_cpufreq_info); 120 return s3c_cpufreq_register(&s3c2410_cpufreq_info);
122} 121}
123 122
124static struct subsys_interface s3c2410_cpufreq_interface = { 123static struct sysdev_driver s3c2410_cpufreq_driver = {
125 .name = "s3c2410_cpufreq", 124 .add = s3c2410_cpufreq_add,
126 .subsys = &s3c2410_subsys,
127 .add_dev = s3c2410_cpufreq_add,
128}; 125};
129 126
130static int __init s3c2410_cpufreq_init(void) 127static int __init s3c2410_cpufreq_init(void)
131{ 128{
132 return subsys_interface_register(&s3c2410_cpufreq_interface); 129 return sysdev_driver_register(&s3c2410_sysclass,
130 &s3c2410_cpufreq_driver);
133} 131}
134 132
135arch_initcall(s3c2410_cpufreq_init); 133arch_initcall(s3c2410_cpufreq_init);
136 134
137static int s3c2410a_cpufreq_add(struct device *dev, 135static int s3c2410a_cpufreq_add(struct sys_device *sysdev)
138 struct subsys_interface *sif)
139{ 136{
140 /* alter the maximum freq settings for S3C2410A. If a board knows 137 /* alter the maximum freq settings for S3C2410A. If a board knows
141 * it only has a maximum of 200, then it should register its own 138 * it only has a maximum of 200, then it should register its own
@@ -146,18 +143,17 @@ static int s3c2410a_cpufreq_add(struct device *dev,
146 s3c2410_cpufreq_info.max.pclk = 66500000; 143 s3c2410_cpufreq_info.max.pclk = 66500000;
147 s3c2410_cpufreq_info.name = "s3c2410a"; 144 s3c2410_cpufreq_info.name = "s3c2410a";
148 145
149 return s3c2410_cpufreq_add(dev, sif); 146 return s3c2410_cpufreq_add(sysdev);
150} 147}
151 148
152static struct subsys_interface s3c2410a_cpufreq_interface = { 149static struct sysdev_driver s3c2410a_cpufreq_driver = {
153 .name = "s3c2410a_cpufreq", 150 .add = s3c2410a_cpufreq_add,
154 .subsys = &s3c2410a_subsys,
155 .add_dev = s3c2410a_cpufreq_add,
156}; 151};
157 152
158static int __init s3c2410a_cpufreq_init(void) 153static int __init s3c2410a_cpufreq_init(void)
159{ 154{
160 return subsys_interface_register(&s3c2410a_cpufreq_interface); 155 return sysdev_driver_register(&s3c2410a_sysclass,
156 &s3c2410a_cpufreq_driver);
161} 157}
162 158
163arch_initcall(s3c2410a_cpufreq_init); 159arch_initcall(s3c2410a_cpufreq_init);
diff --git a/arch/arm/mach-s3c2410/pll.c b/arch/arm/mach-s3c2410/pll.c
index e0b3b347da8..8338865e11c 100644
--- a/arch/arm/mach-s3c2410/pll.c
+++ b/arch/arm/mach-s3c2410/pll.c
@@ -25,7 +25,7 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/device.h> 28#include <linux/sysdev.h>
29#include <linux/list.h> 29#include <linux/list.h>
30#include <linux/clk.h> 30#include <linux/clk.h>
31#include <linux/err.h> 31#include <linux/err.h>
@@ -66,34 +66,30 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = {
66 { .frequency = 270000000, .index = PLLVAL(127, 1, 1), }, 66 { .frequency = 270000000, .index = PLLVAL(127, 1, 1), },
67}; 67};
68 68
69static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif) 69static int s3c2410_plls_add(struct sys_device *dev)
70{ 70{
71 return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); 71 return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
72} 72}
73 73
74static struct subsys_interface s3c2410_plls_interface = { 74static struct sysdev_driver s3c2410_plls_drv = {
75 .name = "s3c2410_plls", 75 .add = s3c2410_plls_add,
76 .subsys = &s3c2410_subsys,
77 .add_dev = s3c2410_plls_add,
78}; 76};
79 77
80static int __init s3c2410_pll_init(void) 78static int __init s3c2410_pll_init(void)
81{ 79{
82 return subsys_interface_register(&s3c2410_plls_interface); 80 return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_plls_drv);
83 81
84} 82}
85 83
86arch_initcall(s3c2410_pll_init); 84arch_initcall(s3c2410_pll_init);
87 85
88static struct subsys_interface s3c2410a_plls_interface = { 86static struct sysdev_driver s3c2410a_plls_drv = {
89 .name = "s3c2410a_plls", 87 .add = s3c2410_plls_add,
90 .subsys = &s3c2410a_subsys,
91 .add_dev = s3c2410_plls_add,
92}; 88};
93 89
94static int __init s3c2410a_pll_init(void) 90static int __init s3c2410a_pll_init(void)
95{ 91{
96 return subsys_interface_register(&s3c2410a_plls_interface); 92 return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_plls_drv);
97} 93}
98 94
99arch_initcall(s3c2410a_pll_init); 95arch_initcall(s3c2410a_pll_init);